75 lines
3.3 KiB
C
75 lines
3.3 KiB
C
/* $NetBSD: wdcreg.h,v 1.35 2012/01/15 20:08:54 jakllsch Exp $ */
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)wdreg.h 7.1 (Berkeley) 5/9/91
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*/
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#ifndef _DEV_IC_WDCREG_H_
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#define _DEV_IC_WDCREG_H_
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/*
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* WD1003 / ATA Disk Controller register definitions.
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*/
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/* offsets of registers in the 'regular' register region */
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#define wd_data 0 /* data register (R/W - 16 bits) */
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#define wd_error 1 /* error register (R) */
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#define wd_precomp 1 /* write precompensation (W) */
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#define wd_seccnt 2 /* sector count (R/W) */
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#define wd_ireason 2 /* interrupt reason (R/W) (for atapi) */
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#define wd_sector 3 /* first sector number (R/W) */
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#define wd_cyl_lo 4 /* cylinder address, low byte (R/W) */
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#define wd_cyl_hi 5 /* cylinder address, high byte (R/W) */
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#define wd_sdh 6 /* sector size/drive/head (R/W) */
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#define wd_command 7 /* command register (W) */
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#define wd_lba_lo 3 /* lba address, low byte (RW) */
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#define wd_lba_mi 4 /* lba address, middle byte (RW) */
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#define wd_lba_hi 5 /* lba address, high byte (RW) */
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/* "shadow" registers; these may or may not overlap regular registers */
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#define wd_status 8 /* immediate status (R) */
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#define wd_features 9 /* features (W) */
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/* offsets of registers in the auxiliary register region */
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#define wd_aux_altsts 0 /* alternate fixed disk status (R) */
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#define wd_aux_ctlr 0 /* fixed disk controller control (W) */
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#define WDCTL_HOB 0x80 /* read high order byte */
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#define WDCTL_4BIT 0x08 /* use four head bits (wd1003) */
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#define WDCTL_RST 0x04 /* reset the controller */
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#define WDCTL_IDS 0x02 /* disable controller interrupts */
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#if 0 /* NOT MAPPED; fd uses this register on PCs */
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#define wd_digin 1 /* disk controller input (R) */
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#endif
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#endif /* _DEV_IC_WDCREG_H_ */
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