b480d71a7a
Added support for the 3Com Ethernet (ec) at mbmem.
435 lines
13 KiB
C
435 lines
13 KiB
C
/* $NetBSD: if_ie_obio.c,v 1.1 2001/06/27 17:24:35 fredette Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg and Matt Fredette.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1995 Charles D. Cranor
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles D. Cranor.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Sun2 OBIO front-end for the Intel 82586 Ethernet driver
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*
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* Converted to SUN ie driver by Charles D. Cranor,
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* October 1994, January 1995.
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*/
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/*
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* The i82586 is a very painful chip, found in sun[23]'s, sun-4/100's
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* sun-4/200's, and VME based suns. The byte order is all wrong for a
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* SUN, making life difficult. Programming this chip is mostly the same,
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* but certain details differ from system to system. This driver is
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* written so that different "ie" interfaces can be controled by the same
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* driver.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/protosw.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_types.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#include <uvm/uvm_extern.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/autoconf.h>
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#include <machine/idprom.h>
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#include <dev/ic/i82586reg.h>
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#include <dev/ic/i82586var.h>
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/*
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* the on-board interface
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*/
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struct ieob {
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u_char obctrl;
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};
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#define IEOB_NORSET 0x80 /* don't reset the board */
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#define IEOB_ONAIR 0x40 /* put us on the air */
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#define IEOB_ATTEN 0x20 /* attention! */
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#define IEOB_IENAB 0x10 /* interrupt enable */
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#define IEOB_XXXXX 0x08 /* free bit */
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#define IEOB_XCVRL2 0x04 /* level 2 transceiver? */
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#define IEOB_BUSERR 0x02 /* bus error */
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#define IEOB_INT 0x01 /* interrupt */
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#define IEOB_ADBASE 0x000000 /* KVA base addr of 24 bit address space */
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static void ie_obreset __P((struct ie_softc *, int));
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static void ie_obattend __P((struct ie_softc *, int));
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static void ie_obrun __P((struct ie_softc *));
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int ie_obio_match __P((struct device *, struct cfdata *, void *));
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void ie_obio_attach __P((struct device *, struct device *, void *));
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struct cfattach ie_obio_ca = {
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sizeof(struct ie_softc), ie_obio_match, ie_obio_attach
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};
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/* Supported media */
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static int media[] = {
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IFM_ETHER | IFM_10_2,
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};
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#define NMEDIA (sizeof(media) / sizeof(media[0]))
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/*
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* OBIO ie support routines
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*/
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void
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ie_obreset(sc, what)
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struct ie_softc *sc;
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{
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volatile struct ieob *ieo = (struct ieob *) sc->sc_reg;
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ieo->obctrl = 0;
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delay(100); /* XXX could be shorter? */
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ieo->obctrl = IEOB_NORSET;
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}
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void
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ie_obattend(sc, why)
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struct ie_softc *sc;
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int why;
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{
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volatile struct ieob *ieo = (struct ieob *) sc->sc_reg;
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ieo->obctrl |= IEOB_ATTEN; /* flag! */
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ieo->obctrl &= ~IEOB_ATTEN; /* down. */
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}
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void
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ie_obrun(sc)
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struct ie_softc *sc;
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{
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volatile struct ieob *ieo = (struct ieob *) sc->sc_reg;
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ieo->obctrl |= (IEOB_ONAIR|IEOB_IENAB|IEOB_NORSET);
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}
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void ie_obio_memcopyin __P((struct ie_softc *, void *, int, size_t));
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void ie_obio_memcopyout __P((struct ie_softc *, const void *, int, size_t));
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/*
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* Copy board memory to kernel.
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*/
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void
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ie_obio_memcopyin(sc, p, offset, size)
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struct ie_softc *sc;
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void *p;
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int offset;
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size_t size;
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{
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bus_space_copyin(sc->bt, sc->bh, offset, p, size);
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}
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/*
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* Copy from kernel space to naord memory.
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*/
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void
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ie_obio_memcopyout(sc, p, offset, size)
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struct ie_softc *sc;
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const void *p;
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int offset;
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size_t size;
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{
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bus_space_copyout(sc->bt, sc->bh, offset, p, size);
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}
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/* read a 16-bit value at BH offset */
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u_int16_t ie_obio_read16 __P((struct ie_softc *, int offset));
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/* write a 16-bit value at BH offset */
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void ie_obio_write16 __P((struct ie_softc *, int offset, u_int16_t value));
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void ie_obio_write24 __P((struct ie_softc *, int offset, int addr));
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u_int16_t
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ie_obio_read16(sc, offset)
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struct ie_softc *sc;
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int offset;
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{
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u_int16_t v = bus_space_read_2(sc->bt, sc->bh, offset);
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return (((v&0xff)<<8) | ((v>>8)&0xff));
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}
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void
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ie_obio_write16(sc, offset, v)
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struct ie_softc *sc;
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int offset;
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u_int16_t v;
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{
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v = (((v&0xff)<<8) | ((v>>8)&0xff));
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bus_space_write_2(sc->bt, sc->bh, offset, v);
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}
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void
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ie_obio_write24(sc, offset, addr)
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struct ie_softc *sc;
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int offset;
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int addr;
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{
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u_char *f = (u_char *)&addr;
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u_int16_t v0, v1;
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u_char *t;
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t = (u_char *)&v0;
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t[0] = f[3]; t[1] = f[2];
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bus_space_write_2(sc->bt, sc->bh, offset, v0);
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t = (u_char *)&v1;
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t[0] = f[1]; t[1] = 0;
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bus_space_write_2(sc->bt, sc->bh, offset+2, v1);
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}
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int
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ie_obio_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct obio_attach_args *oba = aux;
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bus_space_handle_t bh;
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int matched;
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u_int8_t ctrl;
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/* No default Multibus address. */
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if (oba->oba_paddr == -1)
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return(0);
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/* Make sure there is something there... */
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if (bus_space_map(oba->oba_bustag, oba->oba_paddr, sizeof(struct ieob),
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0, &bh))
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return (0);
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matched = (!bus_space_poke_1(oba->oba_bustag, bh, 0, IEOB_NORSET) &&
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!bus_space_peek_1(oba->oba_bustag, bh, 0, &ctrl) &&
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(ctrl & (IEOB_ONAIR|IEOB_IENAB)) == 0);
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bus_space_unmap(oba->oba_bustag, bh, sizeof(struct ieob));
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if (!matched)
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return (0);
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/* Default interrupt priority. */
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if (oba->oba_pri == -1)
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oba->oba_pri = 3;
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return (1);
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}
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void
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ie_obio_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct obio_attach_args *oba = aux;
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struct ie_softc *sc = (void *) self;
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bus_dma_tag_t dmatag = oba->oba_dmatag;
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bus_space_handle_t bh;
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bus_dma_segment_t seg;
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int rseg;
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int error;
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paddr_t pa;
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struct intrhand *ih;
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bus_size_t msize;
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u_long iebase;
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u_int8_t myaddr[ETHER_ADDR_LEN];
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sc->bt = oba->oba_bustag;
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sc->hwreset = ie_obreset;
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sc->chan_attn = ie_obattend;
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sc->hwinit = ie_obrun;
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sc->memcopyout = ie_obio_memcopyout;
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sc->memcopyin = ie_obio_memcopyin;
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sc->ie_bus_barrier = NULL;
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sc->ie_bus_read16 = ie_obio_read16;
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sc->ie_bus_write16 = ie_obio_write16;
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sc->ie_bus_write24 = ie_obio_write24;
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sc->sc_msize = msize = 65536; /* XXX */
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if (bus_space_map(oba->oba_bustag, oba->oba_paddr, sizeof(struct ieob),
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0, &bh))
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panic("ie_obio_attach: can't map regs");
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sc->sc_reg = (void *)bh;
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/*
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* Allocate control & buffer memory.
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*/
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if ((error = bus_dmamap_create(dmatag, msize, 1, msize, 0,
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BUS_DMA_NOWAIT|BUS_DMA_24BIT,
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&sc->sc_dmamap)) != 0) {
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printf("%s: DMA map create error %d\n",
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sc->sc_dev.dv_xname, error);
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return;
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}
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if ((error = bus_dmamem_alloc(dmatag, msize, 64*1024, 0,
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&seg, 1, &rseg,
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BUS_DMA_NOWAIT | BUS_DMA_24BIT)) != 0) {
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printf("%s: DMA memory allocation error %d\n",
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self->dv_xname, error);
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return;
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}
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/* Map DMA buffer in CPU addressable space */
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if ((error = bus_dmamem_map(dmatag, &seg, rseg, msize,
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(caddr_t *)&sc->sc_maddr,
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BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
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printf("%s: DMA buffer map error %d\n",
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sc->sc_dev.dv_xname, error);
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bus_dmamem_free(dmatag, &seg, rseg);
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return;
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}
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/* Load the segment */
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if ((error = bus_dmamap_load(dmatag, sc->sc_dmamap,
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sc->sc_maddr, msize, NULL,
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BUS_DMA_NOWAIT)) != 0) {
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printf("%s: DMA buffer map load error %d\n",
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sc->sc_dev.dv_xname, error);
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bus_dmamem_unmap(dmatag, sc->sc_maddr, msize);
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bus_dmamem_free(dmatag, &seg, rseg);
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return;
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}
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w16zero(sc->sc_maddr, msize);
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sc->bh = (bus_space_handle_t)(sc->sc_maddr);
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/*
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* The i82586's 24-bit address space maps to all of
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* KVA space (). In addition, the SCP must appear
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* at IE_SCP_ADDR within the 24-bit address space,
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* i.e. at KVA IEOB_ADBASE+IE_SCP_ADDR, at the very top of
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* kernel space. We double-map this last page to the first
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* page (starting at `maddr') of the memory we allocate to the chip.
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* (a side-effect of this double-map is that the ISCP and SCB
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* structures also get aliased there, but we ignore this). The
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* first page at `maddr' is only used for ISCP, SCB and the aliased
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* SCP; the actual buffers start at maddr+NBPG.
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*
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* In a picture:
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|---//--- ISCP-SCB-----scp-|--//- buffers -//-|... |iscp-scb-----SCP-|
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| | | | | | |
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| |<----- NBPG --->| | |<----- NBPG -+-->|
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| |<------------- msize ------------->| | ^ |
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| | | |
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| \@maddr (last page dbl mapped)
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\@IEOB_ADBASE @IEOB_ADBASE+IE_SCP_ADDR-+
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*
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*/
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/* Double map the SCP */
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if (pmap_extract(pmap_kernel(), (vaddr_t)sc->sc_maddr, &pa) == FALSE)
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panic("ie pmap_extract");
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pmap_enter(pmap_kernel(), m68k_trunc_page(IEOB_ADBASE+IE_SCP_ADDR),
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pa | PMAP_NC /*| PMAP_IOC*/,
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VM_PROT_READ | VM_PROT_WRITE, PMAP_WIRED);
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/* Map iscp at location 0 (relative to `maddr') */
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sc->iscp = 0;
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/* scb follows iscp */
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sc->scb = IE_ISCP_SZ;
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/* scp is at the fixed location IE_SCP_ADDR (modulo the page size) */
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sc->scp = IE_SCP_ADDR & PGOFSET;
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/* Calculate the 24-bit base of i82586 operations */
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iebase = (u_long)sc->sc_dmamap->dm_segs[0].ds_addr -
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(u_long)IEOB_ADBASE;
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ie_obio_write16(sc, IE_ISCP_SCB(sc->iscp), sc->scb);
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ie_obio_write24(sc, IE_ISCP_BASE(sc->iscp), iebase);
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ie_obio_write24(sc, IE_SCP_ISCP(sc->scp), iebase + sc->iscp);
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/*
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* Rest of first page is unused (wasted!); the other pages
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* are used for buffers.
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*/
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sc->buf_area = NBPG;
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sc->buf_area_sz = msize - NBPG;
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if (i82586_proberam(sc) == 0) {
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printf(": memory probe failed\n");
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return;
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}
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idprom_etheraddr(myaddr);
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i82586_attach(sc, "onboard", myaddr, media, NMEDIA, media[0]);
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/* Establish interrupt channel */
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ih = bus_intr_establish(oba->oba_bustag,
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oba->oba_pri, IPL_NET, 0,
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i82586_intr, sc);
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}
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