81 lines
2.8 KiB
C
81 lines
2.8 KiB
C
/* $NetBSD: s3c2xx0var.h,v 1.7 2012/01/30 03:28:33 nisimura Exp $ */
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/*
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* Copyright (c) 2002 Fujitsu Component Limited
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* Copyright (c) 2002 Genetec Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of The Fujitsu Component Limited nor the name of
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* Genetec corporation may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
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* CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
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* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
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* CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
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* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _ARM_S3C2XX0VAR_H_
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#define _ARM_S3C2XX0VAR_H_
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#include <sys/bus.h>
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#include <sys/device.h>
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struct s3c2xx0_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_intctl_ioh;
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bus_space_handle_t sc_memctl_ioh; /* Memory controller */
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bus_space_handle_t sc_clkman_ioh; /* Clock manager */
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bus_space_handle_t sc_gpio_ioh; /* GPIO */
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bus_space_handle_t sc_rtc_ioh; /* real time clock */
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bus_space_handle_t sc_dmach; /* DMA Controller */
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bus_dma_tag_t sc_dmat;
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/* clock frequency */
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int sc_fclk; /* CPU clock */
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int sc_hclk; /* AHB bus clock */
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int sc_pclk; /* peripheral clock */
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};
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typedef void *s3c2xx0_chipset_tag_t;
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struct s3c2xx0_attach_args {
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s3c2xx0_chipset_tag_t sa_sc;
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bus_space_tag_t sa_iot;
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bus_addr_t sa_addr;
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bus_size_t sa_size;
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int sa_intr;
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int sa_index;
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bus_dma_tag_t sa_dmat;
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};
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extern struct bus_space s3c2xx0_bs_tag;
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extern struct s3c2xx0_softc *s3c2xx0_softc;
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extern struct arm32_bus_dma_tag s3c2xx0_bus_dma;
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/* Platform needs to provide this */
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bus_dma_tag_t s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *);
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#endif /* _ARM_S3C2XX0VAR_H_ */
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