89 lines
3.3 KiB
C
89 lines
3.3 KiB
C
/* $NetBSD: bt462reg.h,v 1.1 2010/06/24 03:30:36 macallan Exp $ */
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/*-
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* Copyright (c) 2010 Michael Lorenz
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* register definitions for the Bt461/Bt462 RAMDAC
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*
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* There are four registers, how exactly to access them depends on the host so
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* we don't provide constants for them. All registers are 8 bit wide:
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* - register 0 provides the lower 8 index bits
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* - register 1 provides the upper 2 index bits
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* - register 2 accesses the alternate colour map ( 256 entries ), overlay
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* colour map ( 32 enttries ) and control registers
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* - register 3 accesses the main colour map ( 1024 entries )
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*/
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#ifndef BT462REG_H
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#define BT462REG_H
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/* offsets for register 2 */
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#define BT462_ALT_CMAP 0x0000
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#define BT462_OVL_CMAP 0x0100
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#define BT462_ID 0x0200
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#define ID_BT461 0x4d
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#define ID_BT462 0x4c
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#define BT462_CMD_0 0x0201
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#define BT462_C0_BLINK_16_48 0x00
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#define BT462_C0_BLINK_16_16 0x04
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#define BT462_C0_BLINK_32_32 0x08
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#define BT462_C0_BLINK_64_64 0x0c
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#define BT462_C0_ALT_ENABLE 0x10
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#define BT462_C0_OVL_OPAQUE 0x20 /* use ovl 0, not cmap */
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#define BT462_C0_MULT_3_1 0x00
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#define BT462_C0_MULT_4_1 0x40
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#define BT462_C0_MULT_5_1 0xc0
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#define BT462_CMD_1 0x0202
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#define BT462_C1_PAN_0 0x00
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#define BT462_C1_PAN_1 0x20
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#define BT462_C1_PAN_2 0x40
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#define BT462_C1_PAN_3 0x80
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#define BT462_C1_PAN_4 0xa0
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#define BT462_CMD_2 0x0203
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#define BT462_C2_TEST_ENABLE 0x01
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#define BT462_C2_UNDERLAY_EN 0x04 /* Bt462 only */
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#define BT462_C2_PLL_USE_BLANK 0x08 /* SYNC otherwise */
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#define BT462_C2_LOAD_ALWAYS 0x00
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#define BT462_C2_LOAD_ON_RED 0x10
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#define BT462_C2_LOAD_ON_GREEN 0x20
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#define BT462_C2_LOAD_ON_BLUE 0x30
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#define BT462_C2_PEDESTAL_EN 0x40
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#define BT462_C2_SYNC_ENABLE 0x80
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#define BT462_PIXEL_READ_MSK_L 0x0204
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#define BT462_PIXEL_READ_MSK_H 0x0205
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#define BT462_PIXEL_BLNK_MSK_L 0x0206
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#define BT462_PIXEL_BLNK_MSK_H 0x0207
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#define BT462_OVL_READ_MSK 0x0208
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#define BT462_OVL_BLNK_MSK 0x0209
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#define BT462_TEST 0x020c
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#endif /* BT462REG_H */
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