106 lines
3.8 KiB
C
106 lines
3.8 KiB
C
/* $NetBSD: ahcisatavar.h,v 1.7 2010/07/27 22:07:50 jakllsch Exp $ */
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/*
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* Copyright (c) 2006 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <dev/ic/ahcisatareg.h>
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#define AHCI_DEBUG
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#define DEBUG_INTR 0x01
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#define DEBUG_XFERS 0x02
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#define DEBUG_FUNCS 0x08
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#define DEBUG_PROBE 0x10
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#define DEBUG_DETACH 0x20
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#ifdef AHCI_DEBUG
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extern int ahcidebug_mask;
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#define AHCIDEBUG_PRINT(args, level) \
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if (ahcidebug_mask & (level)) \
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printf args
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#else
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#define AHCIDEBUG_PRINT(args, level)
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#endif
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struct ahci_softc {
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struct atac_softc sc_atac;
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bus_space_tag_t sc_ahcit; /* ahci registers mapping */
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bus_space_handle_t sc_ahcih;
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bus_size_t sc_ahcis;
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bus_dma_tag_t sc_dmat; /* DMA memory mappings: */
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void *sc_cmd_hdr; /* command tables and received FIS */
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bus_dmamap_t sc_cmd_hdrd;
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bus_dma_segment_t sc_cmd_hdr_seg;
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int sc_cmd_hdr_nseg;
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int sc_atac_capflags;
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int sc_ncmds; /* number of command slots */
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struct ata_channel *sc_chanarray[AHCI_MAX_PORTS];
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struct ahci_channel {
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struct ata_channel ata_channel; /* generic part */
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bus_space_handle_t ahcic_scontrol;
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bus_space_handle_t ahcic_sstatus;
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bus_space_handle_t ahcic_serror;
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/* pointers allocated from sc_cmd_hdrd */
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struct ahci_r_fis *ahcic_rfis; /* received FIS */
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bus_addr_t ahcic_bus_rfis;
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struct ahci_cmd_header *ahcic_cmdh; /* command headers */
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bus_addr_t ahcic_bus_cmdh;
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/* command tables (allocated per-channel) */
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bus_dmamap_t ahcic_cmd_tbld;
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bus_dma_segment_t ahcic_cmd_tbl_seg;
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int ahcic_cmd_tbl_nseg;
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struct ahci_cmd_tbl *ahcic_cmd_tbl[AHCI_MAX_CMDS];
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bus_addr_t ahcic_bus_cmd_tbl[AHCI_MAX_CMDS];
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bus_dmamap_t ahcic_datad[AHCI_MAX_CMDS];
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uint32_t ahcic_cmds_active; /* active commands */
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} sc_channels[AHCI_MAX_PORTS];
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};
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#define AHCINAME(sc) (device_xname((sc)->sc_atac.atac_dev))
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#define AHCI_CMDH_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
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(sc)->sc_cmd_hdrd, \
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(char *)(&(achp)->ahcic_cmdh[(cmd)]) - (char *)(sc)->sc_cmd_hdr, \
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sizeof(struct ahci_cmd_header), (op))
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#define AHCI_RFIS_SYNC(sc, achp, op) bus_dmamap_sync((sc)->sc_dmat, \
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(sc)->sc_cmd_hdrd, (void *)(achp)->ahcic_rfis - (sc)->sc_cmd_hdr, \
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AHCI_RFIS_SIZE, (op))
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#define AHCI_CMDTBL_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
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(achp)->ahcic_cmd_tbld, AHCI_CMDTBL_SIZE * (cmd), \
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AHCI_CMDTBL_SIZE, (op))
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#define AHCI_READ(sc, reg) bus_space_read_4((sc)->sc_ahcit, \
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(sc)->sc_ahcih, (reg))
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#define AHCI_WRITE(sc, reg, val) bus_space_write_4((sc)->sc_ahcit, \
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(sc)->sc_ahcih, (reg), (val))
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void ahci_attach(struct ahci_softc *);
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int ahci_detach(struct ahci_softc *, int);
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void ahci_resume(struct ahci_softc *);
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int ahci_intr(void *);
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