400 lines
10 KiB
C
400 lines
10 KiB
C
/* $NetBSD: if_we_pnpbus.c,v 1.5 2009/03/14 21:04:14 dsl Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Device driver for National Semiconductor DS8390/WD83C690 based ethernet
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* adapters.
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*
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* Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
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*
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* Copyright (C) 1993, David Greenman. This software may be used, modified,
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* copied, distributed, and sold, in both source and binary form provided that
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* the above copyright and these terms are retained. Under no circumstances is
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* the author responsible for the proper functioning of this software, nor does
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* the author assume any responsibility for damages incurred with its use.
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*/
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/*
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* Device driver for the Western Digital/SMC 8003 and 8013 series,
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* and the SMC Elite Ultra (8216).
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_we_pnpbus.c,v 1.5 2009/03/14 21:04:14 dsl Exp $");
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/socket.h>
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#include <sys/mbuf.h>
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#include <sys/syslog.h>
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#include <sys/bswap.h>
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#include <net/if.h>
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#include <net/if_dl.h>
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#include <net/if_types.h>
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#include <net/if_media.h>
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#include <net/if_ether.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/isa_machdep.h>
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#include <machine/residual.h>
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#include <dev/ic/dp8390reg.h>
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#include <dev/ic/dp8390var.h>
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#include <dev/ic/wereg.h>
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#include <dev/ic/wevar.h>
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#include <prep/pnpbus/pnpbusvar.h>
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int we_pnpbus_probe(struct device *, struct cfdata *, void *);
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void we_pnpbus_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(we_pnpbus, sizeof(struct we_softc),
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we_pnpbus_probe, we_pnpbus_attach, NULL, NULL);
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extern struct cfdriver we_cd;
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static const char *we_params(bus_space_tag_t, bus_space_handle_t,
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u_int8_t *, bus_size_t *, u_int8_t *, int *);
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#define WE_DEFAULT_IOMEM 0xe4000
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/*
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* Delay needed when switching 16-bit access to shared memory.
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*/
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#define WE_DELAY(wsc) delay(3)
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/*
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* Enable card RAM, and 16-bit access.
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*/
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#define WE_MEM_ENABLE(wsc) \
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do { \
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if ((wsc)->sc_16bitp) \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_LAAR, (wsc)->sc_laar_proto | WE_LAAR_M16EN); \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_MSR, wsc->sc_msr_proto | WE_MSR_MENB); \
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WE_DELAY((wsc)); \
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} while (0)
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/*
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* Disable card RAM, and 16-bit access.
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*/
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#define WE_MEM_DISABLE(wsc) \
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do { \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_MSR, (wsc)->sc_msr_proto); \
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if ((wsc)->sc_16bitp) \
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bus_space_write_1((wsc)->sc_asict, (wsc)->sc_asich, \
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WE_LAAR, (wsc)->sc_laar_proto); \
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WE_DELAY((wsc)); \
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} while (0)
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int
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we_pnpbus_probe(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct pnpbus_dev_attach_args *pna = aux;
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int ret = 0;
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if (strcmp(pna->pna_devid, "IBM2001") == 0)
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ret = 1;
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if (strcmp(pna->pna_devid, "IBM0010") == 0)
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ret = 1;
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if (ret)
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pnpbus_scan(pna, pna->pna_ppc_dev);
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return ret;
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}
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void
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we_pnpbus_attach(struct device *parent, struct device *self, void *aux)
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{
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struct we_softc *wsc = (struct we_softc *)self;
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struct dp8390_softc *sc = &wsc->sc_dp8390;
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struct pnpbus_dev_attach_args *pna = aux;
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struct pnpbus_irq *irq;
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bus_space_tag_t nict, asict, memt;
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bus_space_handle_t nich, asich, memh;
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bus_size_t memsize = 0x4000;
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const char *typestr;
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int memfound = 0, i, irqnum;
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nict = asict = pna->pna_iot;
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memt = pna->pna_memt;
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aprint_normal("\n");
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if (pnpbus_io_map(&pna->pna_res, 0, &asict, &asich)) {
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aprint_error("%s: can't map nic i/o space\n",
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device_xname(self));
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return;
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}
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if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS,
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&nich)) {
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aprint_error("%s: can't subregion i/o space\n",
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device_xname(self));
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return;
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}
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typestr = we_params(asict, asich, &wsc->sc_type, &memsize,
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&wsc->sc_flags, &sc->is790);
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if (typestr == NULL) {
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aprint_error("%s: where did the card go?\n",
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device_xname(self));
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return;
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}
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/*
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* Map memory space. See if any was allocated via PNP, if not, use
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* the default.
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*/
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if (pnpbus_iomem_map(&pna->pna_res, 0, &memt, &memh) == 0)
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memfound = 1;
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else if (bus_space_map(memt, WE_DEFAULT_IOMEM, memsize, 0, &memh)) {
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aprint_error("%s: can't map shared memory\n",
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device_xname(self));
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return;
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}
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wsc->sc_asict = asict;
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wsc->sc_asich = asich;
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sc->sc_regt = nict;
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sc->sc_regh = nich;
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sc->sc_buft = memt;
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sc->sc_bufh = memh;
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if (memfound)
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pnpbus_getiomem(&pna->pna_res, 0, &wsc->sc_maddr,
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&sc->mem_size);
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else {
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wsc->sc_maddr = WE_DEFAULT_IOMEM;
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sc->mem_size = memsize;
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}
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/* Interface is always enabled. */
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sc->sc_enabled = 1;
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if (we_config(self, wsc, typestr))
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return;
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/*
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* Enable the configured interrupt.
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*/
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#if 0
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if (sc->is790)
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bus_space_write_1(asict, asich, WE790_ICR,
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bus_space_read_1(asict, asich, WE790_ICR) |
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WE790_ICR_EIL);
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else if (wsc->sc_type & WE_SOFTCONFIG)
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bus_space_write_1(asict, asich, WE_IRR,
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bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN);
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#endif
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/*
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* Establish interrupt handler.
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* Loop through all probed IRQs until one looks sane.
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*/
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for (i = 0, irq = SIMPLEQ_FIRST(&pna->pna_res.irq);
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i < pna->pna_res.numirq; i++, irq = SIMPLEQ_NEXT(irq, next)) {
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irqnum = ffs(irq->mask) - 1;
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/* some cards think they are level. force them to edge */
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if (irq->flags & 0x0c)
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irq->flags = 0x01;
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if (!LEGAL_IRQ(irqnum))
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continue;
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if (irqnum < 2)
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continue;
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break;
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}
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wsc->sc_ih = pnpbus_intr_establish(i, IPL_NET, IST_PNP, dp8390_intr, sc,
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&pna->pna_res);
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if (wsc->sc_ih == NULL)
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aprint_error("%s: can't establish interrupt\n",
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device_xname(self));
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}
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static const char *
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we_params(bus_space_tag_t asict, bus_space_handle_t asich, u_int8_t *typep, bus_size_t *memsizep, u_int8_t *flagp, int *is790p)
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{
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const char *typestr;
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bus_size_t memsize;
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int is16bit, is790;
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u_int8_t type;
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memsize = 8192;
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is16bit = is790 = 0;
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type = bus_space_read_1(asict, asich, WE_CARD_ID);
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switch (type) {
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case WE_TYPE_WD8003S:
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typestr = "WD8003S";
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break;
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case WE_TYPE_WD8003E:
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typestr = "WD8003E";
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break;
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case WE_TYPE_WD8003EB:
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typestr = "WD8003EB";
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break;
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case WE_TYPE_WD8003W:
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typestr = "WD8003W";
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break;
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case WE_TYPE_WD8013EBT:
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typestr = "WD8013EBT";
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memsize = 16384;
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is16bit = 1;
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break;
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case WE_TYPE_WD8013W:
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typestr = "WD8013W";
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memsize = 16384;
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is16bit = 1;
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break;
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case WE_TYPE_WD8013EP: /* also WD8003EP */
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if (bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) {
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is16bit = 1;
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memsize = 16384;
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typestr = "WD8013EP";
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} else
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typestr = "WD8003EP";
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break;
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case WE_TYPE_WD8013WC:
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typestr = "WD8013WC";
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memsize = 16384;
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is16bit = 1;
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break;
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case WE_TYPE_WD8013EBP:
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typestr = "WD8013EBP";
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memsize = 16384;
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is16bit = 1;
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break;
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case WE_TYPE_WD8013EPC:
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typestr = "WD8013EPC";
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memsize = 16384;
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is16bit = 1;
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break;
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case WE_TYPE_SMC8216C:
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case WE_TYPE_SMC8216T:
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{
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u_int8_t hwr;
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typestr = (type == WE_TYPE_SMC8216C) ?
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"SMC8216/SMC8216C" : "SMC8216T";
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hwr = bus_space_read_1(asict, asich, WE790_HWR);
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bus_space_write_1(asict, asich, WE790_HWR,
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hwr | WE790_HWR_SWH);
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switch (bus_space_read_1(asict, asich, WE790_RAR) &
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WE790_RAR_SZ64) {
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case WE790_RAR_SZ64:
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memsize = 65536;
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break;
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case WE790_RAR_SZ32:
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memsize = 32768;
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break;
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case WE790_RAR_SZ16:
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memsize = 16384;
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break;
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case WE790_RAR_SZ8:
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/* 8216 has 16K shared mem -- 8416 has 8K */
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typestr = (type == WE_TYPE_SMC8216C) ?
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"SMC8416C/SMC8416BT" : "SMC8416T";
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memsize = 8192;
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break;
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}
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bus_space_write_1(asict, asich, WE790_HWR, hwr);
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is16bit = 1;
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is790 = 1;
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break;
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}
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#ifdef TOSH_ETHER
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case WE_TYPE_TOSHIBA1:
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typestr = "Toshiba1";
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memsize = 32768;
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is16bit = 1;
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break;
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case WE_TYPE_TOSHIBA4:
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typestr = "Toshiba4";
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memsize = 32768;
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is16bit = 1;
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break;
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#endif
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default:
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/* Not one we recognize. */
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return (NULL);
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}
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/*
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* Make some adjustments to initial values depending on what is
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* found in the ICR.
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*/
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if (is16bit && (type != WE_TYPE_WD8013EBT) &&
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#ifdef TOSH_ETHER
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(type != WE_TYPE_TOSHIBA1 && type != WE_TYPE_TOSHIBA4) &&
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#endif
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(bus_space_read_1(asict, asich, WE_ICR) & WE_ICR_16BIT) == 0) {
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is16bit = 0;
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memsize = 8192;
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}
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#ifdef WE_DEBUG
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{
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int i;
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aprint_debug("we_params: type = 0x%x, typestr = %s,"
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" is16bit = %d, memsize = %d\n", type, typestr, is16bit,
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memsize);
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for (i = 0; i < 8; i++)
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aprint_debug(" %d -> 0x%x\n", i,
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bus_space_read_1(asict, asich, i));
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}
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#endif
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if (typep != NULL)
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*typep = type;
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if (memsizep != NULL)
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*memsizep = memsize;
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if (flagp != NULL && is16bit)
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*flagp |= WE_16BIT_ENABLE;
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if (is790p != NULL)
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*is790p = is790;
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return (typestr);
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}
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