8eaf47c146
dependencies; instead include it in the 4 driver files that need it, and reorder it in machdep.c
417 lines
9.5 KiB
C
417 lines
9.5 KiB
C
/* $NetBSD: zs_hb.c,v 1.27 2016/07/21 19:49:58 christos Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Gordon W. Ross.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Zilog Z8530 Dual UART driver (machine-dependent part)
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*
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* Runs two serial lines per chip using slave drivers.
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* Plain tty/async lines use the zs_async slave.
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* Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: zs_hb.c,v 1.27 2016/07/21 19:49:58 christos Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/tty.h>
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#include <sys/conf.h>
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#include <sys/cpu.h>
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#include <sys/intr.h>
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#include <mips/locore.h>
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#include <machine/adrsmap.h>
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#include <machine/z8530var.h>
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#include <dev/cons.h>
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#include <dev/ic/z8530reg.h>
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#include <newsmips/dev/hbvar.h>
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#include "zsc.h" /* NZSC */
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#define NZS NZSC
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/* Make life easier for the initialized arrays here. */
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#if NZS < 2
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#undef NZS
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#define NZS 2
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#endif
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#define ZSCFLAG_EX 0x01 /* expansion board */
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/*
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* The news3400 provides a 4.9152 MHz clock to the ZS chips.
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*/
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#define PCLK (9600 * 512) /* PCLK pin input clock rate */
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#define PCLK_EX (9600 * 384)
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/*
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* Define interrupt levels.
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*/
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#define ZSHARD_PRI 64
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#define ZS_DELAY() {(void)*(volatile char *)INTEN1; delay(2);}
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/* The layout of this is hardware-dependent (padding, order). */
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struct zschan {
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volatile uint8_t zc_csr; /* ctrl,status, and indirect access */
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volatile uint8_t zc_data; /* data */
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};
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struct zsdevice {
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/* Yes, they are backwards. */
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struct zschan zs_chan_b;
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struct zschan zs_chan_a;
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};
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extern int zs_def_cflag;
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static struct zsdevice *zsaddr[NZS];
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/* Flags from cninit() */
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static int zs_hwflags[NZS][2];
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/* Default speed for all channels */
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static int zs_defspeed = 9600;
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static uint8_t zs_init_reg[16] = {
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0, /* 0: CMD (reset, etc.) */
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0, /* 1: No interrupts yet. */
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ZSHARD_PRI, /* IVECT */
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ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
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ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
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ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
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0, /* 6: TXSYNC/SYNCLO */
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0, /* 7: RXSYNC/SYNCHI */
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0, /* 8: alias for data port */
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ZSWR9_MASTER_IE,
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0, /*10: Misc. TX/RX control bits */
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ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
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((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
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0, /*13: BAUDHI (default=9600) */
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ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
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ZSWR15_BREAK_IE,
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};
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static struct zschan * zs_get_chan_addr(int, int);
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static void zs_hb_delay(void);
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static int zshard_hb(void *);
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static int zs_getc(void *);
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static void zs_putc(void *, int);
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struct zschan *
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zs_get_chan_addr(int zs_unit, int channel)
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{
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struct zsdevice *addr;
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struct zschan *zc;
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if (zs_unit >= NZS)
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return NULL;
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addr = zsaddr[zs_unit];
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if (addr == NULL)
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return NULL;
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if (channel == 0) {
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zc = &addr->zs_chan_a;
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} else {
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zc = &addr->zs_chan_b;
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}
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return zc;
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}
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static void
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zs_hb_delay(void)
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{
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ZS_DELAY();
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}
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/****************************************************************
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* Autoconfig
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****************************************************************/
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/* Definition of the driver for autoconfig. */
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int zs_hb_match(device_t, cfdata_t, void *);
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void zs_hb_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(zsc_hb, sizeof(struct zsc_softc),
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zs_hb_match, zs_hb_attach, NULL, NULL);
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/*
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* Is the zs chip present?
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*/
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int
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zs_hb_match(device_t parent, cfdata_t cf, void *aux)
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{
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struct hb_attach_args *ha = aux;
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if (strcmp(ha->ha_name, "zsc"))
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return 0;
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/* This returns -1 on a fault (bus error). */
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if (hb_badaddr((char *)ha->ha_addr, 1))
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return 0;
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return 1;
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}
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/*
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* Attach a found zs.
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*
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* Match slave number to zs unit number, so that misconfiguration will
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* not set up the keyboard as ttya, etc.
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*/
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void
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zs_hb_attach(device_t parent, device_t self, void *aux)
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{
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struct zsc_softc *zsc = device_private(self);
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struct hb_attach_args *ha = aux;
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struct zsc_attach_args zsc_args;
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volatile struct zschan *zc;
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struct zs_chanstate *cs;
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int s, zs_unit, channel, intlevel;
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zsc->zsc_dev = self;
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zs_unit = device_unit(self);
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intlevel = ha->ha_level;
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zsaddr[zs_unit] = (void *)ha->ha_addr;
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if (intlevel == -1) {
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#if 0
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aprint_error(": interrupt level not configured\n");
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return;
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#else
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aprint_error(": interrupt level not configured; using");
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intlevel = 1;
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#endif
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}
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aprint_error(" level %d\n", intlevel);
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zs_delay = zs_hb_delay;
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/*
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* Initialize software state for each channel.
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*/
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for (channel = 0; channel < 2; channel++) {
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zsc_args.channel = channel;
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zsc_args.hwflags = zs_hwflags[zs_unit][channel];
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cs = &zsc->zsc_cs_store[channel];
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zsc->zsc_cs[channel] = cs;
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zs_lock_init(cs);
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cs->cs_channel = channel;
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cs->cs_private = NULL;
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cs->cs_ops = &zsops_null;
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if ((device_cfdata(self)->cf_flags & ZSCFLAG_EX) == 0)
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cs->cs_brg_clk = PCLK / 16;
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else
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cs->cs_brg_clk = PCLK_EX / 16;
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zc = zs_get_chan_addr(zs_unit, channel);
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cs->cs_reg_csr = &zc->zc_csr;
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cs->cs_reg_data = &zc->zc_data;
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memcpy(cs->cs_creg, zs_init_reg, 16);
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memcpy(cs->cs_preg, zs_init_reg, 16);
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/* XXX: Get these from the EEPROM instead? */
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/* XXX: See the mvme167 code. Better. */
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if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
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cs->cs_defspeed = zs_get_speed(cs);
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else
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cs->cs_defspeed = zs_defspeed;
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cs->cs_defcflag = zs_def_cflag;
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/* Make these correspond to cs_defcflag (-crtscts) */
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cs->cs_rr0_dcd = ZSRR0_DCD;
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cs->cs_rr0_cts = 0;
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cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
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cs->cs_wr5_rts = 0;
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/*
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* Clear the master interrupt enable.
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* The INTENA is common to both channels,
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* so just do it on the A channel.
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*/
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if (channel == 0) {
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zs_write_reg(cs, 9, 0);
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}
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/*
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* Look for a child driver for this channel.
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* The child attach will setup the hardware.
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*/
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if (!config_found(self, (void *)&zsc_args, zs_print)) {
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/* No sub-driver. Just reset it. */
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uint8_t reset = (channel == 0) ?
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ZSWR9_A_RESET : ZSWR9_B_RESET;
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s = splhigh();
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zs_write_reg(cs, 9, reset);
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splx(s);
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}
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}
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/*
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* Now safe to install interrupt handlers. Note the arguments
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* to the interrupt handlers aren't used. Note, we only do this
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* once since both SCCs interrupt at the same level and vector.
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*/
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zsc->zsc_si = softint_establish(SOFTINT_SERIAL,
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(void (*)(void *))zsc_intr_soft, zsc);
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hb_intr_establish(intlevel, INTST1_SCC, IPL_SERIAL, zshard_hb, zsc);
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/* XXX; evcnt_attach() ? */
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/*
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* Set the master interrupt enable and interrupt vector.
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* (common to both channels, do it on A)
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*/
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cs = zsc->zsc_cs[0];
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s = splhigh();
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/* interrupt vector */
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zs_write_reg(cs, 2, zs_init_reg[2]);
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/* master interrupt control (enable) */
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zs_write_reg(cs, 9, zs_init_reg[9]);
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splx(s);
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}
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static int
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zshard_hb(void *arg)
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{
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int rv;
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(void) *(volatile u_char *)SCCVECT;
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rv = zshard(arg);
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/* XXX news3400 sometimes losts zs interrupt */
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if (rv)
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zshard(arg);
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return rv;
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}
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/*
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* Polled input char.
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*/
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int
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zs_getc(void *arg)
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{
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volatile struct zschan *zc = arg;
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int s, c, rr0;
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s = splhigh();
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/* Wait for a character to arrive. */
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do {
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rr0 = zc->zc_csr;
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ZS_DELAY();
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} while ((rr0 & ZSRR0_RX_READY) == 0);
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c = zc->zc_data;
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ZS_DELAY();
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splx(s);
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/*
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* This is used by the kd driver to read scan codes,
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* so don't translate '\r' ==> '\n' here...
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*/
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return c;
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}
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/*
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* Polled output char.
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*/
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void
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zs_putc(void *arg, int c)
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{
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volatile struct zschan *zc = arg;
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int s, rr0;
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s = splhigh();
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/* Wait for transmitter to become ready. */
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do {
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rr0 = zc->zc_csr;
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ZS_DELAY();
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} while ((rr0 & ZSRR0_TX_READY) == 0);
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zc->zc_data = c;
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ZS_DELAY();
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splx(s);
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}
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/*****************************************************************/
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static void zscnprobe(struct consdev *);
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static void zscninit(struct consdev *);
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static int zscngetc(dev_t);
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static void zscnputc(dev_t, int);
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struct consdev consdev_zs = {
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zscnprobe,
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zscninit,
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zscngetc,
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zscnputc,
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nullcnpollc,
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NULL,
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NULL,
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NULL,
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NODEV,
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CN_DEAD
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};
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static void
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zscnprobe(struct consdev *cn)
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{
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}
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static void
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zscninit(struct consdev *cn)
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{
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extern const struct cdevsw zstty_cdevsw;
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cn->cn_dev = makedev(cdevsw_lookup_major(&zstty_cdevsw), 0);
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cn->cn_pri = CN_REMOTE;
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zs_hwflags[0][0] = ZS_HWFLAG_CONSOLE;
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}
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static int
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zscngetc(dev_t dev)
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{
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return zs_getc((void *)SCCPORT0A);
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}
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static void
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zscnputc(dev_t dev, int c)
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{
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zs_putc((void *)SCCPORT0A, c);
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}
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