113 lines
4.2 KiB
C
113 lines
4.2 KiB
C
/* $NetBSD: imxusbreg.h,v 1.5 2016/05/17 06:44:46 ryo Exp $ */
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/*
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* Copyright (c) 2009, 2010 Genetec Corporation. All rights reserved.
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* Written by Hashimoto Kenichi for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ARM_IMX_IMXUSBREG_H
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#define _ARM_IMX_IMXUSBREG_H
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#define IMXUSB_ID 0x0000
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#define IMXUSB_ID_ID __BITS(5,0)
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#define IMXUSB_ID_REVISION __BITS(23,16)
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#define IMXUSB_HWGENERAL 0x0004
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#define IMXUSB_HWHOST 0x0008
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#define HWHOST_HC __BIT(0)
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#define HWHOST_NPORT __BITS(3,1)
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#define IMXUSB_HWDEVICE 0x000c
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#define HWDEVICE_DC __BIT(0)
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#define HWDEVICE_DEVEP __BITS(5,1)
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#define IMXUSB_HWTXBUF 0x0010
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#define IMXUSB_HWRXBUF 0x0014
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#define IMXUSB_EHCIREGS 0x0100
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#define IMXUSB_ULPIVIEW 0x0170
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#define ULPI_WU __BIT(31)
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#define ULPI_RUN __BIT(30)
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#define ULPI_RW __BIT(29)
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#define ULPI_SS __BIT(27)
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#define ULPI_PORT __BITS(26,24)
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#define ULPI_ADDR __BITS(23,16)
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#define ULPI_DATRD __BITS(15,8)
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#define ULPI_DATWR __BITS(7,0)
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#define IMXUSB_OTGSC 0x01A4
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#define OTGSC_DPIE __BIT(30)
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#define OTGSC_1MSE __BIT(29)
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#define OTGSC_BSEIE __BIT(28)
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#define OTGSC_BSVIE __BIT(27)
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#define OTGSC_ASVIE __BIT(26)
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#define OTGSC_AVVIE __BIT(25)
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#define OTGSC_IDIE __BIT(24)
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#define OTGSC_DPIS __BIT(22)
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#define OTGSC_1MSS __BIT(21)
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#define OTGSC_BSEIS __BIT(20)
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#define OTGSC_BSVIS __BIT(19)
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#define OTGSC_ASVIS __BIT(18)
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#define OTGSC_AVVIS __BIT(17)
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#define OTGSC_IDIS __BIT(16)
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#define OTGSC_DPS __BIT(14)
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#define OTGSC_1MST __BIT(13)
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#define OTGSC_BSE __BIT(12)
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#define OTGSC_BSV __BIT(11)
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#define OTGSC_ASV __BIT(10)
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#define OTGSC_AVV __BIT( 9)
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#define OTGSC_ID __BIT( 8)
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#define OTGSC_IDPU __BIT( 5)
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#define OTGSC_DP __BIT( 4)
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#define OTGSC_OT __BIT( 3)
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#define OTGSC_VC __BIT( 1)
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#define OTGSC_VD __BIT( 0)
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#define IMXUSB_USBMODE 0x01A8
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#define USBMODE_VBPS __BIT(5) /* Vbus power selectt */
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#define USBMODE_SDIS __BIT(4) /* Stream disable mode 1=act */
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#define USBMODE_SLOM __BIT(3) /* setup lockouts on */
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#define USBMODE_ES __BIT(2) /* Endian Select ES=1 */
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#define USBMODE_CM __BITS(1,0) /* Controller mode */
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#define USBMODE_CM_IDLE __SHIFTIN(0,USBMODE_CM)
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#define USBMODE_CM_DEVICE __SHIFTIN(2,USBMODE_CM)
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#define USBMODE_CM_HOST __SHIFTIN(3,USBMODE_CM)
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#define IMXUSB_EHCI_SIZE 0x200
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/* extension to PORTSCx register of EHCI. */
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#define PORTSC_PTS __BITS(31,30)
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#define PORTSC_PTS_UTMI __SHIFTIN(0,PORTSC_PTS)
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#define PORTSC_PTS_PHILIPS __SHIFTIN(1,PORTSC_PTS) /* not in i.MX51*/
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#define PORTSC_PTS_ULPI __SHIFTIN(2,PORTSC_PTS)
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#define PORTSC_PTS_SERIAL __SHIFTIN(3,PORTSC_PTS)
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#define PORTSC_PTS2 __BIT(25) /* iMX6,7 */
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#define PORTSC_STS __BIT(29) /* serial transeiver select */
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#define PORTSC_PTW __BIT(28) /* parallel transceiver width */
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#define PORTSC_PTW_8 0
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#define PORTSC_PTW_16 PORTSC_PTW
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#define PORTSC_PSPD __BITS(26,27) /* port speed (RO) */
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#define PORTSC_PFSC __BIT(24) /* port force full speed */
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#define PORTSC_PHCD __BIT(23) /* PHY low power suspend */
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#endif /* _ARM_IMX_IMXUSBREG_H */
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