116 lines
4.5 KiB
C
116 lines
4.5 KiB
C
/* $NetBSD: mk48txxreg.h,v 1.11 2011/01/04 01:28:15 matt Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Paul Kranenburg.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Mostek MK48Txx clocks.
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*
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* The MK48T02 has 2KB of non-volatile memory. The time-of-day clock
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* registers start at offset 0x7f8.
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*
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* The MK48T08 and MK48T18 have 8KB of non-volatile memory
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*
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* The MK48T59 also has 8KB of non-volatile memory but in addition it
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* has a battery low detection bit and a power supply wakeup alarm for
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* power management. It's at offset 0x1ff0 in the NVRAM.
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*/
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/*
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* Mostek MK48TXX register definitions
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*/
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/*
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* The first bank of eight registers at offset (nvramsz - 16) is
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* available only on more recent (which??) MK48Txx models.
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*/
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#define MK48TXX_IFLAGS 0 /* flags */
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/* 1 unused on MK48T59 */
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#define MK48TXX_IASEC 2 /* alarm seconds (0..59; BCD) */
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#define MK48TXX_IAMIN 3 /* alarm minutes (0..59; BCD) */
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#define MK48TXX_IAHOUR 4 /* alarm hour (0..23; BCD) */
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#define MK48TXX_IADAY 5 /* alarm day (1..31; BCD) */
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#define MK48TXX_IINTR 6 /* interrupts */
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#define MK48TXX_IWDOG 7 /* watchdog */
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#define MK48TXX_ICSR 8 /* control register / century (DS1553) */
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#define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */
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#define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */
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#define MK48TXX_IHOUR 11 /* hour (0..23; BCD) */
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#define MK48TXX_IWDAY 12 /* weekday (1..7) */
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#define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */
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#define MK48TXX_IMON 14 /* month (1..12; BCD) */
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#define MK48TXX_IYEAR 15 /* year (0..99; BCD) */
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/* Bits in the flags register */
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#define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag */
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#define MK48TXX_FLAGS_ALARM 0x40 /* alarm flag */
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#define MK48TXX_FLAGS_BATTLOW 0x10 /* battery low */
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/* Bits in the interrupt register */
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#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */
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#define MK48TXX_INTR_ABE 0x20 /* alarm in battery backup enable */
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/* Bits in the watchdog register */
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#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering */
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#define MK48TXX_WDOG_BMB_MASK 0x7c /* watchdog multiplier bits */
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#define MK48TXX_WDOG_BMB_SHIFT 2
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#define MK48TXX_WDOG_RES_MASK 0x03 /* watchdog resolution bits */
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#define MK48TXX_WDOG_RES_1_16S 0x00 /* 1/16 seconds */
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#define MK48TXX_WDOG_RES_1_4S 0x01 /* 1/4 seconds */
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#define MK48TXX_WDOG_RES_1S 0x02 /* 1 second */
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#define MK48TXX_WDOG_RES_4S 0x03 /* 4 seconds */
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/* Bits in the control register */
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#define MK48TXX_CSR_WRITE 0x80 /* want to write */
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#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */
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#define MK48TXX_CSR_CENT_MASK 0x3f /* century mask */
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/* Bit in the weekday register */
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#define MK48TXX_WDAY_FT 0x40 /* freq test: toggle sec[0] at 512Hz */
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/* next two are on MK48T59 only */
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#define MK48TXX_WDAY_CEB 0x20 /* century enable */
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#define MK48TXX_WDAY_CB 0x10 /* century bit */
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/* Bit in the seconds register */
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#define MK48TXX_SEC_STOP 0x80 /* stop the oscillator */
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#define MK48T02_CLKSZ 2048
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#define MK48T02_CLKOFF 0x7f0
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#define MK48T08_CLKSZ 8192
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#define MK48T08_CLKOFF 0x1ff0
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#define MK48T18_CLKSZ 8192
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#define MK48T18_CLKOFF 0x1ff0
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#define MK48T59_CLKSZ 8192
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#define MK48T59_CLKOFF 0x1ff0
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#define DS1553_CLKSZ 8192
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#define DS1553_CLKOFF 0x1ff0
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