253 lines
9.3 KiB
C
253 lines
9.3 KiB
C
/* $NetBSD: i2cvar.h,v 1.23 2021/01/25 12:15:32 jmcneill Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_I2C_I2CVAR_H_
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#define _DEV_I2C_I2CVAR_H_
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#include <sys/device.h>
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#include <sys/mutex.h>
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#include <dev/i2c/i2c_io.h>
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#include <prop/proplib.h>
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/* Flags passed to i2c routines. */
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#define I2C_F_WRITE 0 /* new transfer is a write */
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#define I2C_F_READ __BIT(0) /* new transfer is a read */
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#define I2C_F_LAST __BIT(1) /* last byte of read */
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#define I2C_F_STOP __BIT(2) /* send stop after byte */
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#define I2C_F_POLL __BIT(3) /* poll, don't sleep */
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#define I2C_F_PEC __BIT(4) /* smbus packet error checking */
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#define I2C_F_SPEED __BITS(28,31) /* I2C transfer speed selector */
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#define I2C_SPEED_SM 0 /* standard mode (100Kb/s) */
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#define I2C_SPEED_FM 1 /* fast mode (400Kb/s) */
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#define I2C_SPEED_FMPLUS 2 /* fast mode+ (1Mb/s) */
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#define I2C_SPEED_HS 3 /* high speed (3.4Mb/s) */
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/* i2c bus instance properties */
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#define I2C_PROP_INDIRECT_PROBE_STRATEGY \
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"i2c-indirect-probe-strategy"
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#define I2C_PROBE_STRATEGY_QUICK_WRITE \
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"smbus-quick-write"
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#define I2C_PROBE_STRATEGY_RECEIVE_BYTE \
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"smbus-receive-byte"
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#define I2C_PROBE_STRATEGY_NONE \
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"none"
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#define I2C_PROP_INDIRECT_DEVICE_PERMITLIST \
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"i2c-indirect-device-permitlist"
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/* value is a prop_array of prop_strings */
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struct ic_intr_list {
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LIST_ENTRY(ic_intr_list) il_next;
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int (*il_intr)(void *);
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void *il_intrarg;
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};
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/*
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* This structure provides the interface between the i2c framework
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* and the underlying i2c controller.
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*
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* Note that this structure is designed specifically to allow us
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* to either use the autoconfiguration framework or not. This
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* allows a driver for a board with a private i2c bus use generic
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* i2c client drivers for chips that might be on that board.
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*/
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typedef struct i2c_controller {
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void *ic_cookie; /* controller private */
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/*
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* These provide synchronization in the presence of
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* multiple users of the i2c bus. When a device
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* driver wishes to perform transfers on the i2c
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* bus, the driver should acquire the bus. When
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* the driver is finished, it should release the
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* bus.
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*
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* The main synchronization logic is handled by the
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* generic i2c layer, but optional hooks to back-end
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* drivers are provided in case additional processing
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* is needed (e.g. enabling the i2c controller).
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*/
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kmutex_t ic_bus_lock;
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int (*ic_acquire_bus)(void *, int);
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void (*ic_release_bus)(void *, int);
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/*
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* The preferred API for clients of the i2c interface
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* is the scripted API. This handles i2c controllers
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* that do not provide raw access to the i2c signals.
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*/
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int (*ic_exec)(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
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void *, size_t, int);
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int (*ic_send_start)(void *, int);
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int (*ic_send_stop)(void *, int);
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int (*ic_initiate_xfer)(void *, i2c_addr_t, int);
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int (*ic_read_byte)(void *, uint8_t *, int);
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int (*ic_write_byte)(void *, uint8_t, int);
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LIST_HEAD(, ic_intr_list) ic_list;
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LIST_HEAD(, ic_intr_list) ic_proc_list;
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volatile int ic_running;
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volatile int ic_pending;
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struct lwp *ic_intr_thread;
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const char *ic_devname;
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} *i2c_tag_t;
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/* Used to attach the i2c framework to the controller. */
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struct i2cbus_attach_args {
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i2c_tag_t iba_tag; /* the controller */
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prop_array_t iba_child_devices; /* child devices (direct config) */
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};
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/* Type of value stored in "ia_cookie" */
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enum i2c_cookie_type {
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I2C_COOKIE_NONE, /* Cookie is not valid */
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I2C_COOKIE_OF, /* Cookie is an OF node phandle */
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I2C_COOKIE_ACPI, /* Cookie is an ACPI handle */
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};
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/* Used to attach devices on the i2c bus. */
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struct i2c_attach_args {
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i2c_tag_t ia_tag; /* our controller */
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i2c_addr_t ia_addr; /* address of device */
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int ia_type; /* bus type */
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/* only set if using direct config */
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const char * ia_name; /* name of the device */
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int ia_ncompat; /* number of pointers in the
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ia_compat array */
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const char ** ia_compat; /* chip names */
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prop_dictionary_t ia_prop; /* dictionnary for this device */
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/*
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* The following is of limited usefulness and should only be used
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* in rare cases where we really know what we are doing. Example:
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* a machine dependent i2c driver (located in sys/arch/$arch/dev)
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* needing to access some firmware properties.
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* Depending on the firmware in use, an identifier for the device
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* may be present. Example: on OpenFirmware machines the device
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* tree OF node - if available. This info is hard to transport
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* down to MD drivers through the MI i2c bus otherwise.
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*
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* On ACPI platforms this is the ACPI_HANDLE of the device.
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*/
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uintptr_t ia_cookie; /* OF node in openfirmware machines */
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enum i2c_cookie_type ia_cookietype; /* Value type of cookie */
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};
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/*
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* API presented to i2c controllers.
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*/
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int iicbus_print(void *, const char *);
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void iic_tag_init(i2c_tag_t);
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void iic_tag_fini(i2c_tag_t);
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/*
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* API presented to i2c devices.
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*/
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int iic_compatible_match(const struct i2c_attach_args *,
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const struct device_compatible_entry *);
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bool iic_use_direct_match(const struct i2c_attach_args *, const cfdata_t,
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const struct device_compatible_entry *, int *);
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const struct device_compatible_entry *
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iic_compatible_lookup(const struct i2c_attach_args *,
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const struct device_compatible_entry *);
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/*
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* Constants to indicate the quality of a match made by a driver's
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* match routine, from lowest to higest:
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*
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* -- Address only; no other checks were made.
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*
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* -- Address + device probed and recognized.
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*
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* -- Direct-config match by "compatible" string.
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*
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* -- Direct-config match by specific driver name.
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*/
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#define I2C_MATCH_ADDRESS_ONLY 1
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#define I2C_MATCH_ADDRESS_AND_PROBE 2
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#define I2C_MATCH_DIRECT_COMPATIBLE 10
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#define I2C_MATCH_DIRECT_COMPATIBLE_MAX 99
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#define I2C_MATCH_DIRECT_SPECIFIC 100
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#ifdef _I2C_PRIVATE
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/*
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* Macros used internally by the i2c framework.
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*/
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#define iic_send_start(ic, flags) \
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(*(ic)->ic_send_start)((ic)->ic_cookie, (flags))
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#define iic_send_stop(ic, flags) \
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(*(ic)->ic_send_stop)((ic)->ic_cookie, (flags))
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#define iic_initiate_xfer(ic, addr, flags) \
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(*(ic)->ic_initiate_xfer)((ic)->ic_cookie, (addr), (flags))
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#define iic_read_byte(ic, bytep, flags) \
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(*(ic)->ic_read_byte)((ic)->ic_cookie, (bytep), (flags))
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#define iic_write_byte(ic, byte, flags) \
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(*(ic)->ic_write_byte)((ic)->ic_cookie, (byte), (flags))
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#endif /* _I2C_PRIVATE */
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/*
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* Simplified API for clients of the i2c framework. Definitions
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* in <dev/i2c/i2c_io.h>.
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*/
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int iic_acquire_bus(i2c_tag_t, int);
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void iic_release_bus(i2c_tag_t, int);
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int iic_exec(i2c_tag_t, i2c_op_t, i2c_addr_t, const void *,
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size_t, void *, size_t, int);
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int iic_smbus_write_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t, int);
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int iic_smbus_write_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t, int);
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int iic_smbus_read_byte(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *, int);
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int iic_smbus_read_word(i2c_tag_t, i2c_addr_t, uint8_t, uint16_t *, int);
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int iic_smbus_receive_byte(i2c_tag_t, i2c_addr_t, uint8_t *, int);
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int iic_smbus_send_byte(i2c_tag_t, i2c_addr_t, uint8_t, int);
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int iic_smbus_quick_read(i2c_tag_t, i2c_addr_t, int);
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int iic_smbus_quick_write(i2c_tag_t, i2c_addr_t, int);
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int iic_smbus_block_read(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *,
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size_t, int);
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int iic_smbus_block_write(i2c_tag_t, i2c_addr_t, uint8_t, uint8_t *,
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size_t, int);
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void * iic_smbus_intr_establish(i2c_tag_t, int (*)(void *), void *);
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void * iic_smbus_intr_establish_proc(i2c_tag_t, int (*)(void *), void *);
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void iic_smbus_intr_disestablish(i2c_tag_t, void *);
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void iic_smbus_intr_disestablish_proc(i2c_tag_t, void *);
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int iic_smbus_intr(i2c_tag_t);
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#endif /* _DEV_I2C_I2CVAR_H_ */
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