107 lines
4.3 KiB
C
107 lines
4.3 KiB
C
/* $NetBSD: ixp425_npevar.h,v 1.1 2006/12/10 10:01:49 scw Exp $ */
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/*-
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* Copyright (c) 2006 Sam Leffler. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/arm/xscale/ixp425/ixp425_npevar.h,v 1.1 2006/11/19 23:55:23 sam Exp $
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*/
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#ifndef _IXP425_NPEVAR_H_
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#define _IXP425_NPEVAR_H_
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/*
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* Intel (R) IXP400 Software NPE Image ID Definition
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*
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* Firmware Id's for current firmware image. These are typed by
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* NPE ID and the feature set. Not all features are available
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* on all NPE's.
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*
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* HSS-0: supports 32 channelized and 4 packetized.
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* HSS-0 + ATM + SPHY:
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* For HSS, 16/32 channelized and 4/0 packetized.
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* For ATM, AAL5, AAL0 and OAM for UTOPIA SPHY, 1 logical port, 32 VCs.
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* Fast Path support.
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* HSS-0 + ATM + MPHY:
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* For HSS, 16/32 channelized and 4/0 packetized.
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* For ATM, AAL5, AAL0 and OAM for UTOPIA MPHY, 1 logical port, 32 VCs.
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* Fast Path support.
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* ATM-Only:
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* AAL5, AAL0 and OAM for UTOPIA MPHY, 12 logical ports, 32 VCs.
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* Fast Path support.
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* HSS-2:
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* HSS-0 and HSS-1.
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* Each HSS port supports 32 channelized and 4 packetized.
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* ETH: Ethernet Rx/Tx which includes:
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* MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL
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* ETH+VLAN Ethernet Rx/Tx which includes:
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* MAC_FILTERING, MAC_LEARNING, SPANNING_TREE, FIREWALL, VLAN_QOS
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* ETH+VLAN+HDR: Ethernet Rx/Tx which includes:
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* SPANNING_TREE, FIREWALL, VLAN_QOS, HEADER_CONVERSION
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*/
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/* XXX not right, revise */
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/* NPE A Firmware Image Id's */
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#define NPEFW_A_HSS0 0x00010000 /* HSS-0: 32 chan+4 packet */
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#define NPEFW_A_HSS0_ATM_S_1 0x00020000 /* HSS-0+ATM UTOPIA SPHY (1 port) */
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#define NPEFW_A_HSS0_ATM_M_1 0x00020000 /* HSS-0+ATM UTOPIA MPHY (1 port) */
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#define NPEFW_A_ATM_M_12 0x00040000 /* ATM UTOPIA MPHY (12 ports) */
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#define NPEFW_A_DMA 0x00150100 /* DMA only */
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#define NPEFW_A_HSS2 0x00090000 /* HSS-0 + HSS-1 */
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#define NPEFW_A_ETH 0x10800200 /* Basic Ethernet */
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#define NPEFW_A_ETH_VLAN 0x10810200 /* NPEFW_A_ETH + VLAN QoS */
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#define NPEFW_A_ETH_VLAN_HDR 0x10820200 /* NPEFW_A_ETH_VLAN + Hdr conv */
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/* XXX ... more not included */
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/* NPE B Firmware Image Id's */
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#define NPEFW_B_ETH 0x01000200 /* Basic Ethernet */
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#define NPEFW_B_ETH_VLAN 0x01010200 /* NPEFW_B_ETH + VLAN QoS */
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#define NPEFW_B_ETH_VLAN_HDR 0x01020201 /* NPEFW_B_ETH_VLAN + Hdr conv */
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#define NPEFW_B_DMA 0x01020100 /* DMA only */
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/* XXX ... more not include */
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#define IXP425_NPE_B_IMAGEID 0x01000201
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#define IXP425_NPE_C_IMAGEID 0x02000201
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struct ixpnpe_softc;
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int ixpnpe_stopandreset(struct ixpnpe_softc *);
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int ixpnpe_start(struct ixpnpe_softc *);
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int ixpnpe_stop(struct ixpnpe_softc *);
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int ixpnpe_init(struct ixpnpe_softc *, const char *imageName,
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uint32_t imageId);
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int ixpnpe_getfunctionality(struct ixpnpe_softc *sc);
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int ixpnpe_sendmsg(struct ixpnpe_softc *, const uint32_t msg[2]);
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int ixpnpe_recvmsg(struct ixpnpe_softc *, uint32_t msg[2]);
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int ixpnpe_sendandrecvmsg(struct ixpnpe_softc *, const uint32_t send[2],
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uint32_t recv[2]);
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struct ixpnpe_attach_args {
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int na_unit;
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int na_phy;
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struct ixpnpe_softc *na_npe;
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bus_space_tag_t na_iot;
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bus_dma_tag_t na_dt;
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};
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#endif /* _IXP425_NPEVAR_H_ */
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