90 lines
2.5 KiB
C
90 lines
2.5 KiB
C
/* $NetBSD: intrdefs.h,v 1.2 2002/12/11 12:02:08 fvdl Exp $ */
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#ifndef _i386_INTRDEFS_H
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#define _i386_INTRDEFS_H
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/*
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* Interrupt priority levels.
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*
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* There are tty, network and disk drivers that use free() at interrupt
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* time, so imp > (tty | net | bio).
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*
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* Since run queues may be manipulated by both the statclock and tty,
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* network, and disk drivers, clock > imp.
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*
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* IPL_HIGH must block everything that can manipulate a run queue.
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*
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* We need serial drivers to run at the absolute highest priority to
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* avoid overruns, so serial > high.
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*
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* The level numbers are picked to fit into APIC vector priorities.
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*
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*/
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#define IPL_NONE 0x0 /* nothing */
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#define IPL_SOFTCLOCK 0x4 /* timeouts */
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#define IPL_SOFTNET 0x5 /* protocol stacks */
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#define IPL_BIO 0x6 /* block I/O */
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#define IPL_NET 0x7 /* network */
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#define IPL_SOFTSERIAL 0x8 /* serial */
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#define IPL_TTY 0x9 /* terminal */
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#define IPL_VM 0xa /* memory allocation */
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#define IPL_IMP IPL_VM
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#define IPL_AUDIO 0xb /* audio */
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#define IPL_CLOCK 0xc /* clock */
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#define IPL_SCHED IPL_CLOCK
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#define IPL_HIGH 0xd /* everything */
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#define IPL_SERIAL 0xd /* serial */
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#define IPL_IPI 0xe /* inter-processor interrupts */
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#define NIPL 16
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/* Interrupt sharing types. */
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#define IST_NONE 0 /* none */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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/*
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* Local APIC masks. Must not conflict with SIR_* above, and must
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* be >= NUM_LEGACY_IRQs. Note that LIR_IPI must be first.
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*/
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#define LIR_IPI 31
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#define LIR_TIMER 30
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/* Soft interrupt masks. */
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#define SIR_CLOCK 29
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#define SIR_NET 28
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#define SIR_SERIAL 27
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/*
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* Maximum # of interrupt sources per CPU. 32 to fit in one word.
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* ioapics can theoretically produce more, but it's not likely to
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* happen. For multiple ioapics, things can be routed to different
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* CPUs.
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*/
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#define MAX_INTR_SOURCES 32
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#define NUM_LEGACY_IRQS 16
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/*
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* Low and high boundaries between which interrupt gates will
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* be allocated in the IDT.
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*/
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#define IDT_INTR_LOW (0x20 + NUM_LEGACY_IRQS)
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#define IDT_INTR_HIGH 0xef
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#define I386_IPI_HALT 0x00000001
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#define I386_IPI_MICROSET 0x00000002
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#define I386_IPI_FLUSH_FPU 0x00000004
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#define I386_IPI_SYNCH_FPU 0x00000008
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#define I386_IPI_TLB 0x00000010
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#define I386_IPI_MTRR 0x00000020
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#define I386_IPI_GDT 0x00000040
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#define I386_NIPI 7
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#define I386_IPI_NAMES { "halt IPI", "timeset IPI", "FPU flush IPI", \
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"FPU synch IPI", "TLB shootdown IPI", \
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"MTRR update IPI", "GDT update IPI" }
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#endif /* _I386_INTRDEFS_H */
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