72797e4632
Reference Design NetBSD source code, obtained from the pages under http://www.research.digital.com/SRC/iag . Some of this code (badly) needs to be cleaned up, and as-is it doesn't compile. However, getting it in the tree is a start.
773 lines
17 KiB
C
773 lines
17 KiB
C
/*
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* Copyright 1997
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* Digital Equipment Corporation. All rights reserved.
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*
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* This software is furnished under license and may be used and
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* copied only in accordance with the following terms and conditions.
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* Subject to these conditions, you may download, copy, install,
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* use, modify and distribute this software in source and/or binary
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* form. No title or ownership is transferred hereby.
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*
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* 1) Any source code used, modified or distributed must reproduce
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* and retain this copyright notice and list of conditions as
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* they appear in the source file.
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*
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* 2) No right is granted to use any trade name, trademark, or logo of
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* Digital Equipment Corporation. Neither the "Digital Equipment
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* Corporation" name nor any trademark or logo of Digital Equipment
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* Corporation may be used to endorse or promote products derived
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* from this software without the prior written permission of
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* Digital Equipment Corporation.
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*
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* 3) This software is provided "AS-IS" and any express or implied
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* warranties, including but not limited to, any implied warranties
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* of merchantability, fitness for a particular purpose, or
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* non-infringement are disclaimed. In no event shall DIGITAL be
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* liable for any damages whatsoever, and in particular, DIGITAL
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* shall not be liable for special, indirect, consequential, or
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* incidental damages or damages for lost profits, loss of
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* revenue or loss of use, whether such damages arise in contract,
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* negligence, tort, under statute, in equity, at law or otherwise,
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* even if advised of the possibility of such damage.
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*/
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/*
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**
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** INCLUDE FILES
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**
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/types.h>
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#include <machine/bus.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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#include <dev/isa/isareg.h>
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#ifdef arm32
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#include <arm32/isa/isa_machdep.h>
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#include <arm32/shark/sequoia.h>
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#include <arm32/shark/fiq.h>
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#endif
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/*
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**
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** MACROS
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**
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*/
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#define SET(t, f) (t) |= (f)
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#define CLR(t, f) (t) &= ~(f)
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#define ISSET(t, f) ((t) & (f))
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#define ISCLR(t, f) ( ((t) & (f)) == 0)
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/* define regisers on sequoia used by pins */
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#define SEQUOIA_1GPIO PMC_GPCR_REG /* reg 0x007 gpio 0-3 */
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#define SEQUOIA_2GPIO SEQ2_OGPIOCR_REG /* reg 0x304 gpio 4.8 */
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/* define pins on sequoia that talk to smart card reader */
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#define SCR_DETECT_DIR GPIOCR2_M_GPIOBDIR0
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#define SCR_DETECT GPIOCR2_M_GPIOBDATA0
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#define SCR_POWER_DIR GPCR_M_GPIODIR0
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#define SCR_POWER GPCR_M_GPIODATA0
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#define SCR_RESET_DIR GPCR_M_GPIODIR1
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#define SCR_RESET GPCR_M_GPIODATA1
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#define SCR_CLOCK_DIR OGPIOCR_M_GPIODIR6
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#define SCR_CLOCK OGPIOCR_M_GPIODATA6
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#define SCR_DATA_IN_DIR GPCR_M_GPIODIR2
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#define SCR_DATA_IN GPCR_M_GPIODATA2
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#define SCR_DATA_OUT_DIR OGPIOCR_M_GPIODIR5
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#define SCR_DATA_OUT OGPIOCR_M_GPIODATA5
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#define SCR_BUGA_DIR OGPIOCR_M_GPIODIR4
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#define SCR_BUGA OGPIOCR_M_GPIODATA4
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#define SCR_BUGB_DIR OGPIOCR_M_GPIODIR7
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#define SCR_BUGB OGPIOCR_M_GPIODATA7
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/* define pins on sequoia that talk to leds */
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#define LED_BILED_YELLOW_BIT FOMPCR_M_PCON5
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#define LED_BILED_GREEN_BIT FOMPCR_M_PCON6
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#define LED_DEBUG_YELLOW_BIT FOMPCR_M_PCON7
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#define LED_DEBUG_GREEN_BIT FOMPCR_M_PCON8
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/* define biled colors */
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#define LED_BILED_NONE 0
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#define LED_BILED_GREEN 1
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#define LED_BILED_YELLOW 2
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#define LED_BILED_RED 3
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#define LED_TIMEOUT HZ / 20 /* 20 times a second */
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#define LED_NET_ACTIVE (1000000/HZ) * LED_TIMEOUT /* delay in us for net activity */
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/*
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**
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** DATA
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**
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*/
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static bus_space_handle_t sequoia_ioh;
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static int ledState; /* state of the biled */
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static struct timeval ledLastActive; /* last time we get net activity */
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static int ledColor; /* present color of led */
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static int ledBlockCount;; /* reference count of block calles */
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int sequoia_index_cache = -1; /* set to silly value so that we dont cache on init */
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/*
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**
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** FUNCITONAL PROTOTYPES
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**
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*/
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static void ledSetBiled(int color);
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static void ledTimeout(void * arg);
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/*
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**
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** FUNCITONS
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**
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*/
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void sequoiaInit(void)
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{
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u_int16_t seqReg;
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/* map the sequoi registers */
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if (bus_space_map(&isa_io_bs_tag, SEQUOIA_BASE, SEQUOIA_NPORTS, 0, &sequoia_ioh))
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{
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panic("SequoiaInit: io mapping failed");
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}
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/*
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**
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** setup the pins associated with the X server
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**
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*/
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/* seems power on sets them correctly */
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/*
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** setup the pins associated with the led
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*/
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sequoiaRead(SEQR_SEQPSR1_REG,&seqReg);
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SET(seqReg,SEQPSR1_M_TAGDEN); /* enable pc[4:9] */
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sequoiaWrite(SEQR_SEQPSR1_REG,seqReg);
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sequoiaRead(SEQR_SEQPSR3_REG,&seqReg);
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CLR(seqReg,SEQPSR3_M_PC5PINEN); /* enable pc5, biled */
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CLR(seqReg,SEQPSR3_M_PC6PINEN); /* enable pc6, biled */
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CLR(seqReg,SEQPSR3_M_PC7PINEN); /* enable pc7, debug led yellow */
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CLR(seqReg,SEQPSR3_M_PC8PINEN); /* enable pc8, debug led green */
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sequoiaWrite(SEQR_SEQPSR3_REG,seqReg);
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sequoiaRead (PMC_FOMPCR_REG, &seqReg);
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CLR(seqReg,LED_BILED_YELLOW_BIT);
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CLR(seqReg,LED_BILED_GREEN_BIT);
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SET(seqReg,LED_DEBUG_YELLOW_BIT);
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CLR(seqReg,LED_DEBUG_GREEN_BIT);
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sequoiaWrite(PMC_FOMPCR_REG, seqReg);
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/* setup the biled info */
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ledColor = LED_BILED_GREEN;
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ledLastActive.tv_usec = 0;
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ledLastActive.tv_sec = 0;
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ledBlockCount = 0;
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timeout(ledTimeout,NULL,LED_TIMEOUT);
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/*
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**
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** setup the pins associated with the smart card reader *
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**
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*/
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/* sequoia 1 direction & data */
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sequoiaRead(SEQUOIA_1GPIO,&seqReg);
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SET(seqReg,SCR_POWER_DIR); /* output */
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SET(seqReg,SCR_RESET_DIR); /* output */
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CLR(seqReg,SCR_DATA_IN_DIR); /* input */
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CLR(seqReg,SCR_POWER); /* 0V to card */
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SET(seqReg,SCR_RESET); /* 0V to card */
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sequoiaWrite(SEQUOIA_1GPIO,seqReg);
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/* sequoia 2 pin enables */
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sequoiaRead(SEQ2_SEQ2PSR_REG,&seqReg);
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SET(seqReg,SEQ2PSR_M_DPBUSEN);
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CLR(seqReg,SEQ2PSR_M_GPIOPINEN);
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sequoiaWrite(SEQ2_SEQ2PSR_REG,seqReg);
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/* sequoia 2 direction & data */
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sequoiaRead(SEQUOIA_2GPIO,&seqReg);
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SET(seqReg,SCR_BUGA_DIR); /* output */
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SET(seqReg,SCR_DATA_OUT_DIR); /* output */
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SET(seqReg,SCR_CLOCK_DIR); /* output */
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SET(seqReg,SCR_BUGB_DIR); /* output */
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CLR(seqReg,SCR_BUGA); /* 0 */
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CLR(seqReg,SCR_BUGB); /* 0 */
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CLR(seqReg,SCR_CLOCK); /* 0 */
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sequoiaWrite(SEQUOIA_2GPIO,seqReg);
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/* setup the wak0 pin to be detect */
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sequoiaRead(SEQR_SEQPSR2_REG,&seqReg);
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SET(seqReg,SEQPSR2_M_DIRTYPINEN);
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SET(seqReg,SEQPSR2_M_GPIOB0PINEN);
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sequoiaWrite(SEQR_SEQPSR2_REG,seqReg);
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sequoiaRead(PMC_GPIOCR2_REG,&seqReg);
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CLR(seqReg,SCR_DETECT_DIR); /* input */
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sequoiaWrite(PMC_GPIOCR2_REG,seqReg);
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/* don't delay when setting PC bits. this is particularly important
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for using PC[4] to clear the FIQ. */
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sequoiaRead(PMC_SCCR_REG, &seqReg);
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sequoiaWrite(PMC_SCCR_REG, seqReg | SCCR_M_PCSTGDIS);
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}
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/* X console functions */
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void consXTvOn(void)
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{
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u_int16_t savedPSR3;
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u_int16_t savedFMPCR;
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/*
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** Switch on TV output on the Sequoia, data indicates mode,
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** but we are currently hardwired to NTSC, so ignore it.
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*/
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sequoiaRead (SEQR_SEQPSR3_REG, &savedPSR3);
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sequoiaWrite(SEQR_SEQPSR3_REG, (savedPSR3 | SEQPSR3_M_PC3PINEN));
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sequoiaRead (PMC_FOMPCR_REG, &savedFMPCR);
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sequoiaWrite(PMC_FOMPCR_REG, (savedFMPCR | FOMPCR_M_PCON3));
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}
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void consXTvOff(void)
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{
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u_int16_t savedPSR3;
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u_int16_t savedFMPCR;
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/*
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** Switch off TV output on the Seqoia
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*/
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sequoiaRead (SEQR_SEQPSR3_REG, &savedPSR3);
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sequoiaWrite(SEQR_SEQPSR3_REG, (savedPSR3 & ~SEQPSR3_M_PC3PINEN));
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sequoiaRead (PMC_FOMPCR_REG, &savedFMPCR);
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sequoiaWrite(PMC_FOMPCR_REG, (savedFMPCR & ~FOMPCR_M_PCON3));
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}
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/* smart card routines */
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int scrGetDetect (void)
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{
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int r;
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u_int16_t seqReg;
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sequoiaRead(PMC_GPIOCR2_REG,&seqReg);
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/* inverse logic, so invert */
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if (ISSET(seqReg,SCR_DETECT))
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{
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r = 0;
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} else
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{
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r = 1;
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}
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return r;
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}
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void scrSetPower (int value)
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{
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u_int16_t seqReg;
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#ifdef SHARK
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u_int savedints;
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savedints = disable_interrupts(I32_bit | F32_bit);
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#endif
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sequoiaRead(SEQUOIA_1GPIO,&seqReg);
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if (value)
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{
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SET(seqReg,SCR_POWER);
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} else
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{
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CLR(seqReg,SCR_POWER);
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}
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sequoiaWrite(SEQUOIA_1GPIO,seqReg);
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#ifdef SHARK
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restore_interrupts(savedints);
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#endif
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}
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void scrSetClock (int value)
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{
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u_int16_t seqReg;
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#ifdef SHARK
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u_int savedints;
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savedints = disable_interrupts(I32_bit | F32_bit);
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#endif
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sequoiaRead(SEQUOIA_2GPIO,&seqReg);
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if (value)
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{
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SET(seqReg,SCR_CLOCK);
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} else
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{
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CLR(seqReg,SCR_CLOCK);
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}
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sequoiaWrite(SEQUOIA_2GPIO,seqReg);
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#ifdef SHARK
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restore_interrupts(savedints);
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#endif
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}
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void scrSetReset (int value)
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{
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u_int16_t seqReg;
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#ifdef SHARK
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u_int savedints;
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savedints = disable_interrupts(I32_bit | F32_bit);
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#endif
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sequoiaRead(SEQUOIA_1GPIO,&seqReg);
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if (value)
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{
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SET(seqReg,SCR_RESET);
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} else
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{
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CLR(seqReg,SCR_RESET);
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}
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sequoiaWrite(SEQUOIA_1GPIO,seqReg);
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#ifdef SHARK
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restore_interrupts(savedints);
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#endif
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}
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void scrSetDataHighZ (void)
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{
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u_int16_t seqReg;
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#ifdef SHARK
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u_int savedints;
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savedints = disable_interrupts(I32_bit | F32_bit);
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#endif
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sequoiaRead(SEQUOIA_2GPIO,&seqReg);
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/* set data to 5V, io pin is inverse logic */
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CLR(seqReg,SCR_DATA_OUT);
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sequoiaWrite(SEQUOIA_2GPIO,seqReg);
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#ifdef SHARK
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restore_interrupts(savedints);
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#endif
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}
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void scrSetData (int value)
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{
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u_int16_t seqReg;
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#ifdef SHARK
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u_int savedints;
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savedints = disable_interrupts(I32_bit | F32_bit);
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#endif
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sequoiaRead(SEQUOIA_2GPIO,&seqReg);
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/* inverse logic */
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if (value )
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{
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CLR(seqReg,SCR_DATA_OUT);
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} else
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{
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SET(seqReg,SCR_DATA_OUT);
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}
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sequoiaWrite(SEQUOIA_2GPIO,seqReg);
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#ifdef SHARK
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restore_interrupts(savedints);
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#endif
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}
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int scrGetData (void)
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{
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int r;
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u_int16_t seqReg;
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sequoiaRead(SEQUOIA_1GPIO,&seqReg);
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if (ISSET(seqReg,SCR_DATA_IN))
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{
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r = 1;
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} else
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{
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r = 0;
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}
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return r;
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}
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void ledNetActive (void)
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{
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ledLastActive = time;
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}
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void ledNetBlock (void)
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{
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ledBlockCount++;
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}
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void ledNetUnblock (void)
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{
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ledBlockCount--;
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}
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void ledPanic (void)
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{
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/* we are in panic, timeout wont happen, so set led */
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ledSetBiled(LED_BILED_RED);
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}
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static void ledTimeout(void * arg)
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{
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int timeSpan; /* in usec */
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if(time.tv_sec == ledLastActive.tv_sec)
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{
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timeSpan = time.tv_usec - ledLastActive.tv_usec;
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}
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else if (time.tv_sec - 10 < ledLastActive.tv_sec) /* stop rollover problems */
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{
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timeSpan = (1000000 + time.tv_usec) - ledLastActive.tv_usec;
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}
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else
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{
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timeSpan = LED_NET_ACTIVE * 2; /* ie big number */
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}
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/* check if we are blocked */
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if(ledBlockCount)
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{
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if(ledColor == LED_BILED_YELLOW)
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{
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ledSetBiled(LED_BILED_NONE);
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}
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else
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{
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ledSetBiled(LED_BILED_YELLOW);
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}
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}
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/* check if we have network activity */
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else if (timeSpan < LED_NET_ACTIVE)
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{
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if(ledColor == LED_BILED_GREEN)
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{
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ledSetBiled(LED_BILED_NONE);
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}
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else
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{
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ledSetBiled(LED_BILED_GREEN);
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}
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}
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/* normal operating mode */
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else
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{
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if(ledColor != LED_BILED_GREEN)
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{
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ledSetBiled(LED_BILED_GREEN);
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}
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}
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/* resubmint the timeout */
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timeout(ledTimeout,NULL,LED_TIMEOUT);
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}
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static void ledSetBiled(int color)
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{
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u_int16_t seqReg;
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#ifdef SHARK
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u_int savedints;
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savedints = disable_interrupts(I32_bit | F32_bit);
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#endif
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ledColor = color;
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sequoiaRead (PMC_FOMPCR_REG, &seqReg);
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switch(color)
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{
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case LED_BILED_NONE:
|
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SET(seqReg,LED_BILED_YELLOW_BIT);
|
||
SET(seqReg,LED_BILED_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_BILED_YELLOW:
|
||
CLR(seqReg,LED_BILED_YELLOW_BIT);
|
||
SET(seqReg,LED_BILED_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_BILED_GREEN:
|
||
SET(seqReg,LED_BILED_YELLOW_BIT);
|
||
CLR(seqReg,LED_BILED_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_BILED_RED:
|
||
CLR(seqReg,LED_BILED_YELLOW_BIT);
|
||
CLR(seqReg,LED_BILED_GREEN_BIT);
|
||
break;
|
||
|
||
default:
|
||
panic("invalid color %x\n",color);
|
||
break;
|
||
}
|
||
sequoiaWrite(PMC_FOMPCR_REG, seqReg);
|
||
#ifdef SHARK
|
||
restore_interrupts(savedints);
|
||
#endif
|
||
}
|
||
|
||
|
||
int hwGetRev(void)
|
||
{
|
||
u_int16_t seqReg;
|
||
|
||
sequoiaRead(SR_POR_REG,&seqReg);
|
||
|
||
seqReg = seqReg >> POR_V_MISCCF0;
|
||
seqReg = seqReg & 0x7;
|
||
|
||
return seqReg;
|
||
}
|
||
|
||
|
||
|
||
|
||
|
||
/* routines to read/write to sequoia registers */
|
||
void sequoiaWrite(int reg,u_int16_t seqReg)
|
||
{
|
||
#ifdef SHARK
|
||
u_int savedints;
|
||
|
||
savedints = disable_interrupts(I32_bit | F32_bit);
|
||
#endif
|
||
|
||
/*
|
||
On SHARK, the fiq comes from the pmi/smi. After receiving
|
||
a FIQ, the SMI must be cleared. The SMI gets cleared by
|
||
changing to sleep mode, thereby lowering PC[4]. */
|
||
// need to do the right thing with the cache if this is going to work */
|
||
if (reg == PMC_FOMPCR_REG) {
|
||
bus_space_write_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_INDEX_OFFSET,reg);
|
||
bus_space_write_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_DATA_OFFSET,
|
||
seqReg | (FOMPCR_M_PCON4));
|
||
bus_space_write_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_INDEX_OFFSET,
|
||
PMC_SLPMPCR_REG);
|
||
bus_space_write_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_DATA_OFFSET,
|
||
seqReg & ~(SLPMPCR_M_PCSLP4));
|
||
sequoia_index_cache = PMC_SLPMPCR_REG;
|
||
} else {
|
||
/* normal case: just do the write */
|
||
if(sequoia_index_cache != reg)
|
||
{
|
||
sequoia_index_cache = reg;
|
||
bus_space_write_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_INDEX_OFFSET,reg);
|
||
}
|
||
bus_space_write_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_DATA_OFFSET,seqReg);
|
||
}
|
||
#ifdef SHARK
|
||
restore_interrupts(savedints);
|
||
#endif
|
||
}
|
||
|
||
void sequoiaRead (int reg,u_int16_t * seqReg_ptr)
|
||
{
|
||
#ifdef SHARK
|
||
u_int savedints;
|
||
|
||
savedints = disable_interrupts(I32_bit | F32_bit);
|
||
#endif
|
||
if(sequoia_index_cache != reg)
|
||
{
|
||
sequoia_index_cache = reg;
|
||
bus_space_write_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_INDEX_OFFSET,reg);
|
||
}
|
||
*seqReg_ptr = bus_space_read_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_DATA_OFFSET);
|
||
#ifdef SHARK
|
||
restore_interrupts(savedints);
|
||
#endif
|
||
}
|
||
|
||
|
||
void ledSetDebug(int command)
|
||
{
|
||
u_int16_t seqReg;
|
||
#ifdef SHARK
|
||
u_int savedints;
|
||
|
||
savedints = disable_interrupts(I32_bit | F32_bit);
|
||
#endif
|
||
sequoiaRead (PMC_FOMPCR_REG, &seqReg);
|
||
|
||
|
||
switch (command)
|
||
{
|
||
case LED_DEBUG_STATE_0:
|
||
CLR(seqReg,LED_DEBUG_YELLOW_BIT);
|
||
CLR(seqReg,LED_DEBUG_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_DEBUG_STATE_1:
|
||
SET(seqReg,LED_DEBUG_YELLOW_BIT);
|
||
CLR(seqReg,LED_DEBUG_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_DEBUG_STATE_2:
|
||
CLR(seqReg,LED_DEBUG_YELLOW_BIT);
|
||
SET(seqReg,LED_DEBUG_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_DEBUG_STATE_3:
|
||
SET(seqReg,LED_DEBUG_YELLOW_BIT);
|
||
SET(seqReg,LED_DEBUG_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_DEBUG_YELLOW_ON:
|
||
SET(seqReg,LED_DEBUG_YELLOW_BIT);
|
||
break;
|
||
|
||
case LED_DEBUG_YELLOW_OFF:
|
||
CLR(seqReg,LED_DEBUG_YELLOW_BIT);
|
||
break;
|
||
|
||
case LED_DEBUG_GREEN_ON:
|
||
SET(seqReg,LED_DEBUG_GREEN_BIT);
|
||
break;
|
||
|
||
case LED_DEBUG_GREEN_OFF:
|
||
CLR(seqReg,LED_DEBUG_GREEN_BIT);
|
||
break;
|
||
|
||
default:
|
||
panic("ledSetDebug: invalid command %d\n",command);
|
||
break;
|
||
}
|
||
sequoiaWrite(PMC_FOMPCR_REG, seqReg);
|
||
#ifdef SHARK
|
||
restore_interrupts(savedints);
|
||
#endif
|
||
}
|
||
|
||
|
||
#ifdef USEFULL_DEBUG
|
||
void sequoiaOneAccess(void)
|
||
{
|
||
u_int16_t reg;
|
||
#ifdef SHARK
|
||
u_int savedints;
|
||
|
||
savedints = disable_interrupts(I32_bit | F32_bit);
|
||
#endif
|
||
reg = bus_space_read_2(&isa_io_bs_tag,sequoia_ioh,SEQUOIA_DATA_OFFSET);
|
||
#ifdef SHARK
|
||
restore_interrupts(savedints);
|
||
#endif
|
||
}
|
||
#endif
|
||
|
||
int testPin=0;
|
||
void scrToggleTestPin (void)
|
||
{
|
||
u_int16_t seqReg;
|
||
#ifdef SHARK
|
||
u_int savedints;
|
||
|
||
savedints = disable_interrupts(I32_bit | F32_bit);
|
||
#endif
|
||
|
||
sequoiaRead(SEQUOIA_2GPIO,&seqReg);
|
||
|
||
if (testPin)
|
||
{
|
||
testPin = 0;
|
||
CLR(seqReg,SCR_BUGA);
|
||
}
|
||
else
|
||
{
|
||
SET(seqReg,SCR_BUGA);
|
||
testPin = 1;
|
||
}
|
||
sequoiaWrite(SEQUOIA_2GPIO,seqReg);
|
||
#ifdef SHARK
|
||
restore_interrupts(savedints);
|
||
#endif
|
||
}
|
||
|