494 lines
14 KiB
Plaintext
494 lines
14 KiB
Plaintext
* $NetBSD: gen_except.sa,v 1.3 1994/10/26 07:49:07 cgd Exp $
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* MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
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* M68000 Hi-Performance Microprocessor Division
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* M68040 Software Package
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*
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* M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
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* All rights reserved.
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*
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* THE SOFTWARE is provided on an "AS IS" basis and without warranty.
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* To the maximum extent permitted by applicable law,
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* MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
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* INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
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* PARTICULAR PURPOSE and any warranty against infringement with
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* regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
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* and any accompanying written materials.
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*
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* To the maximum extent permitted by applicable law,
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* IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
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* (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
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* PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
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* OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
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* SOFTWARE. Motorola assumes no responsibility for the maintenance
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* and support of the SOFTWARE.
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*
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* You are hereby granted a copyright license to use, modify, and
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* distribute the SOFTWARE so long as this entire notice is retained
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* without alteration in any modified and/or redistributed versions,
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* and that such modified versions are clearly identified as such.
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* No licenses are granted by implication, estoppel or otherwise
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* under any patents or trademarks of Motorola, Inc.
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*
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* gen_except.sa 3.7 1/16/92
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*
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* gen_except --- FPSP routine to detect reportable exceptions
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*
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* This routine compares the exception enable byte of the
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* user_fpcr on the stack with the exception status byte
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* of the user_fpsr.
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*
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* Any routine which may report an exceptions must load
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* the stack frame in memory with the exceptional operand(s).
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*
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* Priority for exceptions is:
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*
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* Highest: bsun
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* snan
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* operr
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* ovfl
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* unfl
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* dz
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* inex2
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* Lowest: inex1
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*
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* Note: The IEEE standard specifies that inex2 is to be
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* reported if ovfl occurs and the ovfl enable bit is not
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* set but the inex2 enable bit is.
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*
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GEN_EXCEPT IDNT 2,1 Motorola 040 Floating Point Software Package
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section 8
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include fpsp.h
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xref real_trace
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xref fpsp_done
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xref fpsp_fmt_error
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exc_tbl:
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dc.l bsun_exc
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dc.l commonE1
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dc.l commonE1
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dc.l ovfl_unfl
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dc.l ovfl_unfl
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dc.l commonE1
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dc.l commonE3
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dc.l commonE3
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dc.l no_match
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xdef gen_except
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gen_except:
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cmpi.b #IDLE_SIZE-4,1(a7) ;test for idle frame
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beq.w do_check ;go handle idle frame
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cmpi.b #UNIMP_40_SIZE-4,1(a7) ;test for orig unimp frame
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beq.b unimp_x ;go handle unimp frame
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cmpi.b #UNIMP_41_SIZE-4,1(a7) ;test for rev unimp frame
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beq.b unimp_x ;go handle unimp frame
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cmpi.b #BUSY_SIZE-4,1(a7) ;if size <> $60, fmt error
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bne.l fpsp_fmt_error
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lea.l BUSY_SIZE+LOCAL_SIZE(a7),a1 ;init a1 so fpsp.h
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* ;equates will work
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* Fix up the new busy frame with entries from the unimp frame
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*
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move.l ETEMP_EX(a6),ETEMP_EX(a1) ;copy etemp from unimp
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move.l ETEMP_HI(a6),ETEMP_HI(a1) ;frame to busy frame
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move.l ETEMP_LO(a6),ETEMP_LO(a1)
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move.l CMDREG1B(a6),CMDREG1B(a1) ;set inst in frame to unimp
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move.l CMDREG1B(a6),d0 ;fix cmd1b to make it
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and.l #$03c30000,d0 ;work for cmd3b
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bfextu CMDREG1B(a6){13:1},d1 ;extract bit 2
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lsl.l #5,d1
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swap d1
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or.l d1,d0 ;put it in the right place
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bfextu CMDREG1B(a6){10:3},d1 ;extract bit 3,4,5
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lsl.l #2,d1
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swap d1
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or.l d1,d0 ;put them in the right place
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move.l d0,CMDREG3B(a1) ;in the busy frame
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*
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* Or in the FPSR from the emulation with the USER_FPSR on the stack.
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*
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fmove.l FPSR,d0
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or.l d0,USER_FPSR(a6)
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move.l USER_FPSR(a6),FPSR_SHADOW(a1) ;set exc bits
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or.l #sx_mask,E_BYTE(a1)
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bra do_clean
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*
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* Frame is an unimp frame possible resulting from an fmove <ea>,fp0
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* that caused an exception
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*
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* a1 is modified to point into the new frame allowing fpsp equates
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* to be valid.
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*
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unimp_x:
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cmpi.b #UNIMP_40_SIZE-4,1(a7) ;test for orig unimp frame
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bne.b test_rev
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lea.l UNIMP_40_SIZE+LOCAL_SIZE(a7),a1
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bra.b unimp_con
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test_rev:
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cmpi.b #UNIMP_41_SIZE-4,1(a7) ;test for rev unimp frame
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bne.l fpsp_fmt_error ;if not $28 or $30
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lea.l UNIMP_41_SIZE+LOCAL_SIZE(a7),a1
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unimp_con:
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*
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* Fix up the new unimp frame with entries from the old unimp frame
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*
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move.l CMDREG1B(a6),CMDREG1B(a1) ;set inst in frame to unimp
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*
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* Or in the FPSR from the emulation with the USER_FPSR on the stack.
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*
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fmove.l FPSR,d0
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or.l d0,USER_FPSR(a6)
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bra do_clean
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*
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* Frame is idle, so check for exceptions reported through
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* USER_FPSR and set the unimp frame accordingly.
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* A7 must be incremented to the point before the
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* idle fsave vector to the unimp vector.
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*
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do_check:
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add.l #4,A7 ;point A7 back to unimp frame
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*
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* Or in the FPSR from the emulation with the USER_FPSR on the stack.
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*
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fmove.l FPSR,d0
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or.l d0,USER_FPSR(a6)
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*
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* On a busy frame, we must clear the nmnexc bits.
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*
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cmpi.b #BUSY_SIZE-4,1(a7) ;check frame type
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bne.b check_fr ;if busy, clr nmnexc
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clr.w NMNEXC(a6) ;clr nmnexc & nmcexc
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btst.b #5,CMDREG1B(a6) ;test for fmove out
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bne.b frame_com
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move.l USER_FPSR(a6),FPSR_SHADOW(a6) ;set exc bits
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or.l #sx_mask,E_BYTE(a6)
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bra.b frame_com
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check_fr:
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cmp.b #UNIMP_40_SIZE-4,1(a7)
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beq.b frame_com
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clr.w NMNEXC(a6)
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frame_com:
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move.b FPCR_ENABLE(a6),d0 ;get fpcr enable byte
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and.b FPSR_EXCEPT(a6),d0 ;and in the fpsr exc byte
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bfffo d0{24:8},d1 ;test for first set bit
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lea.l exc_tbl,a0 ;load jmp table address
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subi.b #24,d1 ;normalize bit offset to 0-8
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move.l (a0,d1.w*4),a0 ;load routine address based
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* ;based on first enabled exc
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jmp (a0) ;jump to routine
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*
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* Bsun is not possible in unimp or unsupp
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*
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bsun_exc:
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bra do_clean
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*
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* The typical work to be done to the unimp frame to report an
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* exception is to set the E1/E3 byte and clr the U flag.
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* commonE1 does this for E1 exceptions, which are snan,
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* operr, and dz. commonE3 does this for E3 exceptions, which
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* are inex2 and inex1, and also clears the E1 exception bit
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* left over from the unimp exception.
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*
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commonE1:
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bset.b #E1,E_BYTE(a6) ;set E1 flag
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bra.w commonE ;go clean and exit
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commonE3:
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tst.b UFLG_TMP(a6) ;test flag for unsup/unimp state
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bne.b unsE3
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uniE3:
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bset.b #E3,E_BYTE(a6) ;set E3 flag
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bclr.b #E1,E_BYTE(a6) ;clr E1 from unimp
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bra.w commonE
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unsE3:
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tst.b RES_FLG(a6)
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bne.b unsE3_0
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unsE3_1:
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bset.b #E3,E_BYTE(a6) ;set E3 flag
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unsE3_0:
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bclr.b #E1,E_BYTE(a6) ;clr E1 flag
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move.l CMDREG1B(a6),d0
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and.l #$03c30000,d0 ;work for cmd3b
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bfextu CMDREG1B(a6){13:1},d1 ;extract bit 2
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lsl.l #5,d1
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swap d1
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or.l d1,d0 ;put it in the right place
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bfextu CMDREG1B(a6){10:3},d1 ;extract bit 3,4,5
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lsl.l #2,d1
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swap d1
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or.l d1,d0 ;put them in the right place
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move.l d0,CMDREG3B(a6) ;in the busy frame
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commonE:
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bclr.b #UFLAG,T_BYTE(a6) ;clr U flag from unimp
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bra.w do_clean ;go clean and exit
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*
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* No bits in the enable byte match existing exceptions. Check for
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* the case of the ovfl exc without the ovfl enabled, but with
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* inex2 enabled.
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*
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no_match:
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btst.b #inex2_bit,FPCR_ENABLE(a6) ;check for ovfl/inex2 case
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beq.b no_exc ;if clear, exit
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btst.b #ovfl_bit,FPSR_EXCEPT(a6) ;now check ovfl
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beq.b no_exc ;if clear, exit
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bra.b ovfl_unfl ;go to unfl_ovfl to determine if
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* ;it is an unsupp or unimp exc
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* No exceptions are to be reported. If the instruction was
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* unimplemented, no FPU restore is necessary. If it was
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* unsupported, we must perform the restore.
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no_exc:
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tst.b UFLG_TMP(a6) ;test flag for unsupp/unimp state
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beq.b uni_no_exc
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uns_no_exc:
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tst.b RES_FLG(a6) ;check if frestore is needed
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bne.w do_clean ;if clear, no frestore needed
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uni_no_exc:
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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unlk a6
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bra finish_up
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*
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* Unsupported Data Type Handler:
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* Ovfl:
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* An fmoveout that results in an overflow is reported this way.
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* Unfl:
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* An fmoveout that results in an underflow is reported this way.
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*
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* Unimplemented Instruction Handler:
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* Ovfl:
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* Only scosh, setox, ssinh, stwotox, and scale can set overflow in
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* this manner.
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* Unfl:
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* Stwotox, setox, and scale can set underflow in this manner.
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* Any of the other Library Routines such that f(x)=x in which
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* x is an extended denorm can report an underflow exception.
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* It is the responsibility of the exception-causing exception
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* to make sure that WBTEMP is correct.
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*
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* The exceptional operand is in FP_SCR1.
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*
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ovfl_unfl:
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tst.b UFLG_TMP(a6) ;test flag for unsupp/unimp state
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beq.b ofuf_con
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*
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* The caller was from an unsupported data type trap. Test if the
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* caller set CU_ONLY. If so, the exceptional operand is expected in
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* FPTEMP, rather than WBTEMP.
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*
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tst.b CU_ONLY(a6) ;test if inst is cu-only
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beq.w unsE3
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* move.w #$fe,CU_SAVEPC(a6)
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clr.b CU_SAVEPC(a6)
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bset.b #E1,E_BYTE(a6) ;set E1 exception flag
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move.w ETEMP_EX(a6),FPTEMP_EX(a6)
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move.l ETEMP_HI(a6),FPTEMP_HI(a6)
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move.l ETEMP_LO(a6),FPTEMP_LO(a6)
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bset.b #fptemp15_bit,DTAG(a6) ;set fpte15
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bclr.b #UFLAG,T_BYTE(a6) ;clr U flag from unimp
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bra.w do_clean ;go clean and exit
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ofuf_con:
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move.b (a7),VER_TMP(a6) ;save version number
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cmpi.b #BUSY_SIZE-4,1(a7) ;check for busy frame
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beq.b busy_fr ;if unimp, grow to busy
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cmpi.b #VER_40,(a7) ;test for orig unimp frame
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bne.b try_41 ;if not, test for rev frame
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moveq.l #13,d0 ;need to zero 14 lwords
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bra.b ofuf_fin
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try_41:
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cmpi.b #VER_41,(a7) ;test for rev unimp frame
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bne.l fpsp_fmt_error ;if neither, exit with error
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moveq.l #11,d0 ;need to zero 12 lwords
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ofuf_fin:
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clr.l (a7)
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loop1:
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clr.l -(a7) ;clear and dec a7
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dbra.w d0,loop1
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move.b VER_TMP(a6),(a7)
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move.b #BUSY_SIZE-4,1(a7) ;write busy fmt word.
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busy_fr:
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move.l FP_SCR1(a6),WBTEMP_EX(a6) ;write
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move.l FP_SCR1+4(a6),WBTEMP_HI(a6) ;execptional op to
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move.l FP_SCR1+8(a6),WBTEMP_LO(a6) ;wbtemp
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bset.b #E3,E_BYTE(a6) ;set E3 flag
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bclr.b #E1,E_BYTE(a6) ;make sure E1 is clear
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bclr.b #UFLAG,T_BYTE(a6) ;clr U flag
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move.l USER_FPSR(a6),FPSR_SHADOW(a6)
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or.l #sx_mask,E_BYTE(a6)
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move.l CMDREG1B(a6),d0 ;fix cmd1b to make it
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and.l #$03c30000,d0 ;work for cmd3b
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bfextu CMDREG1B(a6){13:1},d1 ;extract bit 2
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lsl.l #5,d1
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swap d1
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or.l d1,d0 ;put it in the right place
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bfextu CMDREG1B(a6){10:3},d1 ;extract bit 3,4,5
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lsl.l #2,d1
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swap d1
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or.l d1,d0 ;put them in the right place
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move.l d0,CMDREG3B(a6) ;in the busy frame
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*
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* Check if the frame to be restored is busy or unimp.
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*** NOTE *** Bug fix for errata (0d43b #3)
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* If the frame is unimp, we must create a busy frame to
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* fix the bug with the nmnexc bits in cases in which they
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* are set by a previous instruction and not cleared by
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* the save. The frame will be unimp only if the final
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* instruction in an emulation routine caused the exception
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* by doing an fmove <ea>,fp0. The exception operand, in
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* internal format, is in fptemp.
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*
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do_clean:
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cmpi.b #UNIMP_40_SIZE-4,1(a7)
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bne.b do_con
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moveq.l #13,d0 ;in orig, need to zero 14 lwords
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bra.b do_build
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do_con:
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cmpi.b #UNIMP_41_SIZE-4,1(a7)
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bne.b do_restore ;frame must be busy
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moveq.l #11,d0 ;in rev, need to zero 12 lwords
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do_build:
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move.b (a7),VER_TMP(a6)
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clr.l (a7)
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loop2:
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clr.l -(a7) ;clear and dec a7
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dbra.w d0,loop2
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*
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* Use a1 as pointer into new frame. a6 is not correct if an unimp or
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* busy frame was created as the result of an exception on the final
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* instruction of an emulation routine.
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*
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* We need to set the nmcexc bits if the exception is E1. Otherwise,
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* the exc taken will be inex2.
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*
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lea.l BUSY_SIZE+LOCAL_SIZE(a7),a1 ;init a1 for new frame
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move.b VER_TMP(a6),(a7) ;write busy fmt word
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move.b #BUSY_SIZE-4,1(a7)
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move.l FP_SCR1(a6),WBTEMP_EX(a1) ;write
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move.l FP_SCR1+4(a6),WBTEMP_HI(a1) ;exceptional op to
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move.l FP_SCR1+8(a6),WBTEMP_LO(a1) ;wbtemp
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* btst.b #E1,E_BYTE(a1)
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* beq.b do_restore
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bfextu USER_FPSR(a6){17:4},d0 ;get snan/operr/ovfl/unfl bits
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bfins d0,NMCEXC(a1){4:4} ;and insert them in nmcexc
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move.l USER_FPSR(a6),FPSR_SHADOW(a1) ;set exc bits
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or.l #sx_mask,E_BYTE(a1)
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do_restore:
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movem.l USER_DA(a6),d0-d1/a0-a1
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fmovem.x USER_FP0(a6),fp0-fp3
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fmovem.l USER_FPCR(a6),fpcr/fpsr/fpiar
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frestore (a7)+
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tst.b RES_FLG(a6) ;RES_FLG indicates a "continuation" frame
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beq cont
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bsr bug1384
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cont:
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unlk a6
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*
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* If trace mode enabled, then go to trace handler. This handler
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* cannot have any fp instructions. If there are fp inst's and an
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* exception has been restored into the machine then the exception
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* will occur upon execution of the fp inst. This is not desirable
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* in the kernel (supervisor mode). See MC68040 manual Section 9.3.8.
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*
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finish_up:
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btst.b #7,(a7) ;test T1 in SR
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bne.b g_trace
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btst.b #6,(a7) ;test T0 in SR
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bne.b g_trace
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bra.l fpsp_done
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*
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* Change integer stack to look like trace stack
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* The address of the instruction that caused the
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* exception is already in the integer stack (is
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* the same as the saved friar)
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*
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* If the current frame is already a 6-word stack then all
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* that needs to be done is to change the vector# to TRACE.
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* If the frame is only a 4-word stack (meaning we got here
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* on an Unsupported data type exception), then we need to grow
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* the stack an extra 2 words and get the FPIAR from the FPU.
|
|
*
|
|
g_trace:
|
|
bftst EXC_VEC-4(sp){0:4}
|
|
bne g_easy
|
|
|
|
subq.l #4,sp make room
|
|
move.l 4(sp),(sp)
|
|
move.l 8(sp),4(sp)
|
|
sub.l #BUSY_SIZE,sp
|
|
fsave (sp)
|
|
fmove.l fpiar,BUSY_SIZE+EXC_EA-4(sp)
|
|
frestore (sp)
|
|
add.l #BUSY_SIZE,sp
|
|
|
|
g_easy:
|
|
move.w #TRACE_VEC,EXC_VEC-4(a7)
|
|
bra.l real_trace
|
|
*
|
|
* This is a work-around for hardware bug 1384.
|
|
*
|
|
bug1384:
|
|
link a5,#0
|
|
fsave -(sp)
|
|
cmpi.b #$41,(sp) ; check for correct frame
|
|
beq frame_41
|
|
bgt nofix ; if more advanced mask, do nada
|
|
|
|
frame_40:
|
|
tst.b 1(sp) ; check to see if idle
|
|
bne notidle
|
|
idle40:
|
|
clr.l (sp) ; get rid of old fsave frame
|
|
move.l d1,USER_D1(a6) ; save d1
|
|
move.w #8,d1 ; place unimp frame instead
|
|
loop40: clr.l -(sp)
|
|
dbra d1,loop40
|
|
move.l USER_D1(a6),d1 ; restore d1
|
|
move.l #$40280000,-(sp)
|
|
frestore (sp)+
|
|
unlk a5
|
|
rts
|
|
|
|
frame_41:
|
|
tst.b 1(sp) ; check to see if idle
|
|
bne notidle
|
|
idle41:
|
|
clr.l (sp) ; get rid of old fsave frame
|
|
move.l d1,USER_D1(a6) ; save d1
|
|
move.w #10,d1 ; place unimp frame instead
|
|
loop41: clr.l -(sp)
|
|
dbra d1,loop41
|
|
move.l USER_D1(a6),d1 ; restore d1
|
|
move.l #$41300000,-(sp)
|
|
frestore (sp)+
|
|
unlk a5
|
|
rts
|
|
|
|
notidle:
|
|
bclr.b #etemp15_bit,-40(a5)
|
|
frestore (sp)+
|
|
unlk a5
|
|
rts
|
|
|
|
nofix:
|
|
frestore (sp)+
|
|
unlk a5
|
|
rts
|
|
|
|
end
|