394 lines
10 KiB
C
394 lines
10 KiB
C
/* $NetBSD: isa_machdep.c,v 1.4 2001/08/30 02:08:44 briggs Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)isa.c 7.2 (Berkeley) 5/13/91
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <machine/pio.h>
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#include <machine/intr.h>
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#include <machine/openpicreg.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <sandpoint/isa/icu.h>
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#define IRQ_SLAVE 2
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static void *isa_irqh;
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static int isa_pending;
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static int isa_reg_level=0xffff;
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static struct intrhand *isa_intrhand[16];
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static int isa_intrtype[16];
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static int isa_intrmask[16];
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static void isa_intr_mask __P((int));
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static void isa_intr_clear __P((int));
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static int do_isa_intr __P((void *));
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static int isa_intr __P((void));
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const struct evcnt *
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isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
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{
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/* XXX for now, no evcnt parent reported */
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return NULL;
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}
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static int
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do_isa_intr(void *iarg)
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{
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int irq, intbit;
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struct intrhand *ih;
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extern int sandpoint_icpl;
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irq = isa_intr();
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if (irq == -1)
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goto out;
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do {
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if (isa_intrmask[irq] & sandpoint_icpl) {
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intbit = 1 << irq;
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isa_pending |= intbit;
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isa_intr_clear(irq);
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isa_intr_mask(isa_pending);
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setsoftisa();
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} else {
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isa_intr_clear(irq);
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ih = isa_intrhand[irq];
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while (ih) {
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(*ih->ih_fun)(ih->ih_arg);
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ih = ih->ih_next;
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}
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}
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irq = isa_intr();
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} while (irq != -1);
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out:
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return 0;
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}
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/*
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* Set up an interrupt handler to start being called.
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*/
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void *
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isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
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isa_chipset_tag_t ic;
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int irq;
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int type;
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int level;
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int (*ih_fun) __P((void *));
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void *ih_arg;
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{
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extern int fakeintr(void *arg);
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extern char *intr_typename(int);
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struct intrhand **p, *q, *ih;
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static struct intrhand fakehand = {fakeintr};
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if (irq < 0 || irq > 15)
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panic("isa_intr_establish: bogus irq or type");
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ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
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if (ih == NULL)
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panic("isa_intr_establish: can't malloc handler info");
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switch (isa_intrtype[irq]) {
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case IST_NONE:
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isa_intrtype[irq] = type;
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break;
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case IST_EDGE:
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case IST_LEVEL:
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if (type == isa_intrtype[irq])
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break;
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case IST_PULSE:
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if (type != IST_NONE) {
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panic("isa_intr_establish: can't share %s with %s",
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intr_typename(isa_intrtype[irq]),
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intr_typename(type));
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}
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}
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for (p = &isa_intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
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;
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fakehand.ih_level = level;
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*p = &fakehand;
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isa_intr_calculate_masks(0);
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ih->ih_fun = ih_fun;
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ih->ih_arg = ih_arg;
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ih->ih_count = 0;
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ih->ih_next = NULL;
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ih->ih_level = level;
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ih->ih_irq = irq;
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*p = ih;
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if (level < isa_reg_level) {
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if (isa_irqh) {
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intr_disestablish(isa_irqh);
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}
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isa_irqh = intr_establish(SANDPOINT_INTR_ISA, IST_LEVEL, level,
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do_isa_intr, NULL);
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isa_reg_level = level;
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}
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return ih;
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}
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void
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isa_do_pending_int(int pcpl)
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{
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struct intrhand *ih;
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int irq;
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/* Interrupts disabled & reentrancy prevented by caller */
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for (irq=0 ; irq<16 ; irq++) {
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if ( (isa_pending & (1 << irq))
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&& ((isa_intrmask[irq] & pcpl) == 0)) {
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isa_pending &= ~(1 << irq);
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ih = isa_intrhand[irq];
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while (ih) {
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(*ih->ih_fun)(ih->ih_arg);
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ih = ih->ih_next;
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}
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}
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}
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isa_intr_mask(isa_pending);
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}
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void
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isa_intr_calculate_masks(int reset_level)
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{
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int irq, minlevel, irqs;
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struct intrhand **p, *q;
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/*
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* calculate isa_intrmasks so that bits are set according to
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* spl levels so that the mask in do_isa_intr is valid.
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*/
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/* First, clear masks */
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for (irq=0 ; irq<16 ; irq++) {
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isa_intrmask[irq] = 0;
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}
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irqs = 0;
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minlevel = 0xffff;
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for (irq=0 ; irq<16 ; irq++) {
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if (isa_intrhand[irq]) {
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irqs |= 1 << irq;
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}
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for (p = &isa_intrhand[irq]; (q = *p) != NULL;
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p = &q->ih_next) {
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isa_intrmask[irq] |= (1 << q->ih_level);
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if (q->ih_level < minlevel) {
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minlevel = q->ih_level;
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}
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}
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}
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isa_intr_mask(~irqs);
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if (reset_level && minlevel != 0xffff) {
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if (minlevel != isa_reg_level) {
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if (isa_irqh) {
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intr_disestablish(isa_irqh);
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}
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isa_irqh = intr_establish(SANDPOINT_INTR_ISA,
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IST_LEVEL, minlevel, do_isa_intr, NULL);
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isa_reg_level = minlevel;
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}
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}
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}
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/*
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* Deregister an interrupt handler.
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*/
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void
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isa_intr_disestablish(ic, arg)
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isa_chipset_tag_t ic;
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void *arg;
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{
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struct intrhand *ih = arg;
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int irq = ih->ih_irq, cpl;
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struct intrhand **p, *q;
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if (irq < 0 || irq > 15)
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panic("intr_disestablish: bogus irq");
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cpl = splhigh();
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for (p = &isa_intrhand[irq]; (q = *p) != NULL && q != ih;
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p = &q->ih_next)
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;
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if (q)
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*p = q->ih_next;
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else
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panic("isa_intr_disestablish: handler not registered");
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free((void *)ih, M_DEVBUF);
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isa_intr_calculate_masks(1);
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if (isa_intrhand[irq] == NULL) {
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isa_intrtype[irq] = IST_NONE;
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}
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splx(cpl);
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}
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#define SUPERIO_CONF_IDX 0x15C
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#define SUPERIO_CONF_DATA 0x15D
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#define SUPERIO_CONF_LDN 0x07
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#define SUPERIO_CONF_ACTIVATE 0x30
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#define SUPERIO_CONF_CFG1_ATDRIVE 0x04
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void
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isa_attach_hook(parent, self, iba)
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struct device *parent, *self;
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struct isabus_attach_args *iba;
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{
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u_int8_t cfg;
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int ldn;
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/* Set PS/2 drive mode */
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isa_outb(SUPERIO_CONF_IDX, 0x21);
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cfg = isa_inb(SUPERIO_CONF_DATA);
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cfg &= ~SUPERIO_CONF_CFG1_ATDRIVE;
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isa_outb(SUPERIO_CONF_DATA, cfg);
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/* Enable the 9 Super I/O devices. */
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for (ldn=0; ldn <= 8; ldn++) {
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isa_outb(SUPERIO_CONF_IDX, SUPERIO_CONF_LDN);
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isa_outb(SUPERIO_CONF_DATA, ldn);
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isa_outb(SUPERIO_CONF_IDX, SUPERIO_CONF_ACTIVATE);
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isa_outb(SUPERIO_CONF_DATA, 0x01);
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}
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}
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static int
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isa_intr(void)
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{
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int irq;
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isa_outb(IO_ICU1, 0x0c);
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irq = isa_inb(IO_ICU1);
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if (!(irq & 0x80)) {
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return -1;
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}
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irq &= 0x07;
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if (irq == IRQ_SLAVE) {
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isa_outb(IO_ICU2, 0x0c);
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irq = (isa_inb(IO_ICU2+1) & 0x07) + 8;
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}
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return (irq);
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}
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void
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isa_intr_mask(int mask)
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{
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isa_outb(IO_ICU1 + 1, mask);
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isa_outb(IO_ICU2 + 1, mask >> 8);
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}
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static void
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isa_intr_clear(irq)
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int irq;
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{
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if (irq < 8) {
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isa_outb(IO_ICU1, 0x60 | irq);
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} else {
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isa_outb(IO_ICU2, 0x60 | (irq%8));
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isa_outb(IO_ICU1, 0x60 | IRQ_SLAVE);
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}
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}
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void
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isa_intr_init(void)
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{
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isa_outb(IO_ICU1, 0x19);
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isa_outb(IO_ICU1+1, 0);
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isa_outb(IO_ICU1+1, 1 << IRQ_SLAVE);
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isa_outb(IO_ICU1+1, 3);
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isa_outb(IO_ICU1+1, 0xff);
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isa_outb(IO_ICU1, 0x68);
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isa_outb(IO_ICU1, 0x0a);
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isa_outb(IO_ICU2, 0x19);
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isa_outb(IO_ICU2+1, 8);
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isa_outb(IO_ICU2+1, IRQ_SLAVE);
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isa_outb(IO_ICU2+1, 3);
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isa_outb(IO_ICU2+1, 0xff);
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isa_outb(IO_ICU2, 0x68);
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isa_outb(IO_ICU2, 0x0a);
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}
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