a9e02c7638
ldr rX, [rY, rZ, ror #16] and even: ldr rX, [rY, rZ, rrx] Why anyone would want such an instruction is beyond me, but it's nice not to panic if they do. Also this makes regress/sys/arch/arm/abort-fixup pass. |
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acorn26 | ||
compile | ||
conf | ||
include | ||
iobus | ||
ioc | ||
podulebus | ||
stand | ||
vidc | ||
Makefile |