225 lines
6.4 KiB
C
225 lines
6.4 KiB
C
/* $NetBSD: macros.h,v 1.13 1997/11/05 04:23:35 thorpej Exp $ */
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/*
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed at Ludd, University of Lule}.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* All bugs are subject to removal without further notice */
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#if !defined(_VAX_MACROS_H_) && !defined(STANDALONE) && \
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(!defined(_LOCORE) && defined(_VAX_INLINE_))
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#define _VAX_MACROS_H_
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/* Here general macros are supposed to be stored */
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static __inline__ int ffs(int reg){
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register int val;
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__asm__ __volatile ("ffs $0,$32,%1,%0
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bneq 1f
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mnegl $1,%0
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1: incl %0"
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: "&=r" (val)
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: "r" (reg) );
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return val;
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}
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static __inline__ void _remque(void*p){
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__asm__ __volatile ("remque (%0),%0;clrl 4(%0)"
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:
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: "r" (p)
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: "memory" );
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}
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static __inline__ void _insque(void*p, void*q) {
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__asm__ __volatile ("insque (%0), (%1)"
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:
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: "r" (p),"r" (q)
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: "memory" );
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}
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#define bitset(bitnr,var) \
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({ __asm__ __volatile ("bbss %0,%1,1f;1:;" \
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: \
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: "g" (bitnr), "g" (var)); \
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})
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#define bitclear(bitnr,var) \
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({ __asm__ __volatile ("bbsc %0,%1,1f;1:;" \
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: \
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: "g" (bitnr), "g" (var)); \
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})
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#define bitisset(bitnr,var) \
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({ \
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register int val; \
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__asm__ __volatile ("clrl %0;bbc %1,%2,1f;incl %0;1:;" \
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: "=g" (val) \
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: "g" (bitnr), "g" (var)); \
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val; \
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})
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#define bitisclear(bitnr,var) \
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({ \
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register int val; \
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__asm__ __volatile ("clrl %0;bbs %1,%2,1f;incl %0;1:;" \
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: "=g" (val) \
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: "g" (bitnr), "g" (var)); \
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val; \
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})
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static __inline__ void bcopy(const void*from, void*toe, u_int len) {
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__asm__ __volatile ("movc3 %0,(%1),(%2)"
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:
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: "r" (len),"r" (from),"r"(toe)
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:"r0","r1","r2","r3","r4","r5");
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}
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static __inline__ void bzero(void*block, u_int len){
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__asm__ __volatile ("movc5 $0,(%0),$0,%1,(%0)"
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:
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: "r" (block), "r" (len)
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:"r0","r1","r2","r3","r4","r5");
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}
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static __inline__ int bcmp(const void *b1, const void *b2, size_t len){
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register ret;
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__asm__ __volatile("cmpc3 %3,(%1),(%2);movl r0,%0"
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: "=r" (ret)
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: "r" (b1), "r" (b2), "r" (len)
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: "r0","r1","r2","r3" );
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return ret;
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}
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#if 0 /* unused, but no point in deleting it since it _is_ an instruction */
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static __inline__ int locc(int mask, char *cp,u_int size){
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register ret;
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__asm__ __volatile("locc %1,%2,(%3);movl r0,%0"
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: "=r" (ret)
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: "r" (mask),"r"(size),"r"(cp)
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: "r0","r1" );
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return ret;
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}
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#endif
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static __inline__ int
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scanc(u_int size, const u_char *cp, const u_char *table, int mask){
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register ret;
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__asm__ __volatile("scanc %1,(%2),(%3),%4;movl r0,%0"
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: "=g"(ret)
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: "r"(size),"r"(cp),"r"(table),"r"(mask)
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: "r0","r1","r2","r3" );
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return ret;
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}
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static __inline__ int skpc(int mask, size_t size, u_char *cp){
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register ret;
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__asm__ __volatile("skpc %1,%2,(%3);movl r0,%0"
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: "=g"(ret)
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: "r"(mask),"r"(size),"r"(cp)
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: "r0","r1" );
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return ret;
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}
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#if 0
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static __inline__ int imin(int a, int b){
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__asm__ __volatile("cmpl %0,%2;bleq 1f;movl %2,%0;1:"
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: "=r"(a)
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: "r"(a),"r"(b) );
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return a;
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}
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static __inline__ int imax(int a, int b){
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__asm__ __volatile("cmpl %0,%2;bgeq 1f;movl %2,%0;1:"
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: "=r"(a)
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: "r"(a),"r"(b) );
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return a;
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}
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static __inline__ int min(int a, int b){
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__asm__ __volatile("cmpl %0,%2;bleq 1f;movl %2,%0;1:"
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: "=r"(a)
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: "r"(a),"r"(b) );
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return a;
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}
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static __inline__ int max(int a, int b){
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__asm__ __volatile("cmpl %0,%2;bgeq 1f;movl %2,%0;1:"
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: "=r"(a)
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: "r"(a),"r"(b) );
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return a;
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}
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#endif
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static __inline__ void blkcpy(const void*from, void*to, u_int len) {
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__asm__ __volatile("
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movl %0,r1
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movl %1,r3
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movl %2,r6
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jbr 2f
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1: subl2 r0,r6
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movc3 r0,(r1),(r3)
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2: movzwl $65535,r0
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cmpl r6,r0
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jgtr 1b
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movc3 r6,(r1),(r3)"
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:
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: "g" (from), "g" (to), "g" (len)
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: "r0","r1","r2","r3","r4","r5", "r6" );
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}
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static __inline__ void blkclr(void *blk, int len) {
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__asm__ __volatile("
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movl %0, r3
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movl %1, r6
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jbr 2f
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1: subl2 r0, r6
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movc5 $0,(r3),$0,r0,(r3)
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2: movzwl $65535,r0
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cmpl r6, r0
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jgtr 1b
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movc5 $0,(r3),$0,r6,(r3)"
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:
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: "g" (blk), "g" (len)
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: "r0","r1","r2","r3","r4","r5", "r6" );
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}
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#define setrunqueue(p) \
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__asm__ __volatile("movl %0,r0;jsb Setrq":: "g"(p):"r0","r1","r2");
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#define remrunqueue(p) \
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__asm__ __volatile("movl %0,r0;jsb Remrq":: "g"(p):"r0","r1","r2");
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#define cpu_switch(p) \
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__asm__ __volatile("movl %0,r0;movpsl -(sp);jsb Swtch" \
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::"g"(p):"r0","r1","r2","r3");
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#endif /* _VAX_MACROS_H_ */
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