242 lines
6.4 KiB
C
242 lines
6.4 KiB
C
/* $NetBSD: psl.h,v 1.15 1996/02/01 22:32:00 mycroft Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)psl.h 5.2 (Berkeley) 1/18/91
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*/
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#ifndef _NS532_PSL_H_
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#define _NS532_PSL_H_
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/*
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* 32532 processor status longword.
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*/
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#define PSL_C 0x00000001 /* carry bit */
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#define PSL_T 0x00000002 /* trace enable bit */
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#define PSL_L 0x00000004 /* less bit */
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#define PSL_V 0x00000010 /* overflow bit */
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#define PSL_F 0x00000020 /* flag bit */
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#define PSL_Z 0x00000040 /* zero bit */
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#define PSL_N 0x00000080 /* negative bit */
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#define PSL_USER 0x00000100 /* User mode bit */
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#define PSL_US 0x00000200 /* User stack mode bit */
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#define PSL_P 0x00000400 /* Prevent TRC trap */
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#define PSL_I 0x00000800 /* interrupt enable bit */
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#define PSL_USERSET (PSL_USER | PSL_US | PSL_I)
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#define PSL_USERSTATIC (PSL_USER | PSL_US | PSL_I)
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#define USERMODE(psr) (((psr) & PSL_USER) == PSL_USER)
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/* The PSR versions ... */
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#define PSR_USR PSL_USER
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#ifdef _KERNEL
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#include <machine/icu.h>
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/*
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* Interrupt levels
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*/
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#define IPL_NONE -1
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#define IPL_ZERO 0 /* level 0 */
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#define IPL_BIO 1 /* block I/O */
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#define IPL_NET 2 /* network */
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#define IPL_TTY 3 /* terminal */
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#define IPL_CLOCK 4 /* clock */
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#define IPL_IMP 5 /* memory allocation */
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#define NIPL 6 /* number of interrupt priority levels */
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#define IPL_NAMES {"zero", "bio", "net", "tty", "clock", "imp"}
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/*
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* Preassigned software interrupts
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*/
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#define SOFTINT 16
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#define SIR_CLOCK (SOFTINT+0)
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#define SIR_CLOCKMASK (1 << SIR_CLOCK)
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#define SIR_NET (SOFTINT+1)
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#define SIR_NETMASK ((1 << SIR_NET) | SIR_CLOCKMASK)
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#define SIR_ALLMASK 0xffff0000
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#ifndef _LOCORE
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/*
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* Structure of the software interrupt table
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*/
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struct iv {
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void (*iv_vec)();
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void *iv_arg;
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int iv_cnt;
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char *iv_use;
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};
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extern unsigned int imask[], Cur_pl, idisabled, sirpending, astpending;
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extern void intr_init();
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extern void check_sir();
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extern int intr_establish(int, void (*)(), void *, char *, int, int);
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extern struct iv ivt[];
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/*
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* Disable/Enable CPU-Interrupts
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*/
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#define di() /* Removing the nop will give you *BIG* trouble */ \
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__asm __volatile("bicpsrw 0x800 ; nop" : : : "cc")
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#define ei() __asm __volatile("bispsrw 0x800" : : : "cc")
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/*
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* Globaly disable/enable specific interrupts
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* (overriding spl0)
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*/
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#define intr_disable(ir) do { \
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di(); \
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ICUW(IMSK) = Cur_pl | (idisabled |= (1 << ir)); \
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ei(); \
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} while(0)
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#define intr_enable(ir) do { \
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di(); \
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ICUW(IMSK) = Cur_pl | (idisabled &= ~(1 << ir)); \
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ei(); \
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} while(0)
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/*
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* Add a mask to Cur_pl, and return the old value of Cur_pl.
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*/
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#if !defined(NO_INLINE_SPLX) || defined(DEFINE_SPLX)
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# ifndef NO_INLINE_SPLX
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static __inline
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# endif
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int
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splraise(register int ncpl)
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{
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register int ocpl;
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di();
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ocpl = Cur_pl;
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ncpl |= ocpl;
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ICUW(IMSK) = ncpl | idisabled;
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Cur_pl = ncpl;
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ei();
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return(ocpl);
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}
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/*
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* Restore a value to Cur_pl (unmasking interrupts).
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*
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* NOTE: We go to the trouble of returning the old value of cpl for
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* the benefit of some splsoftclock() callers. This extra work is
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* usually optimized away by the compiler.
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*/
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# ifndef DEFINE_SPLX
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static
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# endif
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# ifndef NO_INLINE_SPLX
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__inline
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# endif
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int
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splx(register int ncpl)
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{
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register int ocpl;
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di();
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ocpl = Cur_pl;
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ICUW(IMSK) = ncpl | idisabled;
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Cur_pl = ncpl;
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if (sirpending && ncpl == imask[IPL_ZERO]) {
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Cur_pl |= SIR_ALLMASK;
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check_sir();
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Cur_pl = ncpl;
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}
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ei();
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return (ocpl);
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}
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/*
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* This special version of splx returns with interrupts disabled.
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*/
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# ifdef DEFINE_SPLX
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int
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splx_di(register int ncpl)
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{
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register int ocpl;
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di();
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ocpl = Cur_pl;
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ICUW(IMSK) = ncpl | idisabled;
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Cur_pl = ncpl;
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if (sirpending && ncpl == imask[IPL_ZERO]) {
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Cur_pl |= SIR_ALLMASK;
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check_sir();
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Cur_pl = ncpl;
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}
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return (ocpl);
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}
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# endif
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#endif
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/*
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* Hardware interrupt masks
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*/
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#define splbio() splraise(imask[IPL_BIO])
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#define splnet() splraise(imask[IPL_NET])
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#define spltty() splraise(imask[IPL_TTY])
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#define splclock() splraise(imask[IPL_CLOCK])
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#define splimp() splraise(imask[IPL_IMP])
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#define splstatclock() splclock()
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/*
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* Software interrupt masks
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*
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* NOTE: splsoftclock() is used by hardclock() to lower the priority from
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* clock to softclock before it calls softclock().
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*/
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#define splsoftclock() splx(SIR_CLOCKMASK|imask[IPL_ZERO])
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#define splsoftnet() splraise(SIR_NETMASK)
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/*
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* Miscellaneous
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*/
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#define splhigh() splraise(-1)
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#define spl0() splx(imask[IPL_ZERO])
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#define splnone() spl0()
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/*
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* Software interrupt registration
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*/
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#define softintr(n) (sirpending |= (1 << (n)))
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#define setsoftast() (astpending = 1)
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#define setsoftclock() softintr(SIR_CLOCK)
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#define setsoftnet() softintr(SIR_NET)
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#endif /* !_LOCORE */
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#endif /* _KERNEL */
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#endif /* _NS532_PSL_H_ */
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