372 lines
12 KiB
C
372 lines
12 KiB
C
/* $NetBSD: adrsmap.h,v 1.3 1999/12/22 05:55:26 tsubai Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: $Hdr: adrsmap.h,v 4.300 91/06/09 06:34:29 root Rel41 $ SONY
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*
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* @(#)adrsmap.h 8.1 (Berkeley) 6/11/93
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*/
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/*
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* adrsmap.h
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*
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* Define all hardware address map.
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*/
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#ifndef __MACHINE_ADRSMAP__
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#define __MACHINE_ADRSMAP__
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/*----------------------------------------------------------------------
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* news3400
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*----------------------------------------------------------------------*/
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/*
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* timer
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*/
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#define RTC_PORT 0xbff407f8
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#define DATA_PORT 0xbff407f9
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#ifdef notdef
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#define EN_ITIMER 0xb8000004 /*XXX:???*/
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#endif
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#define INTEN0 0xbfc80000
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#define INTEN0_PERR 0x80
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#define INTEN0_ABORT 0x40
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#define INTEN0_BERR 0x20
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#define INTEN0_TIMINT 0x10
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#define INTEN0_KBDINT 0x08
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#define INTEN0_MSINT 0x04
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#define INTEN0_CFLT 0x02
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#define INTEN0_CBSY 0x01
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#define INTEN1 0xbfc80001
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#define INTEN1_BEEP 0x80
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#define INTEN1_SCC 0x40
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#define INTEN1_LANCE 0x20
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#define INTEN1_DMA 0x10
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#define INTEN1_SLOT1 0x08
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#define INTEN1_SLOT3 0x04
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#define INTEN1_EXT1 0x02
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#define INTEN1_EXT3 0x01
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#define INTST0 0xbfc80002
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#define INTST0_PERR 0x80
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#define INTST0_ABORT 0x40
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#define INTST0_BERR 0x00 /* N/A */
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#define INTST0_TIMINT 0x10
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#define INTST0_KBDINT 0x08
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#define INTST0_MSINT 0x04
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#define INTST0_CFLT 0x02
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#define INTST0_CBSY 0x01
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#define INTST0_PERR_BIT 7
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#define INTST0_ABORT_BIT 6
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#define INTST0_BERR_BIT 5 /* N/A */
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#define INTST0_TIMINT_BIT 4
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#define INTST0_KBDINT_BIT 3
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#define INTST0_MSINT_BIT 2
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#define INTST0_CFLT_BIT 1
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#define INTST0_CBSY_BIT 0
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#define INTST1 0xbfc80003
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#define INTST1_BEEP 0x80
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#define INTST1_SCC 0x40
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#define INTST1_LANCE 0x20
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#define INTST1_DMA 0x10
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#define INTST1_SLOT1 0x08
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#define INTST1_SLOT3 0x04
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#define INTST1_EXT1 0x02
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#define INTST1_EXT3 0x01
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#define INTST1_BEEP_BIT 7
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#define INTST1_SCC_BIT 6
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#define INTST1_LANCE_BIT 5
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#define INTST1_DMA_BIT 4
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#define INTST1_SLOT1_BIT 3
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#define INTST1_SLOT3_BIT 2
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#define INTST1_EXT1_BIT 1
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#define INTST1_EXT3_BIT 0
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#define INTCLR0 0xbfc80004
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#define INTCLR0_PERR 0x80
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#define INTCLR0_ABORT 0x40
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#define INTCLR0_BERR 0x20
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#define INTCLR0_TIMINT 0x10
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#define INTCLR0_KBDINT 0x00 /* N/A */
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#define INTCLR0_MSINT 0x00 /* N/A */
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#define INTCLR0_CFLT 0x02
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#define INTCLR0_CBSY 0x01
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#define INTCLR1 0xbfc80005
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#define INTCLR1_BEEP 0x80
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#define INTCLR1_SCC 0x00 /* N/A */
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#define INTCLR1_LANCE 0x00 /* N/A */
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#define INTCLR1_DMA 0x00 /* N/A */
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#define INTCLR1_SLOT1 0x00 /* N/A */
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#define INTCLR1_SLOT3 0x00 /* N/A */
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#define INTCLR1_EXT1 0x00 /* N/A */
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#define INTCLR1_EXT3 0x00 /* N/A */
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#define ITIMER 0xbfc80006
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#define IOCLOCK 4915200
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#define DIP_SWITCH 0xbfe40000
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#define IDROM 0xbfe80000
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#define DEBUG_PORT 0xbfcc0003
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#define DP_READ 0x00
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#define DP_WRITE 0xf0
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#define DP_LED0 0x01
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#define DP_LED1 0x02
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#define DP_LED2 0x04
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#define DP_LED3 0x08
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#define LANCE_PORT 0xbff80000
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#define LANCE_MEMORY 0xbffc0000
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#define ETHER_ID IDROM_PORT
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#define LANCE_PORT1 0xb8c30000 /* expansion lance #1 */
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#define LANCE_MEMORY1 0xb8c20000
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#define ETHER_ID1 0xb8c38000
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#define LANCE_PORT2 0xb8c70000 /* expansion lance #2 */
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#define LANCE_MEMORY2 0xb8c60000
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#define ETHER_ID2 0xb8c78000
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#define IDROM_PORT 0xbfe80000
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#define SCCPORT0B 0xbfec0000
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#define SCCPORT0A 0xbfec0002
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#define SCCPORT1B 0xb8c40100
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#define SCCPORT1A 0xb8c40102
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#define SCCPORT2B 0xb8c40104
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#define SCCPORT2A 0xb8c40106
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#define SCCPORT3B 0xb8c40110
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#define SCCPORT3A 0xb8c40112
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#define SCCPORT4B 0xb8c40114
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#define SCCPORT4A 0xb8c40116
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#define SCC_STATUS0 0xbfcc0002
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#define SCC_STATUS1 0xb8c40108
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#define SCC_STATUS2 0xb8c40118
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#define SCCVECT (0x1fcc0007 | MIPS_KSEG1_START)
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#define SCC_RECV 2
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#define SCC_XMIT 0
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#define SCC_CTRL 3
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#define SCC_STAT 1
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#define SCC_INT_MASK 0x6
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/*XXX: SHOULD BE FIX*/
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#define KEYB_DATA 0xbfd00000 /* keyboard data port */
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#define KEYB_STAT 0xbfd00001 /* keyboard status port */
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#define KEYB_INTE INTEN0 /* keyboard interrupt enable */
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#define KEYB_RESET 0xbfd00002 /* keyboard reset port*/
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#define KEYB_INIT1 0xbfd00003 /* keyboard speed */
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#define KEYB_INIT2 KEYB_INIT1 /* keyboard clock */
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#define KEYB_BUZZ 0xbfd40001 /* keyboard buzzer (length) */
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#define KEYB_BUZZF 0xbfd40000 /* keyboard buzzer frequency */
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#define MOUSE_DATA 0xbfd00004 /* mouse data port */
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#define MOUSE_STAT 0xbfd00005 /* mouse status port */
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#define MOUSE_INTE INTEN0 /* mouse interrupt enable */
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#define MOUSE_RESET 0xbfd00006 /* mouse reset port */
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#define MOUSE_INIT1 0xbfd00007 /* mouse speed */
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#define MOUSE_INIT2 MOUSE_INIT1 /* mouse clock */
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#define RX_MSINTE 0x04 /* Mouse Interrupt Enable */
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#define RX_KBINTE 0x08 /* Keyboard Intr. Enable */
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#define RX_MSINT 0x04 /* Mouse Interrupted */
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#define RX_KBINT 0x08 /* Keyboard Interrupted */
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#define RX_MSBUF 0x01 /* Mouse data buffer Full */
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#define RX_KBBUF 0x01 /* Keyboard data Full */
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#define RX_MSRDY 0x02 /* Mouse data ready */
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#define RX_KBRDY 0x02 /* Keyboard data ready */
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/*XXX: SHOULD BE FIX*/
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#define ABEINT_BADDR 0xbfdc0038
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#define NEWS5000_DIP_SWITCH 0xbf3d0000
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#define NEWS5000_IDROM 0xbf3c0000
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#define NEWS5000_TIMER0 0xbf800000
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#define NEWS5000_TIMER1 0xbf800004
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#define NEWS5000_TIMER1_PERIOD 0xbf80000c
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#define NEWS5000_TIMER_COUNTER 0xbf840000
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#define NEWS5000_TIMER_LOAD 0xbf840004
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#define NEWS5000_NVRAM 0xbf880000
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#define NEWS5000_NVRAM_SIZE 0x07f8
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#define NEWS5000_RTC_ADDR 0xbf881fe0
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#define NEWS5000_INTCLR0 0xbf4e0000
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#define NEWS5000_INTCLR1 0xbf4e0004
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#define NEWS5000_INTCLR2 0xbf4e0008
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#define NEWS5000_INTCLR3 0xbf4e000c
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#define NEWS5000_INTCLR4 0xbf4e0010
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#define NEWS5000_INTCLR5 0xbf4e0014
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#define NEWS5000_INTCLRNMI 0xbf4e0018
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#define NEWS5000_INTMASK0 0xbfa00000
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#define NEWS5000_INTMASK1 0xbfa00004
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#define NEWS5000_INTMASK2 0xbfa00008
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#define NEWS5000_INTMASK3 0xbfa0000c
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#define NEWS5000_INTMASK4 0xbfa00010
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#define NEWS5000_INTMASK5 0xbfa00014
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#define NEWS5000_INTMASKNMI 0xbfa00018
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#define NEWS5000_INTSTAT0 0xbfa00020
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#define NEWS5000_INTSTAT1 0xbfa00024
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#define NEWS5000_INTSTAT2 0xbfa00028
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#define NEWS5000_INTSTAT3 0xbfa0002c
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#define NEWS5000_INTSTAT4 0xbfa00030
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#define NEWS5000_INTSTAT5 0xbfa00034
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#define NEWS5000_INTSTATNMI 0xbfa00038
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#define NEWS5000_INTSLOT0 0x00000100
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#define NEWS5000_INTSLOT1 0x00000200
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#define NEWS5000_INTSLOT2 0x00000400
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#define NEWS5000_INTSLOT3 0x00000800
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#define NEWS5000_INTSLOT4 0x00001000
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#define NEWS5000_INTSLOT5 0x00002000
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#define NEWS5000_INTSLOT_ALL 0x00003f00
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/*
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* level0 intr (INTMASK0/INTSTAT0)
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*/
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#define NEWS5000_INT0_DMAC 0x0001
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#define NEWS5000_INT0_SONIC 0x0002
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#define NEWS5000_INT0_FIFO0 0x0004
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#define NEWS5000_INT0_FIFO1 0x0008
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#define NEWS5000_INT0_FDC 0x0010
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#define NEWS5000_INT0_ALL (NEWS5000_INT0_DMAC|NEWS5000_INT0_SONIC|NEWS5000_INT0_FIFO0|NEWS5000_INT0_FIFO1|NEWS5000_INT0_FDC)
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/*
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* level1 intr (INTMASK1/INTSTAT1)
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*/
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#define NEWS5000_INT1_KBD 0x0001
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#define NEWS5000_INT1_SERIAL 0x0002
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#define NEWS5000_INT1_AUDIO0 0x0004
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#define NEWS5000_INT1_AUDIO1 0x0008
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#define NEWS5000_INT1_PARALLEL 0x0020
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#define NEWS5000_INT1_FB 0x0080
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#define NEWS5000_INT1_ALL (NEWS5000_INT1_KBD|NEWS5000_INT1_SERIAL|NEWS5000_INT1_AUDIO0|NEWS5000_INT1_AUDIO1|NEWS5000_INT1_PARALLEL|NEWS5000_INT1_FB)
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/*
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* level2 intr (INTMASK2/INTSTAT2)
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*/
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#define NEWS5000_INT2_TIMER0 0x0001
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#define NEWS5000_INT2_TIMER1 0x0002
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#define NEWS5000_INT2_ALL (NEWS5000_INT2_TIMER0|NEWS5000_INT2_TIMER1)
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/*
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* level4 intr (INTMASK4/INTSTAT4)
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*/
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#define NEWS5000_INT4_ABIF 0x0001
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#define NEWS5000_INT4_WBERR NEWS5000_INT4_ABIF
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#define NEWS5000_INT4_MFBIF 0x0002
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#define NEWS5000_INT4_SBIF 0x0004
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#define NEWS5000_INT4_ALL (NEWS5000_INT4_ABIF|NEWS5000_INT4_MFBIF|NEWS5000_INT4_SBIF)
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/*
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* level5 intr (INTMASK5/INTSTAT5)
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*/
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#define NEWS5000_INT5_ABIF 0x0001
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#define NEWS5000_INT5_MBIF 0x0002
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#define NEWS5000_INT5_SBIF 0x0004
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#define NEWS5000_INT5_POWER 0x0008
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#define NEWS5000_INT5_TEMP 0x0010
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#define NEWS5000_INT5_ABORT 0x0020
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#define NEWS5000_INT5_EXTSENSE NEWS5000_INT5_ABORT
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#define NEWS5000_INT5_ALL (NEWS5000_INT5_ABIF|NEWS5000_INT5_MBIF|NEWS5000_INT5_SBIF|NEWS5000_INT5_POWER|NEWS5000_INT5_TEMP|NEWS5000_INT5_ABORT)
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/*
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* NMI intr (INTMASKNMI/INTSTATNMI)
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*/
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#define NEWS5000_INTNMI_ABORT 0x0001
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#define NEWS5000_INTNMI_ALL (NEWS5000_INTNMI_ABORT)
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#define NEWS5000_WB 0xbf520004 /* I/O write buffer control */
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#define NEWS5000_LED0 0xbf3f0000 /* POWER LED */
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#define NEWS5000_LED1 0xbf3f0004 /* DISK LED */
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#define NEWS5000_LED2 0xbf3f0008 /* FLOPPY LED */
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#define NEWS5000_LED3 0xbf3f000c /* SECURITY LED */
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#define NEWS5000_LED4 0xbf3f0010 /* NETWORK LED */
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#define NEWS5000_LED5 0xbf3f0014 /* CDROM LED */
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#define NEWS5000_APBUS_INTMASK 0xb4c0000c
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#define NEWS5000_APBUS_INTSTAT 0xb4c00014
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#define NEWS5000_APBUS_CONFIG 0xb4c00034
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#define NEWS5000_APBUS_DUMCOH 0xb4c00084
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#define NEWS5000_APBUS_DEVICE_DMAC3 0x80000000 /* DMAC3 */
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#define NEWS5000_APBUS_DEVICE_SONIC 0x40000000 /* SONIC */
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#define NEWS5000_APBUS_DEVICE_SLOT6 0x00000020 /* slot #6 */
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#define NEWS5000_APBUS_DEVICE_SLOT5 0x00000010 /* slot #5 */
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#define NEWS5000_APBUS_DEVICE_SLOT4 0x00000008 /* slot #4 */
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#define NEWS5000_APBUS_DEVICE_SLOT3 0x00000004 /* slot #3 */
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#define NEWS5000_APBUS_DEVICE_SLOT2 0x00000002 /* slot #2 */
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#define NEWS5000_APBUS_DEVICE_SLOT1 0x00000001 /* slot #1 */
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#define NEWS5000_APBUS_DEVICE_ALLSLOT 0x0000003f /* slot #1-#6 */
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#define NEWS5000_INTAPBUS_DMADOUBLE 0x8000 /* DMA double error */
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#define NEWS5000_INTAPBUS_DMAPARITY 0x0200 /* DMA parity error */
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#define NEWS5000_INTAPBUS_DMAADDRESS 0x0100 /* DMA address error */
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#define NEWS5000_INTAPBUS_IODOUBLE 0x0080 /* I/O access double bus error */
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#define NEWS5000_INTAPBUS_IOPARITY 0x0010 /* I/O read parity error */
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#define NEWS5000_INTAPBUS_RDIOERR 0x0008 /* I/O read ioerr */
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#define NEWS5000_INTAPBUS_RDTIMEO 0x0004 /* I/O read time-out error */
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#define NEWS5000_INTAPBUS_WRIOERR 0x0002 /* I/O write ioerr */
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#define NEWS5000_INTAPBUS_WRTIMEO 0x0001 /* I/O write time-out error */
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#define NEWS5000_INTAPBUS_ALL (NEWS5000_INTAPBUS_DMADOUBLE|\
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NEWS5000_INTAPBUS_DMAPARITY|\
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NEWS5000_INTAPBUS_DMAADDRESS|\
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NEWS5000_INTAPBUS_IODOUBLE|\
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NEWS5000_INTAPBUS_IOPARITY|\
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NEWS5000_INTAPBUS_RDIOERR|\
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NEWS5000_INTAPBUS_RDTIMEO|\
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NEWS5000_INTAPBUS_WRIOERR|\
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NEWS5000_INTAPBUS_WRTIMEO)
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#define NEWS5000_SCCPORT0A 0xbe950000
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#endif /* !__MACHINE_ADRSMAP__ */
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