694 lines
15 KiB
C
694 lines
15 KiB
C
/* $NetBSD: zs.c,v 1.16 2007/12/04 15:12:07 tsutsui Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Gordon W. Ross.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Zilog Z8530 Dual UART driver (machine-dependent part)
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*
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* Runs two serial lines per chip using slave drivers.
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* Plain tty/async lines use the zs_async slave.
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* Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.16 2007/12/04 15:12:07 tsutsui Exp $");
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <sys/file.h>
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#include <sys/ioctl.h>
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#include <sys/kernel.h>
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#include <sys/proc.h>
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#include <sys/tty.h>
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#include <sys/time.h>
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#include <sys/syslog.h>
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#include <sys/intr.h>
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#include <machine/autoconf.h>
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#include <machine/promlib.h>
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#include <machine/cpu.h>
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#include <machine/eeprom.h>
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#include <machine/psl.h>
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#include <machine/z8530var.h>
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#include <dev/cons.h>
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#include <dev/ic/z8530reg.h>
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#include <dev/sun/kbd_ms_ttyvar.h>
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#include <ddb/db_output.h>
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#include <sun2/dev/cons.h>
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#include "kbd.h" /* NKBD */
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#include "ms.h" /* NMS */
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/*
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* Some warts needed by z8530tty.c -
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* The default parity REALLY needs to be the same as the PROM uses,
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* or you can not see messages done with printf during boot-up...
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*/
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int zs_def_cflag = (CREAD | CS8 | HUPCL);
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/* ZS channel used as the console device (if any) */
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void *zs_conschan_get, *zs_conschan_put;
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static u_char zs_init_reg[16] = {
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0, /* 0: CMD (reset, etc.) */
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0, /* 1: No interrupts yet. */
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#ifdef ZS_INIT_IVECT
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ZS_INIT_IVECT, /* 2: IVECT */
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#else
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0, /* 2: IVECT */
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#endif
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ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
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ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
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ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
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0, /* 6: TXSYNC/SYNCLO */
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0, /* 7: RXSYNC/SYNCHI */
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0, /* 8: alias for data port */
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#ifdef ZS_INIT_IVECT
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ZSWR9_MASTER_IE,
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#else
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ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
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#endif
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0, /*10: Misc. TX/RX control bits */
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ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
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((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
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0, /*13: BAUDHI (default=9600) */
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ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
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ZSWR15_BREAK_IE,
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};
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/* Console ops */
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static int zscngetc(dev_t);
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static void zscnputc(dev_t, int);
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static void zscnpollc(dev_t, int);
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struct consdev zs_consdev = {
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NULL,
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NULL,
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zscngetc,
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zscnputc,
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zscnpollc,
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NULL,
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};
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/****************************************************************
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* Autoconfig
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****************************************************************/
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static int zs_print(void *, const char *name);
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extern struct cfdriver zs_cd;
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/* Interrupt handlers. */
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int zscheckintr(void *);
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static int zshard(void *);
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static void zssoft(void *);
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static int zs_get_speed(struct zs_chanstate *);
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/*
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* Attach a found zs.
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*
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* USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
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* SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
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*/
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void
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zs_attach(struct zsc_softc *zsc, struct zsdevice *zsd, int pri)
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{
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struct zsc_attach_args zsc_args;
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struct zs_chanstate *cs;
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int s, channel;
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if (zsd == NULL) {
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printf("configuration incomplete\n");
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return;
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}
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#if 0
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/* we should use ipl2si(softpri) but it isn't exported */
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printf(" softpri %d\n", _IPL_SOFT_LEVEL3);
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#else
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printf("\n");
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#endif
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/*
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* Initialize software state for each channel.
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*/
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for (channel = 0; channel < 2; channel++) {
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struct zschan *zc;
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struct device *child;
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zsc_args.channel = channel;
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cs = &zsc->zsc_cs_store[channel];
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zsc->zsc_cs[channel] = cs;
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zs_lock_init(cs);
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cs->cs_channel = channel;
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cs->cs_private = NULL;
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cs->cs_ops = &zsops_null;
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cs->cs_brg_clk = PCLK / 16;
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zc = (channel == 0) ? &zsd->zs_chan_a : &zsd->zs_chan_b;
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zsc_args.consdev = NULL;
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zsc_args.hwflags = zs_console_flags(zsc->zsc_promunit,
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zsc->zsc_node,
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channel);
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if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE) {
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zsc_args.hwflags |= ZS_HWFLAG_USE_CONSDEV;
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zsc_args.consdev = &zs_consdev;
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}
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if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_INPUT) != 0) {
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zs_conschan_get = zc;
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}
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if ((zsc_args.hwflags & ZS_HWFLAG_CONSOLE_OUTPUT) != 0) {
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zs_conschan_put = zc;
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}
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/* Children need to set cn_dev, etc */
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cs->cs_reg_csr = &zc->zc_csr;
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cs->cs_reg_data = &zc->zc_data;
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memcpy(cs->cs_creg, zs_init_reg, 16);
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memcpy(cs->cs_preg, zs_init_reg, 16);
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/* XXX: Consult PROM properties for this?! */
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cs->cs_defspeed = zs_get_speed(cs);
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cs->cs_defcflag = zs_def_cflag;
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/* Make these correspond to cs_defcflag (-crtscts) */
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cs->cs_rr0_dcd = ZSRR0_DCD;
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cs->cs_rr0_cts = 0;
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cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
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cs->cs_wr5_rts = 0;
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/*
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* Clear the master interrupt enable.
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* The INTENA is common to both channels,
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* so just do it on the A channel.
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*/
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if (channel == 0) {
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zs_write_reg(cs, 9, 0);
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}
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/*
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* Look for a child driver for this channel.
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* The child attach will setup the hardware.
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*/
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if (!(child =
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config_found(&zsc->zsc_dev, (void *)&zsc_args, zs_print))) {
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/* No sub-driver. Just reset it. */
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u_char reset = (channel == 0) ?
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ZSWR9_A_RESET : ZSWR9_B_RESET;
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s = splzs();
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zs_write_reg(cs, 9, reset);
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splx(s);
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}
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#if (NKBD > 0) || (NMS > 0)
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/*
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* If this was a zstty it has a keyboard
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* property on it we need to attach the
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* sunkbd and sunms line disciplines.
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*/
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if (child
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&& device_is_a(child, "zstty")) {
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struct kbd_ms_tty_attach_args kma;
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struct zstty_softc {
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/* The following are the only fields we need here */
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struct device zst_dev;
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struct tty *zst_tty;
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struct zs_chanstate *zst_cs;
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} *zst = (struct zstty_softc *)child;
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struct tty *tp;
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kma.kmta_tp = tp = zst->zst_tty;
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if (tp != NULL) {
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kma.kmta_dev = tp->t_dev;
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kma.kmta_consdev = zsc_args.consdev;
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/* Attach 'em if we got 'em. */
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switch(zs_peripheral_type(zsc->zsc_promunit,
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zsc->zsc_node,
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channel)) {
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case ZS_PERIPHERAL_SUNKBD:
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#if (NKBD > 0)
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kma.kmta_name = "keyboard";
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config_found(child, (void *)&kma, NULL);
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#endif
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break;
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case ZS_PERIPHERAL_SUNMS:
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#if (NMS > 0)
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kma.kmta_name = "mouse";
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config_found(child, (void *)&kma, NULL);
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#endif
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break;
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default:
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break;
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}
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}
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}
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#endif
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}
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/*
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* Now safe to install interrupt handlers.
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*/
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bus_intr_establish(zsc->zsc_bustag, pri, IPL_SERIAL, 0, zshard, zsc);
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if (!(zsc->zsc_softintr = softint_establish(SOFTINT_SERIAL,
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zssoft, zsc)))
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panic("zsattach: could not establish soft interrupt");
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evcnt_attach_dynamic(&zsc->zsc_intrcnt, EVCNT_TYPE_INTR, NULL,
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zsc->zsc_dev.dv_xname, "intr");
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/*
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* Set the master interrupt enable and interrupt vector.
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* (common to both channels, do it on A)
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*/
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cs = zsc->zsc_cs[0];
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s = splhigh();
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/* interrupt vector */
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zs_write_reg(cs, 2, zs_init_reg[2]);
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/* master interrupt control (enable) */
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zs_write_reg(cs, 9, zs_init_reg[9]);
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splx(s);
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}
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static int
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zs_print(void *aux, const char *name)
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{
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struct zsc_attach_args *args = aux;
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if (name != NULL)
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aprint_normal("%s: ", name);
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if (args->channel != -1)
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aprint_normal(" channel %d", args->channel);
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return (UNCONF);
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}
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static int
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zshard(void *arg)
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{
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struct zsc_softc *zsc = (struct zsc_softc *)arg;
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int rr3, rval;
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rval = 0;
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while ((rr3 = zsc_intr_hard(zsc))) {
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/* Count up the interrupts. */
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rval |= rr3;
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zsc->zsc_intrcnt.ev_count++;
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}
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if (((zsc->zsc_cs[0] && zsc->zsc_cs[0]->cs_softreq) ||
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(zsc->zsc_cs[1] && zsc->zsc_cs[1]->cs_softreq)) &&
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zsc->zsc_softintr) {
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softint_schedule(zsc->zsc_softintr);
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}
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return (rval);
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}
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int
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zscheckintr(void *arg)
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{
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struct zsc_softc *zsc;
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int unit, rval;
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rval = 0;
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for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
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zsc = zs_cd.cd_devs[unit];
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if (zsc == NULL)
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continue;
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rval = (zshard((void *)zsc) || rval);
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}
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return (rval);
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}
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/*
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* We need this only for TTY_DEBUG purposes.
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*/
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static void
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zssoft(void *arg)
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{
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struct zsc_softc *zsc = (struct zsc_softc *)arg;
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int s;
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/* Make sure we call the tty layer at spltty. */
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s = spltty();
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(void)zsc_intr_soft(zsc);
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#ifdef TTY_DEBUG
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{
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struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
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struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
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if (zst0->zst_overflows || zst1->zst_overflows ) {
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struct trapframe *frame = (struct trapframe *)arg;
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printf("zs silo overflow from %p\n",
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(long)frame->tf_pc);
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}
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}
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#endif
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splx(s);
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}
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/*
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* Compute the current baud rate given a ZS channel.
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*/
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static int
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zs_get_speed(struct zs_chanstate *cs)
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{
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int tconst;
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tconst = zs_read_reg(cs, 12);
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tconst |= zs_read_reg(cs, 13) << 8;
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return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
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}
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/*
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* MD functions for setting the baud rate and control modes.
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*/
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int
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zs_set_speed(struct zs_chanstate *cs, int bps)
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{
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int tconst, real_bps;
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if (bps == 0)
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return (0);
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#ifdef DIAGNOSTIC
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if (cs->cs_brg_clk == 0)
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panic("zs_set_speed");
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#endif
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tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
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if (tconst < 0)
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return (EINVAL);
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/* Convert back to make sure we can do it. */
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real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
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/* XXX - Allow some tolerance here? */
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if (real_bps != bps)
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return (EINVAL);
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cs->cs_preg[12] = tconst;
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cs->cs_preg[13] = tconst >> 8;
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/* Caller will stuff the pending registers. */
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return (0);
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}
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int
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zs_set_modes(struct zs_chanstate *cs, int cflag /* bits per second */)
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{
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int s;
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/*
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* Output hardware flow control on the chip is horrendous:
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* if carrier detect drops, the receiver is disabled, and if
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* CTS drops, the transmitter is stoped IN MID CHARACTER!
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* Therefore, NEVER set the HFC bit, and instead use the
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* status interrupt to detect CTS changes.
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*/
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s = splzs();
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cs->cs_rr0_pps = 0;
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if ((cflag & (CLOCAL | MDMBUF)) != 0) {
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cs->cs_rr0_dcd = 0;
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if ((cflag & MDMBUF) == 0)
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cs->cs_rr0_pps = ZSRR0_DCD;
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} else
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cs->cs_rr0_dcd = ZSRR0_DCD;
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if ((cflag & CRTSCTS) != 0) {
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cs->cs_wr5_dtr = ZSWR5_DTR;
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cs->cs_wr5_rts = ZSWR5_RTS;
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cs->cs_rr0_cts = ZSRR0_CTS;
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} else if ((cflag & CDTRCTS) != 0) {
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cs->cs_wr5_dtr = 0;
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cs->cs_wr5_rts = ZSWR5_DTR;
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cs->cs_rr0_cts = ZSRR0_CTS;
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} else if ((cflag & MDMBUF) != 0) {
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cs->cs_wr5_dtr = 0;
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cs->cs_wr5_rts = ZSWR5_DTR;
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cs->cs_rr0_cts = ZSRR0_DCD;
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} else {
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cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
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cs->cs_wr5_rts = 0;
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cs->cs_rr0_cts = 0;
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}
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splx(s);
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/* Caller will stuff the pending registers. */
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return (0);
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}
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/*
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* Read or write the chip with suitable delays.
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*/
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u_char
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zs_read_reg(struct zs_chanstate *cs, u_char reg)
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{
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u_char val;
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*cs->cs_reg_csr = reg;
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ZS_DELAY();
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val = *cs->cs_reg_csr;
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ZS_DELAY();
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|
return (val);
|
|
}
|
|
|
|
void
|
|
zs_write_reg(struct zs_chanstate *cs, u_char reg, u_char val)
|
|
{
|
|
*cs->cs_reg_csr = reg;
|
|
ZS_DELAY();
|
|
*cs->cs_reg_csr = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
u_char
|
|
zs_read_csr(struct zs_chanstate *cs)
|
|
{
|
|
u_char val;
|
|
|
|
val = *cs->cs_reg_csr;
|
|
ZS_DELAY();
|
|
return (val);
|
|
}
|
|
|
|
void
|
|
zs_write_csr(struct zs_chanstate *cs, u_char val)
|
|
{
|
|
*cs->cs_reg_csr = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
u_char
|
|
zs_read_data(struct zs_chanstate *cs)
|
|
{
|
|
u_char val;
|
|
|
|
val = *cs->cs_reg_data;
|
|
ZS_DELAY();
|
|
return (val);
|
|
}
|
|
|
|
void
|
|
zs_write_data(struct zs_chanstate *cs, u_char val)
|
|
{
|
|
*cs->cs_reg_data = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
/****************************************************************
|
|
* Console support functions (Sun specific!)
|
|
* Note: this code is allowed to know about the layout of
|
|
* the chip registers, and uses that to keep things simple.
|
|
* XXX - I think I like the mvme167 code better. -gwr
|
|
****************************************************************/
|
|
|
|
extern void Debugger(void);
|
|
|
|
/*
|
|
* Handle user request to enter kernel debugger.
|
|
*/
|
|
void
|
|
zs_abort(struct zs_chanstate *cs)
|
|
{
|
|
volatile struct zschan *zc = zs_conschan_get;
|
|
int rr0;
|
|
|
|
/* Wait for end of break to avoid PROM abort. */
|
|
/* XXX - Limit the wait? */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while (rr0 & ZSRR0_BREAK);
|
|
|
|
#if defined(KGDB)
|
|
zskgdb(cs);
|
|
#elif defined(DDB)
|
|
{
|
|
extern int db_active;
|
|
|
|
if (!db_active)
|
|
Debugger();
|
|
else
|
|
/* Debugger is probably hozed */
|
|
callrom();
|
|
}
|
|
#else
|
|
printf("stopping on keyboard abort\n");
|
|
callrom();
|
|
#endif
|
|
}
|
|
|
|
|
|
/*
|
|
* Polled input char.
|
|
*/
|
|
int
|
|
zs_getc(void *arg)
|
|
{
|
|
volatile struct zschan *zc = arg;
|
|
int s, c, rr0;
|
|
|
|
s = splhigh();
|
|
/* Wait for a character to arrive. */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while ((rr0 & ZSRR0_RX_READY) == 0);
|
|
|
|
c = zc->zc_data;
|
|
ZS_DELAY();
|
|
splx(s);
|
|
|
|
/*
|
|
* This is used by the kd driver to read scan codes,
|
|
* so don't translate '\r' ==> '\n' here...
|
|
*/
|
|
return (c);
|
|
}
|
|
|
|
/*
|
|
* Polled output char.
|
|
*/
|
|
void
|
|
zs_putc(void *arg, int c)
|
|
{
|
|
volatile struct zschan *zc = arg;
|
|
int s, rr0;
|
|
|
|
s = splhigh();
|
|
|
|
/* Wait for transmitter to become ready. */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while ((rr0 & ZSRR0_TX_READY) == 0);
|
|
|
|
/*
|
|
* Send the next character.
|
|
* Now you'd think that this could be followed by a ZS_DELAY()
|
|
* just like all the other chip accesses, but it turns out that
|
|
* the `transmit-ready' interrupt isn't de-asserted until
|
|
* some period of time after the register write completes
|
|
* (more than a couple instructions). So to avoid stray
|
|
* interrupts we put in the 2us delay regardless of CPU model.
|
|
*/
|
|
zc->zc_data = c;
|
|
delay(2);
|
|
|
|
splx(s);
|
|
}
|
|
|
|
/*****************************************************************/
|
|
|
|
|
|
|
|
|
|
/*
|
|
* Polled console input putchar.
|
|
*/
|
|
static int
|
|
zscngetc(dev_t dev)
|
|
{
|
|
return (zs_getc(zs_conschan_get));
|
|
}
|
|
|
|
/*
|
|
* Polled console output putchar.
|
|
*/
|
|
static void
|
|
zscnputc(dev_t dev, int c)
|
|
{
|
|
zs_putc(zs_conschan_put, c);
|
|
}
|
|
|
|
int swallow_zsintrs;
|
|
|
|
static void
|
|
zscnpollc(dev_t dev, int on)
|
|
{
|
|
/*
|
|
* Need to tell zs driver to acknowledge all interrupts or we get
|
|
* annoying spurious interrupt messages. This is because mucking
|
|
* with spl() levels during polling does not prevent interrupts from
|
|
* being generated.
|
|
*/
|
|
|
|
if (on) swallow_zsintrs++;
|
|
else swallow_zsintrs--;
|
|
}
|
|
|