211 lines
6.6 KiB
C
211 lines
6.6 KiB
C
/* $NetBSD: cpufunc.h,v 1.10 2007/10/18 18:55:10 skrll Exp $ */
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/* $OpenBSD: cpufunc.h,v 1.17 2000/05/15 17:22:40 mickey Exp $ */
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/*
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* Copyright (c) 1998,2000 Michael Shalayeff
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Michael Shalayeff.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* (c) Copyright 1988 HEWLETT-PACKARD COMPANY
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*
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* To anyone who acknowledges that this file is provided "AS IS"
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* without any express or implied warranty:
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* permission to use, copy, modify, and distribute this file
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* for any purpose is hereby granted without fee, provided that
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* the above copyright notice and this notice appears in all
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* copies, and that the name of Hewlett-Packard Company not be
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* used in advertising or publicity pertaining to distribution
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* of the software without specific, written prior permission.
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* Hewlett-Packard Company makes no representations about the
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* suitability of this software for any purpose.
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*/
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/*
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* Copyright (c) 1990,1994 The University of Utah and
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* the Computer Systems Laboratory (CSL). All rights reserved.
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*
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* THE UNIVERSITY OF UTAH AND CSL PROVIDE THIS SOFTWARE IN ITS "AS IS"
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* CONDITION, AND DISCLAIM ANY LIABILITY OF ANY KIND FOR ANY DAMAGES
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* WHATSOEVER RESULTING FROM ITS USE.
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*
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* CSL requests users of this software to return to csl-dist@cs.utah.edu any
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* improvements that they make and grant CSL redistribution rights.
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*
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* Utah $Hdr: c_support.s 1.8 94/12/14$
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* Author: Bob Wheeler, University of Utah CSL
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*/
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#ifndef _HPPA_CPUFUNC_H_
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#define _HPPA_CPUFUNC_H_
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#include <machine/psl.h>
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#include <machine/pte.h>
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#define tlbbtop(b) ((b) >> (PGSHIFT - 5))
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#define tlbptob(p) ((p) << (PGSHIFT - 5))
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#define hptbtop(b) ((b) >> 17)
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/* Get space register for an address */
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static __inline register_t ldsid(vaddr_t p) {
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register_t ret;
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__asm volatile("ldsid (%1),%0" : "=r" (ret) : "r" (p));
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return ret;
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}
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#define mtctl(v,r) __asm volatile("mtctl %0,%1":: "r" (v), "i" (r))
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#define mfctl(r,v) __asm volatile("mfctl %1,%0": "=r" (v): "i" (r))
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#define mfcpu(r,v) /* XXX for the lack of the mnemonics */ \
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__asm volatile("diag %1\n\t" \
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"copy %%r22, %0" \
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: "=r" (v) : "i" ((0x1400 | ((r) << 21) | (22))) : "r22")
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#define mtsp(v,r) __asm volatile("mtsp %0,%1":: "r" (v), "i" (r))
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#define mfsp(r,v) __asm volatile("mfsp %1,%0": "=r" (v): "i" (r))
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#define ssm(v,r) __asm volatile("ssm %1,%0": "=r" (r): "i" (v))
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#define rsm(v,r) __asm volatile("rsm %1,%0": "=r" (r): "i" (v))
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/* Move to system mask. Old value of system mask is returned. */
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static __inline register_t mtsm(register_t mask) {
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register_t ret;
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__asm volatile(
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"ssm 0,%0\n\t"
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"mtsm %1": "=&r" (ret) : "r" (mask));
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return ret;
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}
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#define fdce(sp,off) __asm volatile("fdce 0(%0,%1)":: "i" (sp), "r" (off))
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#define fice(sp,off) __asm volatile("fice 0(%0,%1)":: "i" (sp), "r" (off))
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#define sync_caches() \
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__asm volatile("sync\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop":::"memory")
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static __inline void
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iitlba(u_int pg, pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("iitlba %0,(%%sr1, %1)":: "r" (pg), "r" (va));
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}
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static __inline void
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idtlba(u_int pg, pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("idtlba %0,(%%sr1, %1)":: "r" (pg), "r" (va));
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}
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static __inline void
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iitlbp(u_int prot, pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("iitlbp %0,(%%sr1, %1)":: "r" (prot), "r" (va));
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}
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static __inline void
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idtlbp(u_int prot, pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("idtlbp %0,(%%sr1, %1)":: "r" (prot), "r" (va));
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}
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static __inline void
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pitlb(pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("pitlb %%r0(%%sr1, %0)":: "r" (va));
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}
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static __inline void
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pdtlb(pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("pdtlb %%r0(%%sr1, %0)":: "r" (va));
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}
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static __inline void
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pitlbe(pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("pitlbe %%r0(%%sr1, %0)":: "r" (va));
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}
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static __inline void
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pdtlbe(pa_space_t sp, vaddr_t va)
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{
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mtsp(sp, 1);
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__asm volatile("pdtlbe %%r0(%%sr1, %0)":: "r" (va));
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}
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#ifdef _KERNEL
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void ficache(pa_space_t sp, vaddr_t va, vsize_t size);
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void fdcache(pa_space_t sp, vaddr_t va, vsize_t size);
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void pdcache(pa_space_t sp, vaddr_t va, vsize_t size);
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void fcacheall(void);
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void ptlball(void);
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hppa_hpa_t cpu_gethpa(int);
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#define PCXL2_ACCEL_IO_START 0xf4000000
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#define PCXL2_ACCEL_IO_END (0xfc000000 - 1)
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#define PCXL2_ACCEL_IO_ADDR2MASK(a) (0x8 >> ((((a) >> 25) - 2) & 3))
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void eaio_l2(int);
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/*
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* These flush or purge the data cache for a item whose total
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* size is <= the size of a data cache line, however they don't
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* check this constraint.
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*/
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static __inline void
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fdcache_small(pa_space_t sp, vaddr_t va, vsize_t size)
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{
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__asm volatile(
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" mtsp %0,%%sr1 \n"
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" fdc %%r0(%%sr1, %1) \n"
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" fdc %2(%%sr1, %1) \n"
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" sync \n"
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" syncdma \n"
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:
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: "r" (sp), "r" (va), "r" (size - 1));
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}
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static __inline void
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pdcache_small(pa_space_t sp, vaddr_t va, vsize_t size)
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{
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__asm volatile(
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" mtsp %0,%%sr1 \n"
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" pdc %%r0(%%sr1, %1) \n"
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" pdc %2(%%sr1, %1) \n"
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" sync \n"
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" syncdma \n"
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:
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: "r" (sp), "r" (va), "r" (size - 1));
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}
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#endif /* _KERNEL */
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#endif /* _HPPA_CPUFUNC_H_ */
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