70 lines
3.0 KiB
C
70 lines
3.0 KiB
C
/* $NetBSD: jazzdmatlbreg.h,v 1.4 2005/12/11 12:16:39 christos Exp $ */
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/* $OpenBSD: dma.h,v 1.3 1997/04/19 17:19:51 pefo Exp $ */
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/*
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* Copyright (c) 1996 Per Fogelstrom
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Per Fogelstrom.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* The R4030 system has four DMA channels capable of scatter/gather
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* and full memory addressing. The maximum transfer length is 1Mb.
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* DMA snopes the L2 cache so no precaution is required. However
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* if L1 cache is cached 'write back' the processor is responible
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* for flushing/invalidating it.
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*
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* The DMA mapper has up to 4096 page descriptors.
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*/
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/* XXX */
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#define PICA_TL_BASE 0xa0180000 /* Base of tl register area */
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#define JAZZ_DMATLB_SIZE 0x00008000 /* Size of tl register area */
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#define JAZZ_DMATLBREG_MAP 0x00 /* DMA transl. table base */
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#define JAZZ_DMATLBREG_LIMIT 0x08 /* DMA transl. table limit */
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#define JAZZ_DMATLBREG_IVALID 0x10 /* DMA transl. cache inval */
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#define JAZZ_DMATLB_REGSIZE 0x18 /* size of bus_space region */
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#define JAZZ_DMA_PAGE_SIZE 0x00001000 /* Address page size */
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#define JAZZ_DMA_PAGE_OFFS (JAZZ_DMA_PAGE_SIZE-1) /* page offset */
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#define JAZZ_DMA_PAGE_NUM (~JAZZ_DMA_PAGE_OFFS) /* page number */
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#define jazz_dma_page_offs(x) \
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((int)(x) & JAZZ_DMA_PAGE_OFFS)
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#define jazz_dma_page_round(x) \
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(((int)(x) + JAZZ_DMA_PAGE_OFFS) & JAZZ_DMA_PAGE_NUM)
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/*
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* DMA TLB entry
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*/
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typedef struct jazz_dma_pte {
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uint32_t lo_addr; /* Low part of translation addr */
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uint32_t hi_addr; /* High part of translation addr */
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} jazz_dma_pte_t;
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