NetBSD/sys/arch/sparc
mrg 6ee482ef5b change what 'hw.model' reports to be more inline with other netbsd ports, as
well as reporting the actual machine model & cpu, rather than first configured
CPU.  changes for two machines are:

old:
	hw.model = TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU
	hw.model = SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU

new:
	hw.model = SUNW,SPARCstation-20 (TMS390Z50 v0 or TMS390Z55 @ 75 MHz, on-chip FPU)
	hw.model = SUNW,Ultra-1 (SUNW,UltraSPARC @ 143.002 MHz, version 0 FPU)

as per discussion on port-sparc & port-sparc64.
2002-12-22 02:17:24 +00:00
..
compile
conf Use MI versions of {set,rem}runqueue(). 2002-12-07 10:27:03 +00:00
dev The cache flush routines now take a CPU context parameter. This is going 2002-12-16 16:59:09 +00:00
fpu Make 32bit sparc64 kernels with DEBUG and DIAGNOSTIC compile. 2002-10-16 11:05:10 +00:00
include tlb_flush_segment() and tlb_flush_region() now take a virtual address 2002-12-21 12:52:55 +00:00
sparc change what 'hw.model' reports to be more inline with other netbsd ports, as 2002-12-22 02:17:24 +00:00
stand Increment version number for match function and Cycle 5 IP changes. 2002-12-16 13:02:58 +00:00
Makefile