718 lines
20 KiB
C
718 lines
20 KiB
C
/* $NetBSD: vrc4173bcu.c,v 1.24 2017/03/31 08:38:13 msaitoh Exp $ */
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/*-
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* Copyright (c) 2001,2002 Enami Tsugutomo.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: vrc4173bcu.c,v 1.24 2017/03/31 08:38:13 msaitoh Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <machine/platid.h>
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#include <machine/platid_mask.h>
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#include <machine/config_hook.h>
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#include <hpcmips/vr/vripunit.h>
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#include <hpcmips/vr/vripif.h>
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#include <hpcmips/vr/vrc4173bcuvar.h>
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#include <hpcmips/vr/vrc4173icureg.h>
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#include <hpcmips/vr/vrc4173cmureg.h>
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#include "locators.h"
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#ifdef VRC4173BCU_DEBUG
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#define DPRINTF_ENABLE
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#define DPRINTF_DEBUG vrc4173bcu_debug
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#endif
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#define USE_HPC_DPRINTF
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#include <machine/debug.h>
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#define VRC4173BCU_BADR 0x10
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#define USE_WINCE_CLKMASK (~0)
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static int vrc4173bcu_match(device_t, cfdata_t, void *);
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static void vrc4173bcu_attach(device_t, device_t, void *);
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static int vrc4173bcu_intr(void *);
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static int vrc4173bcu_print(void *, const char *);
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static int vrc4173bcu_search(device_t, cfdata_t, const int *, void *);
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static int vrc4173bcu_pci_intr(void *);
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#ifdef VRC4173BCU_DEBUG
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static void vrc4173bcu_dump_level2mask(vrip_chipset_tag_t,
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vrip_intr_handle_t);
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#endif
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int __vrc4173bcu_power(vrip_chipset_tag_t, int, int);
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vrip_intr_handle_t __vrc4173bcu_intr_establish(vrip_chipset_tag_t, int, int,
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int, int(*)(void*), void*);
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void __vrc4173bcu_intr_disestablish(vrip_chipset_tag_t, vrip_intr_handle_t);
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void __vrc4173bcu_intr_setmask1(vrip_chipset_tag_t, vrip_intr_handle_t, int);
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void __vrc4173bcu_intr_setmask2(vrip_chipset_tag_t, vrip_intr_handle_t,
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u_int32_t, int);
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void __vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t, vrip_intr_handle_t,
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u_int32_t*);
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void __vrc4173bcu_register_cmu(vrip_chipset_tag_t, vrcmu_chipset_tag_t);
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void __vrc4173bcu_register_gpio(vrip_chipset_tag_t, hpcio_chip_t);
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void __vrc4173bcu_register_dmaau(vrip_chipset_tag_t, vrdmaau_chipset_tag_t);
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void __vrc4173bcu_register_dcu(vrip_chipset_tag_t, vrdcu_chipset_tag_t);
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int __vrc4173bcu_clock(vrcmu_chipset_tag_t, u_int16_t, int);
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/*
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* machine dependent info
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*/
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static struct vrc4173bcu_platdep {
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platid_mask_t *platidmask;
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u_int32_t clkmask;
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int intrmask;
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} platdep_table[] = {
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{
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&platid_mask_MACH_VICTOR_INTERLINK_MPC303,
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USE_WINCE_CLKMASK, /* clock mask */
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(1 << VRC4173ICU_USBINTR)| /* intrrupts */
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(1 << VRC4173ICU_PCMCIA1INTR)|
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(1 << VRC4173ICU_PCMCIA2INTR),
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},
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{
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&platid_mask_MACH_VICTOR_INTERLINK_MPC304,
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USE_WINCE_CLKMASK, /* clock mask */
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(1 << VRC4173ICU_USBINTR)| /* intrrupts */
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(1 << VRC4173ICU_PCMCIA1INTR)|
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(1 << VRC4173ICU_PCMCIA2INTR),
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},
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{
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&platid_mask_MACH_NEC_MCR_SIGMARION2,
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USE_WINCE_CLKMASK, /* clock mask */
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(1 << VRC4173ICU_USBINTR), /* intrrupts */
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},
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{
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&platid_wild,
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USE_WINCE_CLKMASK, /* XXX */
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-1,
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},
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};
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struct vrc4173bcu_unit {
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const char *vu_name;
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int vu_intr[2];
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int vu_clkmask;
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bus_addr_t vu_lreg;
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bus_addr_t vu_mlreg;
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bus_addr_t vu_hreg;
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bus_addr_t vu_mhreg;
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};
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struct vrc4173bcu_softc {
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device_t sc_dev;
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struct vrip_chipset_tag sc_chipset;
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struct vrcmu_chipset_tag sc_cmuchip;
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pci_chipset_tag_t sc_pc;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_size_t sc_size;
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bus_space_handle_t sc_icuh; /* I/O handle for ICU. */
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bus_space_handle_t sc_cmuh; /* I/O handle for CMU. */
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void *sc_ih;
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#define VRC4173BCU_NINTRS 16
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int sc_intrmask;
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struct vrc4173bcu_intrhand {
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int (*ih_fun)(void *);
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void *ih_arg;
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const struct vrc4173bcu_unit *ih_unit;
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} sc_intrhands[32];
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struct vrc4173bcu_unit *sc_units;
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int sc_nunits;
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int sc_pri;
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struct vrc4173bcu_platdep *sc_platdep;
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};
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#define VALID_UNIT(sc, unit) (0 <= (unit) && (unit) < (sc)->sc_nunits)
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static struct vrc4173bcu_unit vrc4173bcu_units[] = {
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[VRIP_UNIT_KIU] = {
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"kiu",
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{ VRC4173ICU_KIUINTR, },
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VRC4173CMU_CLKMSK_KIU,
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VRC4173ICU_KIUINT, VRC4173ICU_MKIUINT,
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},
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[VRIP_UNIT_PIU] = {
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"piu",
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{ VRC4173ICU_PIUINTR, VRC4173ICU_DOZEPIUINTR},
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VRC4173CMU_CLKMSK_PIU,
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VRC4173ICU_PIUINT, VRC4173ICU_MPIUINT,
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},
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[VRIP_UNIT_AIU] = {
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"aiu",
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{ VRC4173ICU_AIUINTR, },
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VRC4173CMU_CLKMSK_AIU,
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VRC4173ICU_AIUINT, VRC4173ICU_MAIUINT,
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},
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[VRIP_UNIT_GIU] = {
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"giu",
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{ VRC4173ICU_GIUINTR, },
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0,
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VRC4173ICU_GIULINT, VRC4173ICU_MGIULINT,
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VRC4173ICU_GIUHINT, VRC4173ICU_MGIUHINT,
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},
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[VRIP_UNIT_PS2U0] = {
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"PS/2-Ch1",
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{ VRC4173ICU_PS2CH1INTR, },
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VRC4173CMU_CLKMSK_PS2CH1,
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},
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[VRIP_UNIT_PS2U1] = {
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"PS/2-Ch2",
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{ VRC4173ICU_PS2CH2INTR, },
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VRC4173CMU_CLKMSK_PS2CH2,
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},
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[VRIP_UNIT_USBU] = {
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"usbu",
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{ VRC4173ICU_USBINTR, },
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VRC4173CMU_CLKMSK_USB,
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},
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[VRIP_UNIT_CARDU0] = {
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"cardu0",
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{ VRC4173ICU_PCMCIA1INTR, },
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VRC4173CMU_CLKMSK_CARD1,
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},
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[VRIP_UNIT_CARDU1] = {
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"cardu1",
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{ VRC4173ICU_PCMCIA2INTR, },
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VRC4173CMU_CLKMSK_CARD2,
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},
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};
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CFATTACH_DECL_NEW(vrc4173bcu, sizeof(struct vrc4173bcu_softc),
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vrc4173bcu_match, vrc4173bcu_attach, NULL, NULL);
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static const struct vrip_chipset_tag vrc4173bcu_chipset_methods = {
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.vc_power = __vrc4173bcu_power,
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.vc_intr_establish = __vrc4173bcu_intr_establish,
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.vc_intr_disestablish = __vrc4173bcu_intr_disestablish,
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.vc_intr_setmask1 = __vrc4173bcu_intr_setmask1,
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.vc_intr_setmask2 = __vrc4173bcu_intr_setmask2,
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.vc_intr_getstatus2 = __vrc4173bcu_intr_getstatus2,
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.vc_register_cmu = __vrc4173bcu_register_cmu,
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.vc_register_gpio = __vrc4173bcu_register_gpio,
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.vc_register_dmaau = __vrc4173bcu_register_dmaau,
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.vc_register_dcu = __vrc4173bcu_register_dcu,
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};
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int
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vrc4173bcu_match(device_t parent, cfdata_t match, void *aux)
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{
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struct pci_attach_args *pa = (struct pci_attach_args *)aux;
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if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NEC &&
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PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NEC_VRC4173_BCU)
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return (1);
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return (0);
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}
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void
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vrc4173bcu_attach(device_t parent, device_t self, void *aux)
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{
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struct vrc4173bcu_softc *sc = device_private(self);
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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pcitag_t tag = pa->pa_tag;
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pcireg_t csr;
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char devinfo[256];
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u_int16_t reg;
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pci_intr_handle_t ih;
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const char *intrstr;
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int bus, device, function;
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char ibuf[PCI_INTRSTR_LEN];
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#ifdef DEBUG
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char buf[80];
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#endif
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sc->sc_dev = self;
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
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printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
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#if 0
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printf("%s: ", device_xname(self));
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pci_conf_print(pa->pa_pc, pa->pa_tag, NULL);
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#endif
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sc->sc_pc = pc;
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sc->sc_cmuchip.cc_sc = sc;
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sc->sc_cmuchip.cc_clock = __vrc4173bcu_clock;
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sc->sc_units = vrc4173bcu_units;
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sc->sc_nunits = sizeof(vrc4173bcu_units)/sizeof(struct vrc4173bcu_unit);
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sc->sc_chipset = vrc4173bcu_chipset_methods; /* structure assignment */
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sc->sc_chipset.vc_sc = sc;
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sc->sc_platdep = platid_search(&platid, platdep_table,
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sizeof(platdep_table)/sizeof(*platdep_table),
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sizeof(*platdep_table));
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/* Map I/O registers */
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if (pci_mapreg_map(pa, VRC4173BCU_BADR, PCI_MAPREG_TYPE_IO, 0,
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&sc->sc_iot, &sc->sc_ioh, NULL, &sc->sc_size)) {
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printf("%s: can't map mem space\n", device_xname(self));
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return;
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}
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/* Enable the device. */
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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DPRINTF(("%s: csr = 0x%08x", device_xname(self), csr));
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pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG,
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csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE);
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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DPRINTF((" -> 0x%08x\n", csr));
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csr = pci_conf_read(pc, tag, VRC4173BCU_BADR);
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DPRINTF(("%s: base addr = %x@0x%08x\n", device_xname(self),
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(int)sc->sc_size, csr));
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DPRINTF(("%s: iot = 0x%08x, ioh = 0x%08x\n", device_xname(self),
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(int)sc->sc_iot, (int)sc->sc_ioh));
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/*
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* Map I/O space for ICU.
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*/
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if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
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VRC4173ICU_IOBASE, VRC4173ICU_IOSIZE, &sc->sc_icuh)) {
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printf(": can't map ICU i/o space\n");
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return;
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}
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/*
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* Map I/O space for CMU.
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*/
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if (bus_space_subregion(sc->sc_iot, sc->sc_ioh,
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VRC4173CMU_IOBASE, VRC4173CMU_IOSIZE, &sc->sc_cmuh)) {
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printf(": can't map CMU i/o space\n");
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return;
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}
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/* machine dependent setup */
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if (sc->sc_platdep->clkmask == USE_WINCE_CLKMASK) {
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/* XXX, You can nothing! */
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reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh,
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VRC4173CMU_CLKMSK);
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printf("%s: default clock mask is %04x\n",
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device_xname(self), reg);
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} else {
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/* assert all reset bits */
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bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST,
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VRC4173CMU_SRST_AC97 | VRC4173CMU_SRST_USB |
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VRC4173CMU_SRST_CARD2 | VRC4173CMU_SRST_CARD1);
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/* set clock mask */
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bus_space_write_2(sc->sc_iot, sc->sc_cmuh,
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VRC4173CMU_CLKMSK, sc->sc_platdep->clkmask);
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/* clear reset bit */
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bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_SRST, 0);
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}
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#ifdef DEBUG
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reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
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snprintb(buf, sizeof(buf),
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"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
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"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
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printf("%s: SYSINT1 = %s\n", device_xname(self), buf);
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reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MKIUINT);
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snprintb(buf, sizeof(buf),
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"\20\1SCANINT\2KDATRDY\3KDATLOST\4B3\5B4\6B5\7B6\10B7"
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"\11B8\12B9\13B10\14B11\15B12\16B13\17B14\20B15", reg);
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printf("%s: MKIUINT = %s\n", device_xname(self), buf);
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reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
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snprintb(buf, sizeof(buf),
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"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
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"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
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printf("%s: MSYSINT1 = %s\n", device_xname(self), buf);
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#if 1
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reg = VRC4173ICU_USBINTR | VRC4173ICU_PIUINTR | VRC4173ICU_KIUINTR |
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VRC4173ICU_DOZEPIUINTR;
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bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1, reg);
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reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1);
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snprintb(buf, sizeof(buf),
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"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
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"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
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printf("%s: MSYSINT1 = %s\n", device_xname(self), buf);
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#endif
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#endif
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/*
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* set interrupt mask
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*/
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sc->sc_intrmask = sc->sc_platdep->intrmask;
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bus_space_write_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1,
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sc->sc_intrmask);
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/*
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* install interrupt handler
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*/
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if (pci_intr_map(pa, &ih)) {
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printf("%s: couldn't map interrupt\n", device_xname(self));
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return;
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}
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intrstr = pci_intr_string(pc, ih, ibuf, sizeof(ibuf));
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sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, vrc4173bcu_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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device_xname(self));
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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printf("%s: interrupting at %s\n", device_xname(self), intrstr);
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/*
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* install pci intr hooks
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*/
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pci_decompose_tag(pc, pa->pa_intrtag, &bus, &device, &function);
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/* USB unit */
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if (sc->sc_intrmask & (1 << VRC4173ICU_USBINTR))
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vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_USBU, 0,
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IPL_NET, vrc4173bcu_pci_intr,
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config_connect(CONFIG_HOOK_PCIINTR,
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CONFIG_HOOK_PCIINTR_ID(bus, device, 2)));
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|
/* PC card unit 1 */
|
|
if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA1INTR))
|
|
vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU0, 0,
|
|
IPL_NET, vrc4173bcu_pci_intr,
|
|
config_connect(CONFIG_HOOK_PCIINTR,
|
|
CONFIG_HOOK_PCIINTR_ID(bus, 1, 0)));
|
|
/* PC card unit 2 */
|
|
if (sc->sc_intrmask & (1 << VRC4173ICU_PCMCIA2INTR))
|
|
vrip_intr_establish(&sc->sc_chipset, VRIP_UNIT_CARDU1, 0,
|
|
IPL_NET, vrc4173bcu_pci_intr,
|
|
config_connect(CONFIG_HOOK_PCIINTR,
|
|
CONFIG_HOOK_PCIINTR_ID(bus, 2, 0)));
|
|
|
|
/*
|
|
* Attach each devices
|
|
* sc->sc_pri = 2~1
|
|
*/
|
|
for (sc->sc_pri = 2; 0 < sc->sc_pri; sc->sc_pri--)
|
|
config_search_ia(vrc4173bcu_search, self, "vripif",
|
|
vrc4173bcu_print);
|
|
}
|
|
|
|
int
|
|
vrc4173bcu_print(void *aux, const char *hoge)
|
|
{
|
|
struct vrip_attach_args *va = (struct vrip_attach_args*)aux;
|
|
|
|
if (va->va_addr != VRIPIFCF_ADDR_DEFAULT)
|
|
aprint_normal(" addr 0x%04lx", va->va_addr);
|
|
if (va->va_size != VRIPIFCF_SIZE_DEFAULT)
|
|
aprint_normal("-%04lx",
|
|
(va->va_addr + va->va_size - 1) & 0xffff);
|
|
if (va->va_addr2 != VRIPIFCF_ADDR2_DEFAULT)
|
|
aprint_normal(", 0x%04lx", va->va_addr2);
|
|
if (va->va_size2 != VRIPIFCF_SIZE2_DEFAULT)
|
|
aprint_normal("-%04lx",
|
|
(va->va_addr2 + va->va_size2 - 1) & 0xffff);
|
|
|
|
return (UNCONF);
|
|
}
|
|
|
|
int
|
|
vrc4173bcu_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
|
|
{
|
|
struct vrc4173bcu_softc *sc = device_private(parent);
|
|
struct vrip_attach_args va;
|
|
|
|
memset(&va, 0, sizeof(va));
|
|
va.va_vc = &sc->sc_chipset;
|
|
va.va_iot = sc->sc_iot;
|
|
va.va_parent_ioh = sc->sc_ioh;
|
|
va.va_unit = cf->cf_loc[VRIPIFCF_UNIT];
|
|
va.va_addr = cf->cf_loc[VRIPIFCF_ADDR];
|
|
va.va_size = cf->cf_loc[VRIPIFCF_SIZE];
|
|
va.va_addr2 = cf->cf_loc[VRIPIFCF_ADDR2];
|
|
va.va_size2 = cf->cf_loc[VRIPIFCF_SIZE2];
|
|
va.va_gpio_chips = NULL; /* XXX */
|
|
va.va_cc = sc->sc_chipset.vc_cc;
|
|
va.va_ac = sc->sc_chipset.vc_ac;
|
|
va.va_dc = sc->sc_chipset.vc_dc;
|
|
if ((config_match(parent, cf, &va) == sc->sc_pri))
|
|
config_attach(parent, cf, &va, vrc4173bcu_print);
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
vrc4173bcu_intr(void *arg)
|
|
{
|
|
struct vrc4173bcu_softc *sc = (struct vrc4173bcu_softc *)arg;
|
|
u_int16_t reg;
|
|
struct vrc4173bcu_intrhand *ih;
|
|
int i;
|
|
|
|
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, VRC4173ICU_SYSINT1);
|
|
reg &= sc->sc_intrmask;
|
|
if (reg == 0)
|
|
return (0);
|
|
|
|
#if 0
|
|
{
|
|
char buf[80];
|
|
snprintb(buf, sizeof(buf),
|
|
"\20\1USB\2PCMCIA2\3PCMCIA1\4PS2CH2\5PS2CH1\6PIU\7AIU\10KIU"
|
|
"\11GIU\12AC97\13AC97-1\14B11\15B12\16DOZEPIU\17B14\20B15", reg);
|
|
printf("%s: %s\n", device_xname(sc->sc_dev), buf);
|
|
}
|
|
#endif
|
|
for (ih = sc->sc_intrhands, i = 0; i < VRC4173BCU_NINTRS; i++, ih++)
|
|
if ((reg & (1 << i)) && ih->ih_fun != NULL)
|
|
ih->ih_fun(ih->ih_arg);
|
|
|
|
return (1);
|
|
}
|
|
|
|
static int
|
|
vrc4173bcu_pci_intr(void *arg)
|
|
{
|
|
config_call_tag ct = (config_call_tag)arg;
|
|
config_connected_call(ct, NULL);
|
|
|
|
return (0);
|
|
}
|
|
|
|
#ifdef VRC4173BCU_DEBUG
|
|
static void
|
|
vrc4173bcu_dump_level2mask(vrip_chipset_tag_t vc, vrip_intr_handle_t handle)
|
|
{
|
|
struct vrc4173bcu_softc *sc = vc->vc_sc;
|
|
struct vrc4173bcu_intrhand *ih = handle;
|
|
const struct vrc4173bcu_unit *vu = ih->ih_unit;
|
|
u_int32_t reg;
|
|
|
|
if (vu->vu_mlreg) {
|
|
DPRINTF(("level1[%d] level2 mask:", vu->vu_intr[0]));
|
|
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg);
|
|
if (vu->vu_mhreg) {
|
|
reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh,
|
|
vu->vu_mhreg) << 16);
|
|
dbg_bit_print(reg);
|
|
} else
|
|
dbg_bit_print(reg);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
int
|
|
__vrc4173bcu_power(vrip_chipset_tag_t vc, int unit, int onoff)
|
|
{
|
|
struct vrc4173bcu_softc *sc = vc->vc_sc;
|
|
const struct vrc4173bcu_unit *vu;
|
|
|
|
if (sc->sc_chipset.vc_cc == NULL)
|
|
return (0); /* You have no clock mask unit yet. */
|
|
if (!VALID_UNIT(sc, unit))
|
|
return (0);
|
|
vu = &sc->sc_units[unit];
|
|
|
|
return (*sc->sc_chipset.vc_cc->cc_clock)(sc->sc_chipset.vc_cc,
|
|
vu->vu_clkmask, onoff);
|
|
}
|
|
|
|
vrip_intr_handle_t
|
|
__vrc4173bcu_intr_establish(vrip_chipset_tag_t vc, int unit, int line,
|
|
int level, int (*ih_fun)(void *), void *ih_arg)
|
|
{
|
|
struct vrc4173bcu_softc *sc = vc->vc_sc;
|
|
const struct vrc4173bcu_unit *vu;
|
|
struct vrc4173bcu_intrhand *ih;
|
|
|
|
if (!VALID_UNIT(sc, unit))
|
|
return (NULL);
|
|
vu = &sc->sc_units[unit];
|
|
ih = &sc->sc_intrhands[vu->vu_intr[line]];
|
|
if (ih->ih_fun) /* Can't share level 1 interrupt */
|
|
return (NULL);
|
|
ih->ih_fun = ih_fun;
|
|
ih->ih_arg = ih_arg;
|
|
ih->ih_unit = vu;
|
|
|
|
/* Mask level 2 interrupt mask register. (disable interrupt) */
|
|
vrip_intr_setmask2(vc, ih, ~0, 0);
|
|
/* Unmask Level 1 interrupt mask register (enable interrupt) */
|
|
vrip_intr_setmask1(vc, ih, 1);
|
|
|
|
return ((void *)ih);
|
|
}
|
|
|
|
void
|
|
__vrc4173bcu_intr_disestablish(vrip_chipset_tag_t vc, vrip_intr_handle_t handle)
|
|
{
|
|
struct vrc4173bcu_intrhand *ih = handle;
|
|
|
|
/* Mask Level 1 interrupt mask register (disable interrupt) */
|
|
vrip_intr_setmask1(vc, ih, 0);
|
|
/* Mask level 2 interrupt mask register(if any). (disable interrupt) */
|
|
vrip_intr_setmask2(vc, ih, ~0, 0);
|
|
ih->ih_fun = NULL;
|
|
ih->ih_arg = NULL;
|
|
}
|
|
|
|
/* Set level 1 interrupt mask. */
|
|
void
|
|
__vrc4173bcu_intr_setmask1(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
|
|
int enable)
|
|
{
|
|
struct vrc4173bcu_softc *sc = vc->vc_sc;
|
|
struct vrc4173bcu_intrhand *ih = handle;
|
|
int level1 = ih - sc->sc_intrhands;
|
|
|
|
DPRINTF(("__vrc4173bcu_intr_setmask1: SYSINT: %s %d\n",
|
|
enable ? "enable" : "disable", level1));
|
|
if (enable)
|
|
sc->sc_intrmask |= (1 << level1);
|
|
else
|
|
sc->sc_intrmask &= ~(1 << level1);
|
|
bus_space_write_2 (sc->sc_iot, sc->sc_icuh, VRC4173ICU_MSYSINT1,
|
|
sc->sc_intrmask);
|
|
#ifdef VRC4173BCU_DEBUG
|
|
if (vrc4173bcu_debug)
|
|
dbg_bit_print(sc->sc_intrmask);
|
|
#endif
|
|
|
|
return;
|
|
}
|
|
|
|
/* Get level 2 interrupt status */
|
|
void
|
|
__vrc4173bcu_intr_getstatus2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
|
|
u_int32_t *status /* Level 2 status */)
|
|
{
|
|
struct vrc4173bcu_softc *sc = vc->vc_sc;
|
|
struct vrc4173bcu_intrhand *ih = handle;
|
|
const struct vrc4173bcu_unit *vu = ih->ih_unit;
|
|
u_int32_t reg;
|
|
|
|
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_lreg);
|
|
reg |= (bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_hreg) << 16);
|
|
*status = reg;
|
|
}
|
|
|
|
/* Set level 2 interrupt mask. */
|
|
void
|
|
__vrc4173bcu_intr_setmask2(vrip_chipset_tag_t vc, vrip_intr_handle_t handle,
|
|
u_int32_t mask /* Level 2 mask */, int onoff)
|
|
{
|
|
struct vrc4173bcu_softc *sc = vc->vc_sc;
|
|
struct vrc4173bcu_intrhand *ih = handle;
|
|
const struct vrc4173bcu_unit *vu = ih->ih_unit;
|
|
u_int16_t reg;
|
|
|
|
DPRINTF(("vrc4173bcu_intr_setmask2:\n"));
|
|
#ifdef VRC4173BCU_DEBUG
|
|
if (vrc4173bcu_debug)
|
|
vrc4173bcu_dump_level2mask(vc, handle);
|
|
#endif
|
|
if (vu->vu_mlreg) {
|
|
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mlreg);
|
|
if (onoff)
|
|
reg |= (mask & 0xffff);
|
|
else
|
|
reg &= ~(mask & 0xffff);
|
|
bus_space_write_2(sc->sc_iot, sc->sc_ioh, vu->vu_mlreg, reg);
|
|
}
|
|
if (vu->vu_mhreg) {
|
|
reg = bus_space_read_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg);
|
|
if (onoff)
|
|
reg |= ((mask >> 16) & 0xffff);
|
|
else
|
|
reg &= ~((mask >> 16) & 0xffff);
|
|
bus_space_write_2(sc->sc_iot, sc->sc_icuh, vu->vu_mhreg, reg);
|
|
}
|
|
#ifdef VRC4173BCU_DEBUG
|
|
if (vrc4173bcu_debug)
|
|
vrc4173bcu_dump_level2mask(vc, handle);
|
|
#endif
|
|
|
|
return;
|
|
}
|
|
|
|
int
|
|
__vrc4173bcu_clock(vrcmu_chipset_tag_t cc, u_int16_t mask, int onoff)
|
|
{
|
|
struct vrc4173bcu_softc *sc = cc->cc_sc;
|
|
u_int16_t reg;
|
|
|
|
reg = bus_space_read_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK);
|
|
#if 0
|
|
printf("cmu register(enter):");
|
|
dbg_bit_print(reg);
|
|
#endif
|
|
if (onoff)
|
|
reg |= mask;
|
|
else
|
|
reg &= ~mask;
|
|
bus_space_write_2(sc->sc_iot, sc->sc_cmuh, VRC4173CMU_CLKMSK, reg);
|
|
#if 0
|
|
printf("cmu register(exit) :");
|
|
dbg_bit_print(reg);
|
|
#endif
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
__vrc4173bcu_register_cmu(vrip_chipset_tag_t vc, vrcmu_chipset_tag_t cmu)
|
|
{
|
|
vc->vc_cc = cmu;
|
|
}
|
|
|
|
void
|
|
__vrc4173bcu_register_gpio(vrip_chipset_tag_t vc, hpcio_chip_t chip)
|
|
{
|
|
/* XXX, not implemented yet */
|
|
}
|
|
|
|
void
|
|
__vrc4173bcu_register_dmaau(vrip_chipset_tag_t vc, vrdmaau_chipset_tag_t dmaau)
|
|
{
|
|
|
|
vc->vc_ac = dmaau;
|
|
}
|
|
|
|
void
|
|
__vrc4173bcu_register_dcu(vrip_chipset_tag_t vc, vrdcu_chipset_tag_t dcu)
|
|
{
|
|
|
|
vc->vc_dc = dcu;
|
|
}
|