1991e35ca9
length of the command buffer (1) instead of 0. Otherwise, data will have an implied offset of 0 and reads at non-0 locations will incorrectly return the data from 0. Fix as suggested in the report.
429 lines
11 KiB
C
429 lines
11 KiB
C
/* $NetBSD: m41t00.c,v 1.3 2004/09/30 18:57:39 briggs Exp $ */
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/*
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* Copyright (c) 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/fcntl.h>
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#include <sys/uio.h>
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#include <sys/conf.h>
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#include <sys/proc.h>
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#include <sys/event.h>
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#include <machine/bus.h>
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#include <dev/clock_subr.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/m41t00reg.h>
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struct m41t00_softc {
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struct device sc_dev;
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i2c_tag_t sc_tag;
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int sc_address;
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int sc_open;
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struct todr_chip_handle sc_todr;
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};
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static int m41t00_match(struct device *, struct cfdata *, void *);
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static void m41t00_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(m41trtc, sizeof(struct m41t00_softc),
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m41t00_match, m41t00_attach, NULL, NULL);
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extern struct cfdriver m41trtc_cd;
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dev_type_open(m41t00_open);
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dev_type_close(m41t00_close);
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dev_type_read(m41t00_read);
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dev_type_write(m41t00_write);
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const struct cdevsw m41t00_cdevsw = {
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m41t00_open, m41t00_close, m41t00_read, m41t00_write, noioctl,
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nostop, notty, nopoll, nommap, nokqfilter,
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};
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static int m41t00_clock_read(struct m41t00_softc *, struct clock_ymdhms *);
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static int m41t00_clock_write(struct m41t00_softc *, struct clock_ymdhms *);
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static int m41t00_gettime(struct todr_chip_handle *, struct timeval *);
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static int m41t00_settime(struct todr_chip_handle *, struct timeval *);
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static int m41t00_getcal(struct todr_chip_handle *, int *);
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static int m41t00_setcal(struct todr_chip_handle *, int);
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int
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m41t00_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct i2c_attach_args *ia = aux;
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if (ia->ia_addr == M41T00_ADDR) {
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return 1;
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}
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return 0;
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}
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void
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m41t00_attach(struct device *parent, struct device *self, void *aux)
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{
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struct m41t00_softc *sc = (struct m41t00_softc *)self;
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struct i2c_attach_args *ia = aux;
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sc->sc_tag = ia->ia_tag;
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sc->sc_address = ia->ia_addr;
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aprint_naive(": Real-time Clock\n");
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aprint_normal(": M41T00 Real-time Clock\n");
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sc->sc_open = 0;
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sc->sc_todr.cookie = sc;
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sc->sc_todr.todr_gettime = m41t00_gettime;
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sc->sc_todr.todr_settime = m41t00_settime;
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sc->sc_todr.todr_getcal = m41t00_getcal;
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sc->sc_todr.todr_setcal = m41t00_setcal;
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sc->sc_todr.todr_setwen = NULL;
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todr_attach(&sc->sc_todr);
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}
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/*ARGSUSED*/
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int
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m41t00_open(dev_t dev, int flag, int fmt, struct proc *p)
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{
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struct m41t00_softc *sc;
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if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
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return ENXIO;
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/* XXX: Locking */
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if (sc->sc_open)
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return EBUSY;
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sc->sc_open = 1;
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return 0;
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}
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/*ARGSUSED*/
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int
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m41t00_close(dev_t dev, int flag, int fmt, struct proc *p)
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{
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struct m41t00_softc *sc;
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if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
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return ENXIO;
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sc->sc_open = 0;
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return 0;
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}
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/*ARGSUSED*/
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int
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m41t00_read(dev_t dev, struct uio *uio, int flags)
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{
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struct m41t00_softc *sc;
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u_int8_t ch, cmdbuf[1];
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int a, error;
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if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= M41T00_NBYTES)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) {
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a = (int)uio->uio_offset;
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cmdbuf[0] = a;
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if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 1,
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&ch, 1, 0)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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printf("%s: m41t00_read: read failed at 0x%x\n",
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sc->sc_dev.dv_xname, a);
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return (error);
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}
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if ((error = uiomove(&ch, 1, uio)) != 0) {
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (0);
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}
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/*ARGSUSED*/
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int
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m41t00_write(dev_t dev, struct uio *uio, int flags)
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{
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struct m41t00_softc *sc;
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u_int8_t cmdbuf[2];
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int a, error;
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if ((sc = device_lookup(&m41trtc_cd, minor(dev))) == NULL)
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return (ENXIO);
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if (uio->uio_offset >= M41T00_NBYTES)
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return (EINVAL);
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if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
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return (error);
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while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) {
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a = (int)uio->uio_offset;
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cmdbuf[0] = a;
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if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
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break;
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if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP,
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sc->sc_address,
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cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
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printf("%s: m41t00_write: write failed at 0x%x\n",
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sc->sc_dev.dv_xname, a);
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break;
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}
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}
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iic_release_bus(sc->sc_tag, 0);
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return (error);
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}
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static int
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m41t00_gettime(struct todr_chip_handle *ch, struct timeval *tv)
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{
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struct m41t00_softc *sc = ch->cookie;
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struct clock_ymdhms dt;
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if (m41t00_clock_read(sc, &dt) == 0)
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return (-1);
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tv->tv_sec = clock_ymdhms_to_secs(&dt);
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tv->tv_usec = 0;
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return (0);
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}
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static int
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m41t00_settime(struct todr_chip_handle *ch, struct timeval *tv)
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{
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struct m41t00_softc *sc = ch->cookie;
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struct clock_ymdhms dt;
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clock_secs_to_ymdhms(tv->tv_sec, &dt);
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if (m41t00_clock_write(sc, &dt) == 0)
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return (-1);
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return (0);
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}
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static int
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m41t00_setcal(struct todr_chip_handle *ch, int cal)
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{
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return (EOPNOTSUPP);
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}
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static int
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m41t00_getcal(struct todr_chip_handle *ch, int *cal)
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{
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return (EOPNOTSUPP);
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}
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static int m41t00_rtc_offset[] = {
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M41T00_SEC,
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M41T00_MIN,
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M41T00_CENHR,
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M41T00_DAY,
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M41T00_DATE,
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M41T00_MONTH,
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M41T00_YEAR,
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};
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static int
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m41t00_clock_read(struct m41t00_softc *sc, struct clock_ymdhms *dt)
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{
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u_int8_t bcd[M41T00_NBYTES], cmdbuf[1];
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int i, n;
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: m41t00_clock_read: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/* Read each timekeeping register in order. */
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n = sizeof(m41t00_rtc_offset) / sizeof(m41t00_rtc_offset[0]);
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for (i = 0; i < n ; i++) {
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cmdbuf[0] = m41t00_rtc_offset[i];
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if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
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sc->sc_address, cmdbuf, 1,
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&bcd[i], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: m41t00_clock_read: failed to read rtc "
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"at 0x%x\n", sc->sc_dev.dv_xname,
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m41t00_rtc_offset[i]);
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return (0);
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}
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}
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/* Done with I2C */
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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/*
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* Convert the M41T00's register values into something useable
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*/
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dt->dt_sec = FROMBCD(bcd[M41T00_SEC] & M41T00_SEC_MASK);
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dt->dt_min = FROMBCD(bcd[M41T00_MIN] & M41T00_MIN_MASK);
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dt->dt_hour = FROMBCD(bcd[M41T00_CENHR] & M41T00_HOUR_MASK);
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dt->dt_day = FROMBCD(bcd[M41T00_DATE] & M41T00_DATE_MASK);
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dt->dt_wday = FROMBCD(bcd[M41T00_DAY] & M41T00_DAY_MASK);
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dt->dt_mon = FROMBCD(bcd[M41T00_MONTH] & M41T00_MONTH_MASK);
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dt->dt_year = FROMBCD(bcd[M41T00_YEAR] & M41T00_YEAR_MASK);
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/*
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* Since the m41t00 just stores 00-99, and this is 2003 as I write
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* this comment, use 2000 as a base year
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*/
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dt->dt_year += 2000;
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return (1);
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}
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static int
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m41t00_clock_write(struct m41t00_softc *sc, struct clock_ymdhms *dt)
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{
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uint8_t bcd[M41T00_DATE_BYTES], cmdbuf[2];
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uint8_t init_seconds, final_seconds;
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int i;
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/*
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* Convert our time representation into something the MAX6900
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* can understand.
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*/
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bcd[M41T00_SEC] = TOBCD(dt->dt_sec);
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bcd[M41T00_MIN] = TOBCD(dt->dt_min);
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bcd[M41T00_CENHR] = TOBCD(dt->dt_hour);
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bcd[M41T00_DATE] = TOBCD(dt->dt_day);
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bcd[M41T00_DAY] = TOBCD(dt->dt_wday);
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bcd[M41T00_MONTH] = TOBCD(dt->dt_mon);
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bcd[M41T00_YEAR] = TOBCD(dt->dt_year % 100);
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if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
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printf("%s: m41t00_clock_write: failed to acquire I2C bus\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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/*
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* The MAX6900 RTC manual recommends ensuring "atomicity" of
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* a non-burst write by:
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*
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* - writing SECONDS
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* - reading back SECONDS, remembering it as "initial seconds"
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* - write the remaing RTC registers
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* - read back SECONDS as "final seconds"
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* - if "initial seconds" == 59, ensure "final seconds" == 59
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* - else, ensure "final seconds" is no more than one second
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* beyond "initial seconds".
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*
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* This sounds reasonable for the M41T00, too.
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*/
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again:
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cmdbuf[0] = M41T00_SEC;
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if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
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cmdbuf, 1, &bcd[M41T00_SEC], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: m41t00_clock_write: failed to write SECONDS\n",
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sc->sc_dev.dv_xname);
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return (0);
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}
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cmdbuf[0] = M41T00_SEC;
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if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
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cmdbuf, 1, &init_seconds, 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: m41t00_clock_write: failed to read "
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"INITIAL SECONDS\n", sc->sc_dev.dv_xname);
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return (0);
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}
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init_seconds = FROMBCD(init_seconds & M41T00_SEC_MASK);
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for (i = 1; i < M41T00_DATE_BYTES; i++) {
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cmdbuf[0] = m41t00_rtc_offset[i];
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if (iic_exec(sc->sc_tag,
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I2C_OP_WRITE_WITH_STOP, sc->sc_address,
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cmdbuf, 1, &bcd[i], 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: m41t00_clock_write: failed to write rtc "
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" at 0x%x\n", sc->sc_dev.dv_xname,
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m41t00_rtc_offset[i]);
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return (0);
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}
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}
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cmdbuf[0] = M41T00_SEC;
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if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
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cmdbuf, 1, &final_seconds, 1, I2C_F_POLL)) {
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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printf("%s: m41t00_clock_write: failed to read "
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"FINAL SECONDS\n", sc->sc_dev.dv_xname);
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return (0);
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}
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final_seconds = FROMBCD(final_seconds & M41T00_SEC_MASK);
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if ((init_seconds != final_seconds) &&
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(((init_seconds + 1) % 60) != final_seconds)) {
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#if 1
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printf("%s: m41t00_clock_write: init %d, final %d, try again\n",
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sc->sc_dev.dv_xname, init_seconds, final_seconds);
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#endif
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goto again;
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}
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iic_release_bus(sc->sc_tag, I2C_F_POLL);
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return (1);
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}
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