a6db24a485
to select the maximum segment size for each bus_dmamap_load (up to the maxsegsz supplied to bus_dmamap_create). dm_maxsegsz is reset to the value supplied to bus_dmamap_create when the dmamap is unloaded.
454 lines
19 KiB
C
454 lines
19 KiB
C
/* $NetBSD: bus.h,v 1.7 2005/03/09 19:04:44 matt Exp $ */
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/* $OpenBSD: bus.h,v 1.13 2001/07/30 14:15:59 art Exp $ */
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/*
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* Copyright (c) 1998,1999 Michael Shalayeff
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Michael Shalayeff.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MACHINE_BUS_H_
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#define _MACHINE_BUS_H_
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#include <machine/cpufunc.h>
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/*
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* Bus address and size types.
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*/
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typedef u_long bus_addr_t;
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typedef u_long bus_size_t;
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typedef u_long bus_space_handle_t;
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struct hppa_bus_space_tag {
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void *hbt_cookie;
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int (*hbt_map) __P((void *v, bus_addr_t addr, bus_size_t size,
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int flags, bus_space_handle_t *bshp));
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void (*hbt_unmap) __P((void *v, bus_space_handle_t bsh,
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bus_size_t size));
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int (*hbt_subregion) __P((void *v, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size,
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bus_space_handle_t *nbshp));
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int (*hbt_alloc) __P((void *v, bus_addr_t rstart, bus_addr_t rend,
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bus_size_t size, bus_size_t align,
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bus_size_t boundary, int flags,
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bus_addr_t *addrp, bus_space_handle_t *bshp));
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void (*hbt_free) __P((void *, bus_space_handle_t, bus_size_t));
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void (*hbt_barrier) __P((void *v, bus_space_handle_t h,
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bus_size_t o, bus_size_t l, int op));
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void *(*hbt_vaddr) __P((void *, bus_space_handle_t));
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u_int8_t (*hbt_r1) __P((void *, bus_space_handle_t, bus_size_t));
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u_int16_t (*hbt_r2) __P((void *, bus_space_handle_t, bus_size_t));
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u_int32_t (*hbt_r4) __P((void *, bus_space_handle_t, bus_size_t));
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u_int64_t (*hbt_r8) __P((void *, bus_space_handle_t, bus_size_t));
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void (*hbt_w1)__P((void *, bus_space_handle_t, bus_size_t, u_int8_t));
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void (*hbt_w2)__P((void *, bus_space_handle_t, bus_size_t, u_int16_t));
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void (*hbt_w4)__P((void *, bus_space_handle_t, bus_size_t, u_int32_t));
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void (*hbt_w8)__P((void *, bus_space_handle_t, bus_size_t, u_int64_t));
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void (*hbt_rm_1) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int8_t *a, bus_size_t c));
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void (*hbt_rm_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int16_t *a, bus_size_t c));
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void (*hbt_rm_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int32_t *a, bus_size_t c));
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void (*hbt_rm_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int64_t *a, bus_size_t c));
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void (*hbt_wm_1) __P((void *v, bus_space_handle_t h, bus_size_t o,
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const u_int8_t *a, bus_size_t c));
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void (*hbt_wm_2) __P((void *v, bus_space_handle_t h, bus_size_t o,
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const u_int16_t *a, bus_size_t c));
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void (*hbt_wm_4) __P((void *v, bus_space_handle_t h, bus_size_t o,
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const u_int32_t *a, bus_size_t c));
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void (*hbt_wm_8) __P((void *v, bus_space_handle_t h, bus_size_t o,
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const u_int64_t *a, bus_size_t c));
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void (*hbt_sm_1) __P((void *v, bus_space_handle_t h, bus_size_t o,
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u_int8_t vv, bus_size_t c));
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void (*hbt_sm_2) __P((void *v, bus_space_handle_t h, bus_size_t o,
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u_int16_t vv, bus_size_t c));
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void (*hbt_sm_4) __P((void *v, bus_space_handle_t h, bus_size_t o,
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u_int32_t vv, bus_size_t c));
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void (*hbt_sm_8) __P((void *v, bus_space_handle_t h, bus_size_t o,
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u_int64_t vv, bus_size_t c));
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void (*hbt_rrm_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int16_t *a, bus_size_t c));
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void (*hbt_rrm_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int32_t *a, bus_size_t c));
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void (*hbt_rrm_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int64_t *a, bus_size_t c));
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void (*hbt_wrm_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int16_t *a, bus_size_t c));
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void (*hbt_wrm_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int32_t *a, bus_size_t c));
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void (*hbt_wrm_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int64_t *a, bus_size_t c));
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void (*hbt_rr_1) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int8_t *a, bus_size_t c));
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void (*hbt_rr_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int16_t *a, bus_size_t c));
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void (*hbt_rr_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int32_t *a, bus_size_t c));
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void (*hbt_rr_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int64_t *a, bus_size_t c));
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void (*hbt_wr_1) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int8_t *a, bus_size_t c));
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void (*hbt_wr_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int16_t *a, bus_size_t c));
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void (*hbt_wr_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int32_t *a, bus_size_t c));
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void (*hbt_wr_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int64_t *a, bus_size_t c));
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void (*hbt_rrr_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int16_t *a, bus_size_t c));
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void (*hbt_rrr_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int32_t *a, bus_size_t c));
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void (*hbt_rrr_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int64_t *a, bus_size_t c));
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void (*hbt_wrr_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int16_t *a, bus_size_t c));
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void (*hbt_wrr_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int32_t *a, bus_size_t c));
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void (*hbt_wrr_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, const u_int64_t *a, bus_size_t c));
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void (*hbt_sr_1) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int8_t vv, bus_size_t c));
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void (*hbt_sr_2) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int16_t vv, bus_size_t c));
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void (*hbt_sr_4) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int32_t vv, bus_size_t c));
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void (*hbt_sr_8) __P((void *v, bus_space_handle_t h,
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bus_size_t o, u_int64_t vv, bus_size_t c));
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void (*hbt_cp_1) __P((void *v, bus_space_handle_t h1, bus_size_t o1,
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bus_space_handle_t h2, bus_size_t o2, bus_size_t c));
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void (*hbt_cp_2) __P((void *v, bus_space_handle_t h1, bus_size_t o1,
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bus_space_handle_t h2, bus_size_t o2, bus_size_t c));
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void (*hbt_cp_4) __P((void *v, bus_space_handle_t h1, bus_size_t o1,
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bus_space_handle_t h2, bus_size_t o2, bus_size_t c));
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void (*hbt_cp_8) __P((void *v, bus_space_handle_t h1, bus_size_t o1,
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bus_space_handle_t h2, bus_size_t o2, bus_size_t c));
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};
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typedef const struct hppa_bus_space_tag *bus_space_tag_t;
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extern const struct hppa_bus_space_tag hppa_bustag;
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/* flags for bus space map functions */
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#define BUS_SPACE_MAP_CACHEABLE 0x0001
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#define BUS_SPACE_MAP_LINEAR 0x0002
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#define BUS_SPACE_MAP_READONLY 0x0004
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#define BUS_SPACE_MAP_PREFETCHABLE 0x0008
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#define BUS_SPACE_MAP_NOEXTENT 0x8000 /* no extent ops */
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#define BUS_SPACE_BARRIER_READ 0x0000
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#define BUS_SPACE_BARRIER_WRITE 0x0001
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/* bus access routines */
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#define DCIAS(pa) ((void)(pa))
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#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
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#define bus_space_map(t,a,c,ca,hp) \
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(((t)->hbt_map)((t)->hbt_cookie,(a),(c),(ca),(hp)))
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#define bus_space_unmap(t,h,c) \
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(((t)->hbt_unmap)((t)->hbt_cookie,(h),(c)))
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#define bus_space_subregion(t,h,o,c,hp) \
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(((t)->hbt_subregion)((t)->hbt_cookie,(h),(o),(c),(hp)))
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#define bus_space_alloc(t,b,e,c,al,bn,ca,ap,hp) \
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(((t)->hbt_alloc)((t)->hbt_alloc,(b),(e),(c),(al),(bn),(ca),(ap),(hp)))
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#define bus_space_free(t,h,c) \
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(((t)->hbt_free)((t)->hbt_cookie,(h),(c)))
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#define bus_space_barrier(t,h,o,l,op) \
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((t)->hbt_barrier((t)->hbt_cookie, (h), (o), (l), (op)))
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#define bus_space_vaddr(t,h) \
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(((t)->hbt_vaddr)((t)->hbt_cookie,(h)))
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#define bus_space_read_1(t,h,o) (((t)->hbt_r1)((t)->hbt_cookie,(h),(o)))
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#define bus_space_read_2(t,h,o) (((t)->hbt_r2)((t)->hbt_cookie,(h),(o)))
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#define bus_space_read_4(t,h,o) (((t)->hbt_r4)((t)->hbt_cookie,(h),(o)))
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#define bus_space_read_8(t,h,o) (((t)->hbt_r8)((t)->hbt_cookie,(h),(o)))
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#define bus_space_write_1(t,h,o,v) (((t)->hbt_w1)((t)->hbt_cookie,(h),(o),(v)))
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#define bus_space_write_2(t,h,o,v) (((t)->hbt_w2)((t)->hbt_cookie,(h),(o),(v)))
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#define bus_space_write_4(t,h,o,v) (((t)->hbt_w4)((t)->hbt_cookie,(h),(o),(v)))
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#define bus_space_write_8(t,h,o,v) (((t)->hbt_w8)((t)->hbt_cookie,(h),(o),(v)))
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/* XXX fredette */
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#define __BUS_SPACE_HAS_STREAM_METHODS
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#define bus_space_read_stream_2 bus_space_read_2
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#define bus_space_read_stream_4 bus_space_read_4
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#define bus_space_read_stream_8 bus_space_read_8
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#define bus_space_write_stream_2 bus_space_write_2
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#define bus_space_write_stream_4 bus_space_write_4
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#define bus_space_write_stream_8 bus_space_write_8
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#define bus_space_read_multi_1(t,h,o,a,c) \
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(((t)->hbt_rm_1)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_multi_2(t,h,o,a,c) \
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(((t)->hbt_rm_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_multi_4(t,h,o,a,c) \
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(((t)->hbt_rm_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_multi_8(t,h,o,a,c) \
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(((t)->hbt_rm_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_multi_1(t,h,o,a,c) \
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(((t)->hbt_wm_1)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_multi_2(t,h,o,a,c) \
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(((t)->hbt_wm_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_multi_4(t,h,o,a,c) \
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(((t)->hbt_wm_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_multi_8(t,h,o,a,c) \
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(((t)->hbt_wm_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_set_multi_1(t,h,o,v,c) \
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(((t)->hbt_sm_1)((t)->hbt_cookie, (h), (o), (v), (c)))
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#define bus_space_set_multi_2(t,h,o,v,c) \
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(((t)->hbt_sm_2)((t)->hbt_cookie, (h), (o), (v), (c)))
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#define bus_space_set_multi_4(t,h,o,v,c) \
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(((t)->hbt_sm_4)((t)->hbt_cookie, (h), (o), (v), (c)))
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#define bus_space_set_multi_8(t,h,o,v,c) \
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(((t)->hbt_sm_8)((t)->hbt_cookie, (h), (o), (v), (c)))
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#define bus_space_read_multi_stream_2(t, h, o, a, c) \
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(((t)->hbt_rrm_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_multi_stream_4(t, h, o, a, c) \
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(((t)->hbt_rrm_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_multi_stream_8(t, h, o, a, c) \
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(((t)->hbt_rrm_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_multi_stream_2(t, h, o, a, c) \
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(((t)->hbt_wrm_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_multi_stream_4(t, h, o, a, c) \
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(((t)->hbt_wrm_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_multi_stream_8(t, h, o, a, c) \
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(((t)->hbt_wrm_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_region_1(t, h, o, a, c) \
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(((t)->hbt_rr_1)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_region_2(t, h, o, a, c) \
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(((t)->hbt_rr_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_region_4(t, h, o, a, c) \
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(((t)->hbt_rr_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_region_8(t, h, o, a, c) \
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(((t)->hbt_rr_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_region_1(t, h, o, a, c) \
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(((t)->hbt_wr_1)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_region_2(t, h, o, a, c) \
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(((t)->hbt_wr_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_region_4(t, h, o, a, c) \
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(((t)->hbt_wr_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_region_8(t, h, o, a, c) \
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(((t)->hbt_wr_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_region_stream_2(t, h, o, a, c) \
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(((t)->hbt_rrr_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_region_stream_4(t, h, o, a, c) \
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(((t)->hbt_rrr_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_read_region_stream_8(t, h, o, a, c) \
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(((t)->hbt_rrr_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_region_stream_2(t, h, o, a, c) \
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(((t)->hbt_wrr_2)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_region_stream_4(t, h, o, a, c) \
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(((t)->hbt_wrr_4)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_write_region_stream_8(t, h, o, a, c) \
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(((t)->hbt_wrr_8)((t)->hbt_cookie, (h), (o), (a), (c)))
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#define bus_space_set_region_1(t, h, o, v, c) \
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(((t)->hbt_sr_1)((t)->hbt_cookie, (h), (o), (v), (c)))
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#define bus_space_set_region_2(t, h, o, v, c) \
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(((t)->hbt_sr_2)((t)->hbt_cookie, (h), (o), (v), (c)))
|
|
#define bus_space_set_region_4(t, h, o, v, c) \
|
|
(((t)->hbt_sr_4)((t)->hbt_cookie, (h), (o), (v), (c)))
|
|
#define bus_space_set_region_8(t, h, o, v, c) \
|
|
(((t)->hbt_sr_8)((t)->hbt_cookie, (h), (o), (v), (c)))
|
|
|
|
#define bus_space_copy_1(t, h1, o1, h2, o2, c) \
|
|
(((t)->hbt_cp_1)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c)))
|
|
#define bus_space_copy_2(t, h1, o1, h2, o2, c) \
|
|
(((t)->hbt_cp_2)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c)))
|
|
#define bus_space_copy_4(t, h1, o1, h2, o2, c) \
|
|
(((t)->hbt_cp_4)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c)))
|
|
#define bus_space_copy_8(t, h1, o1, h2, o2, c) \
|
|
(((t)->hbt_cp_8)((t)->hbt_cookie, (h1), (o1), (h2), (o2), (c)))
|
|
|
|
#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
|
|
#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
|
|
#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
|
|
#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
|
|
#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
|
|
#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
|
|
#define BUS_DMA_BUS2 0x020
|
|
#define BUS_DMA_BUS3 0x040
|
|
#define BUS_DMA_BUS4 0x080
|
|
#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
|
|
#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
|
|
#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
|
|
|
|
/* For devices that have a 24-bit address space */
|
|
#define BUS_DMA_24BIT BUS_DMA_BUS1
|
|
|
|
/* Forwards needed by prototypes below. */
|
|
struct mbuf;
|
|
struct proc;
|
|
struct uio;
|
|
|
|
#define BUS_DMASYNC_POSTREAD 0x01
|
|
#define BUS_DMASYNC_POSTWRITE 0x02
|
|
#define BUS_DMASYNC_PREREAD 0x04
|
|
#define BUS_DMASYNC_PREWRITE 0x08
|
|
|
|
typedef const struct hppa_bus_dma_tag *bus_dma_tag_t;
|
|
typedef struct hppa_bus_dmamap *bus_dmamap_t;
|
|
|
|
#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
|
|
|
|
/*
|
|
* bus_dma_segment_t
|
|
*
|
|
* Describes a single contiguous DMA transaction. Values
|
|
* are suitable for programming into DMA registers.
|
|
*/
|
|
struct hppa_bus_dma_segment {
|
|
bus_addr_t ds_addr; /* DMA address */
|
|
bus_size_t ds_len; /* length of transfer */
|
|
void *_ds_mlist; /* page list when dmamem_alloc'ed */
|
|
vaddr_t _ds_va; /* VA when dmamem_map'ed */
|
|
};
|
|
typedef struct hppa_bus_dma_segment bus_dma_segment_t;
|
|
|
|
/*
|
|
* bus_dma_tag_t
|
|
*
|
|
* A machine-dependent opaque type describing the implementation of
|
|
* DMA for a given bus.
|
|
*/
|
|
|
|
struct hppa_bus_dma_tag {
|
|
void *_cookie; /* cookie used in the guts */
|
|
|
|
/*
|
|
* DMA mapping methods.
|
|
*/
|
|
int (*_dmamap_create) __P((void *, bus_size_t, int,
|
|
bus_size_t, bus_size_t, int, bus_dmamap_t *));
|
|
void (*_dmamap_destroy) __P((void *, bus_dmamap_t));
|
|
int (*_dmamap_load) __P((void *, bus_dmamap_t, void *,
|
|
bus_size_t, struct proc *, int));
|
|
int (*_dmamap_load_mbuf) __P((void *, bus_dmamap_t,
|
|
struct mbuf *, int));
|
|
int (*_dmamap_load_uio) __P((void *, bus_dmamap_t,
|
|
struct uio *, int));
|
|
int (*_dmamap_load_raw) __P((void *, bus_dmamap_t,
|
|
bus_dma_segment_t *, int, bus_size_t, int));
|
|
void (*_dmamap_unload) __P((void *, bus_dmamap_t));
|
|
void (*_dmamap_sync) __P((void *, bus_dmamap_t, bus_addr_t, bus_size_t, int));
|
|
|
|
/*
|
|
* DMA memory utility functions.
|
|
*/
|
|
int (*_dmamem_alloc) __P((void *, bus_size_t, bus_size_t,
|
|
bus_size_t, bus_dma_segment_t *, int, int *, int));
|
|
void (*_dmamem_free) __P((void *, bus_dma_segment_t *, int));
|
|
int (*_dmamem_map) __P((void *, bus_dma_segment_t *,
|
|
int, size_t, caddr_t *, int));
|
|
void (*_dmamem_unmap) __P((void *, caddr_t, size_t));
|
|
paddr_t (*_dmamem_mmap) __P((void *, bus_dma_segment_t *,
|
|
int, off_t, int, int));
|
|
};
|
|
|
|
#define bus_dmamap_create(t, s, n, m, b, f, p) \
|
|
(*(t)->_dmamap_create)((t)->_cookie, (s), (n), (m), (b), (f), (p))
|
|
#define bus_dmamap_destroy(t, p) \
|
|
(*(t)->_dmamap_destroy)((t)->_cookie, (p))
|
|
#define bus_dmamap_load(t, m, b, s, p, f) \
|
|
(*(t)->_dmamap_load)((t)->_cookie, (m), (b), (s), (p), (f))
|
|
#define bus_dmamap_load_mbuf(t, m, b, f) \
|
|
(*(t)->_dmamap_load_mbuf)((t)->_cookie, (m), (b), (f))
|
|
#define bus_dmamap_load_uio(t, m, u, f) \
|
|
(*(t)->_dmamap_load_uio)((t)->_cookie, (m), (u), (f))
|
|
#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
|
|
(*(t)->_dmamap_load_raw)((t)->_cookie, (m), (sg), (n), (s), (f))
|
|
#define bus_dmamap_unload(t, p) \
|
|
(*(t)->_dmamap_unload)((t)->_cookie, (p))
|
|
#define bus_dmamap_sync(t, p, o, l, ops) \
|
|
(void)((t)->_dmamap_sync ? \
|
|
(*(t)->_dmamap_sync)((t)->_cookie, (p), (o), (l), (ops)) : (void)0)
|
|
|
|
#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
|
|
(*(t)->_dmamem_alloc)((t)->_cookie, (s), (a), (b), (sg), (n), (r), (f))
|
|
#define bus_dmamem_free(t, sg, n) \
|
|
(*(t)->_dmamem_free)((t)->_cookie, (sg), (n))
|
|
#define bus_dmamem_map(t, sg, n, s, k, f) \
|
|
(*(t)->_dmamem_map)((t)->_cookie, (sg), (n), (s), (k), (f))
|
|
#define bus_dmamem_unmap(t, k, s) \
|
|
(*(t)->_dmamem_unmap)((t)->_cookie, (k), (s))
|
|
#define bus_dmamem_mmap(t, sg, n, o, p, f) \
|
|
(*(t)->_dmamem_mmap)((t)->_cookie, (sg), (n), (o), (p), (f))
|
|
|
|
/*
|
|
* bus_dmamap_t
|
|
*
|
|
* Describes a DMA mapping.
|
|
*/
|
|
struct hppa_bus_dmamap {
|
|
/*
|
|
* PRIVATE MEMBERS: not for use by machine-independent code.
|
|
*/
|
|
bus_size_t _dm_size; /* largest DMA transfer mappable */
|
|
int _dm_segcnt; /* number of segs this map can map */
|
|
bus_size_t _dm_maxsegsz; /* fixed largest possible segment */
|
|
bus_size_t _dm_boundary; /* don't cross this */
|
|
int _dm_flags; /* misc. flags */
|
|
|
|
void *_dm_cookie; /* cookie for bus-specific functions */
|
|
|
|
/*
|
|
* PUBLIC MEMBERS: these are used by machine-independent code.
|
|
*/
|
|
bus_size_t dm_maxsegsz; /* largest possible segment */
|
|
bus_size_t dm_mapsize; /* size of the mapping */
|
|
int dm_nsegs; /* # valid segments in mapping */
|
|
bus_dma_segment_t dm_segs[1]; /* segments; variable length */
|
|
};
|
|
|
|
#endif /* _MACHINE_BUS_H_ */
|