130 lines
4.0 KiB
C
130 lines
4.0 KiB
C
/* $NetBSD: p_sni_rm200pci.c,v 1.1 2001/06/13 15:36:44 soda Exp $ */
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/* $OpenBSD: machdep.c,v 1.36 1999/05/22 21:22:19 weingart Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department, The Mach Operating System project at
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* Carnegie-Mellon University and Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 8.3 (Berkeley) 1/12/94
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <uvm/uvm_extern.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <machine/pio.h>
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#include <machine/platform.h>
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#include <mips/pte.h>
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void p_sni_rm200pci_init __P((void));
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void p_sni_rm200pci_cons_init __P((void));
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#include "com.h"
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#if NCOM > 0
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#include <sys/termios.h>
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#endif
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struct platform platform_sni_rm200pci = {
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"RM200PCI",
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NULL, /* unknown */
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"",
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"RM200",
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"Siemens Nixdorf",
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150, /* MHz ?? */
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NULL, /* XXX */
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platform_generic_match,
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p_sni_rm200pci_init,
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p_sni_rm200pci_cons_init,
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platform_nop, /* reset */
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arc_set_intr, /* ??? */
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};
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/*
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* critial i/o space, interrupt, and other chipset related initialization.
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*/
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void
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p_sni_rm200pci_init()
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{
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/*
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* XXX - should be enabled, if tested.
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*
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* We use safe default for now, because this platform is untested.
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* In other words, the following may not be needed at all.
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*/
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vm_page_zero_enable = FALSE;
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/*
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* Initialize I/O address offset
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*/
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#if 0
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arc_bus_space_init(&arc_bus_io, "rm200isaio",
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RM200_P_ISA_IO, RM200_V_ISA_IO, 0, RM200_S_ISA_IO);
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arc_bus_space_init(&arc_bus_mem, "rm200isamem",
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RM200_P_ISA_MEM, RM200_V_ISA_MEM, 0, RM200_S_ISA_MEM);
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#endif
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/*
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* Initialize wired TLB for I/O space which is used on early stage
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*/
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/*
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* Initialize interrupt priority
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*/
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}
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void
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p_sni_rm200pci_cons_init()
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{
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if (!com_console) {
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/* XXX For now... */
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}
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if (com_console_address == 0) {
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#if 0 /* XXX */
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com_console_address = xxx;
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#else
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panic("console address unknown");
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#endif
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}
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comcnattach(&arc_bus_io /* XXX? */, com_console_address,
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com_console_speed, com_freq, com_console_mode);
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}
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