365324ec10
configuration is no longer supported. - Use a much more obvious HP-IB job queueing scheme.
661 lines
16 KiB
C
661 lines
16 KiB
C
/* $NetBSD: fhpib.c,v 1.14 1997/01/30 09:06:53 thorpej Exp $ */
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/*
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* Copyright (c) 1996, 1997 Jason R. Thorpe. All rights reserved.
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* Copyright (c) 1982, 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)fhpib.c 8.2 (Berkeley) 1/12/94
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*/
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/*
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* 98625A/B HPIB driver
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/buf.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <hp300/hp300/isr.h>
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#include <hp300/dev/dioreg.h>
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#include <hp300/dev/diovar.h>
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#include <hp300/dev/diodevs.h>
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#include <hp300/dev/dmavar.h>
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#include <hp300/dev/fhpibreg.h>
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#include <hp300/dev/hpibvar.h>
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/*
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* Inline version of fhpibwait to be used in places where
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* we don't worry about getting hung.
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*/
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#define FHPIBWAIT(hd, m) while (((hd)->hpib_intr & (m)) == 0) DELAY(1)
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#ifdef DEBUG
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int fhpibdebugunit = -1;
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int fhpibdebug = 0;
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#define FDB_FAIL 0x01
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#define FDB_DMA 0x02
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#define FDB_WAIT 0x04
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#define FDB_PPOLL 0x08
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int dopriodma = 0; /* use high priority DMA */
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int doworddma = 1; /* non-zero if we should attempt word dma */
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int doppollint = 1; /* use ppoll interrupts instead of watchdog */
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int fhpibppolldelay = 50;
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#endif
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void fhpibifc __P((struct fhpibdevice *));
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void fhpibdmadone __P((void *));
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int fhpibwait __P((struct fhpibdevice *, int));
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void fhpibreset __P((struct hpibbus_softc *));
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int fhpibsend __P((struct hpibbus_softc *, int, int, void *, int));
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int fhpibrecv __P((struct hpibbus_softc *, int, int, void *, int));
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int fhpibppoll __P((struct hpibbus_softc *));
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void fhpibppwatch __P((void *));
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void fhpibgo __P((struct hpibbus_softc *, int, int, void *, int, int, int));
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void fhpibdone __P((struct hpibbus_softc *));
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int fhpibintr __P((void *));
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/*
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* Our controller ops structure.
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*/
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struct hpib_controller fhpib_controller = {
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fhpibreset,
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fhpibsend,
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fhpibrecv,
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fhpibppoll,
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fhpibppwatch,
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fhpibgo,
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fhpibdone,
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fhpibintr
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};
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struct fhpib_softc {
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struct device sc_dev; /* generic device glue */
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struct fhpibdevice *sc_regs; /* device registers */
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int sc_cmd;
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struct hpibbus_softc *sc_hpibbus; /* XXX */
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};
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int fhpibmatch __P((struct device *, struct cfdata *, void *));
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void fhpibattach __P((struct device *, struct device *, void *));
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struct cfattach fhpib_ca = {
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sizeof(struct fhpib_softc), fhpibmatch, fhpibattach
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};
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struct cfdriver fhpib_cd = {
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NULL, "fhpib", DV_DULL
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};
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int
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fhpibmatch(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct dio_attach_args *da = aux;
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if (da->da_id == DIO_DEVICE_ID_FHPIB)
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return (1);
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return (0);
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}
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void
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fhpibattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct fhpib_softc *sc = (struct fhpib_softc *)self;
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struct dio_attach_args *da = aux;
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struct hpibdev_attach_args ha;
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int ipl;
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sc->sc_regs = (struct fhpibdevice *)iomap(dio_scodetopa(da->da_scode),
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da->da_size);
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if (sc->sc_regs == NULL) {
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printf("\n%s: can't map registers\n", self->dv_xname);
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return;
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}
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ipl = DIO_IPL(sc->sc_regs);
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printf(" ipl %d: %s\n", ipl, DIO_DEVICE_DESC_FHPIB);
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/* Establish the interrupt handler. */
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(void) isrlink(fhpibintr, sc, ipl, ISRPRI_BIO);
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dmacomputeipl();
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ha.ha_ops = &fhpib_controller;
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ha.ha_type = HPIBC; /* XXX */
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ha.ha_ba = HPIBC_BA;
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ha.ha_softcpp = &sc->sc_hpibbus; /* XXX */
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(void)config_found(self, &ha, hpibdevprint);
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}
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void
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fhpibreset(hs)
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struct hpibbus_softc *hs;
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{
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struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
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struct fhpibdevice *hd = sc->sc_regs;
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hd->hpib_cid = 0xFF;
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DELAY(100);
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hd->hpib_cmd = CT_8BIT;
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hd->hpib_ar = AR_ARONC;
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fhpibifc(hd);
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hd->hpib_ie = IDS_IE;
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hd->hpib_data = C_DCL;
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DELAY(100000);
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/*
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* See if we can do word dma.
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* If so, we should be able to write and read back the appropos bit.
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*/
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hd->hpib_ie |= IDS_WDMA;
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if (hd->hpib_ie & IDS_WDMA) {
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hd->hpib_ie &= ~IDS_WDMA;
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hs->sc_flags |= HPIBF_DMA16;
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#ifdef DEBUG
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if (fhpibdebug & FDB_DMA)
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printf("fhpibtype: %s has word dma\n",
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sc->sc_dev.dv_xname);
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#endif
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}
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}
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void
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fhpibifc(hd)
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register struct fhpibdevice *hd;
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{
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hd->hpib_cmd |= CT_IFC;
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hd->hpib_cmd |= CT_INITFIFO;
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DELAY(100);
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hd->hpib_cmd &= ~CT_IFC;
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hd->hpib_cmd |= CT_REN;
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hd->hpib_stat = ST_ATN;
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}
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int
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fhpibsend(hs, slave, sec, ptr, origcnt)
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struct hpibbus_softc *hs;
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int slave, sec, origcnt;
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void *ptr;
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{
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struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
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struct fhpibdevice *hd = sc->sc_regs;
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register int cnt = origcnt;
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register int timo;
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char *addr = ptr;
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hd->hpib_stat = 0;
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hd->hpib_imask = IM_IDLE | IM_ROOM;
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if (fhpibwait(hd, IM_IDLE) < 0)
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goto senderr;
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hd->hpib_stat = ST_ATN;
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hd->hpib_data = C_UNL;
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hd->hpib_data = C_TAG + hs->sc_ba;
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hd->hpib_data = C_LAG + slave;
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if (sec < 0) {
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if (sec == -2) /* selected device clear KLUDGE */
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hd->hpib_data = C_SDC;
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} else
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hd->hpib_data = C_SCG + sec;
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if (fhpibwait(hd, IM_IDLE) < 0)
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goto senderr;
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if (cnt) {
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hd->hpib_stat = ST_WRITE;
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while (--cnt) {
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hd->hpib_data = *addr++;
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timo = hpibtimeout;
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while ((hd->hpib_intr & IM_ROOM) == 0) {
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if (--timo <= 0)
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goto senderr;
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DELAY(1);
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}
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}
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hd->hpib_stat = ST_EOI;
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hd->hpib_data = *addr;
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FHPIBWAIT(hd, IM_ROOM);
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hd->hpib_stat = ST_ATN;
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/* XXX: HP-UX claims bug with CS80 transparent messages */
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if (sec == 0x12)
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DELAY(150);
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hd->hpib_data = C_UNL;
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(void) fhpibwait(hd, IM_IDLE);
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}
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hd->hpib_imask = 0;
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return (origcnt);
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senderr:
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hd->hpib_imask = 0;
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fhpibifc(hd);
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#ifdef DEBUG
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if (fhpibdebug & FDB_FAIL) {
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printf("%s: fhpibsend failed: slave %d, sec %x, ",
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sc->sc_dev.dv_xname, slave, sec);
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printf("sent %d of %d bytes\n", origcnt-cnt-1, origcnt);
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}
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#endif
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return (origcnt - cnt - 1);
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}
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int
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fhpibrecv(hs, slave, sec, ptr, origcnt)
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struct hpibbus_softc *hs;
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int slave, sec, origcnt;
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void *ptr;
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{
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struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
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struct fhpibdevice *hd = sc->sc_regs;
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register int cnt = origcnt;
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register int timo;
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char *addr = ptr;
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/*
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* Slave < 0 implies continuation of a previous receive
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* that probably timed out.
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*/
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if (slave >= 0) {
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hd->hpib_stat = 0;
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hd->hpib_imask = IM_IDLE | IM_ROOM | IM_BYTE;
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if (fhpibwait(hd, IM_IDLE) < 0)
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goto recverror;
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hd->hpib_stat = ST_ATN;
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hd->hpib_data = C_UNL;
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hd->hpib_data = C_LAG + hs->sc_ba;
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hd->hpib_data = C_TAG + slave;
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if (sec != -1)
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hd->hpib_data = C_SCG + sec;
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if (fhpibwait(hd, IM_IDLE) < 0)
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goto recverror;
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hd->hpib_stat = ST_READ0;
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hd->hpib_data = 0;
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}
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if (cnt) {
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while (--cnt >= 0) {
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timo = hpibtimeout;
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while ((hd->hpib_intr & IM_BYTE) == 0) {
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if (--timo == 0)
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goto recvbyteserror;
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DELAY(1);
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}
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*addr++ = hd->hpib_data;
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}
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FHPIBWAIT(hd, IM_ROOM);
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hd->hpib_stat = ST_ATN;
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hd->hpib_data = (slave == 31) ? C_UNA : C_UNT;
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(void) fhpibwait(hd, IM_IDLE);
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}
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hd->hpib_imask = 0;
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return (origcnt);
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recverror:
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fhpibifc(hd);
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recvbyteserror:
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hd->hpib_imask = 0;
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#ifdef DEBUG
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if (fhpibdebug & FDB_FAIL) {
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printf("%s: fhpibrecv failed: slave %d, sec %x, ",
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sc->sc_dev.dv_xname, slave, sec);
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printf("got %d of %d bytes\n", origcnt-cnt-1, origcnt);
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}
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#endif
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return (origcnt - cnt - 1);
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}
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void
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fhpibgo(hs, slave, sec, ptr, count, rw, timo)
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struct hpibbus_softc *hs;
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int slave, sec, count, rw, timo;
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void *ptr;
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{
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struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
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register struct fhpibdevice *hd = sc->sc_regs;
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register int i;
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char *addr = ptr;
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int flags = 0;
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hs->sc_flags |= HPIBF_IO;
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if (timo)
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hs->sc_flags |= HPIBF_TIMO;
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if (rw == B_READ)
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hs->sc_flags |= HPIBF_READ;
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#ifdef DEBUG
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else if (hs->sc_flags & HPIBF_READ) {
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printf("fhpibgo: HPIBF_READ still set\n");
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hs->sc_flags &= ~HPIBF_READ;
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}
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#endif
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hs->sc_count = count;
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hs->sc_addr = addr;
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#ifdef DEBUG
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/* fhpibtransfer[unit]++; XXX */
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#endif
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if ((hs->sc_flags & HPIBF_DMA16) &&
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((int)addr & 1) == 0 && count && (count & 1) == 0
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#ifdef DEBUG
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&& doworddma
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#endif
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) {
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#ifdef DEBUG
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/* fhpibworddma[unit]++; XXX */
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#endif
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flags |= DMAGO_WORD;
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hd->hpib_latch = 0;
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}
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#ifdef DEBUG
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if (dopriodma)
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flags |= DMAGO_PRI;
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#endif
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if (hs->sc_flags & HPIBF_READ) {
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sc->sc_cmd = CT_REN | CT_8BIT;
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hs->sc_curcnt = count;
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dmago(hs->sc_dq->dq_chan, addr, count, flags|DMAGO_READ);
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if (fhpibrecv(hs, slave, sec, 0, 0) < 0) {
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#ifdef DEBUG
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printf("fhpibgo: recv failed, retrying...\n");
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#endif
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(void) fhpibrecv(hs, slave, sec, 0, 0);
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}
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i = hd->hpib_cmd;
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hd->hpib_cmd = sc->sc_cmd;
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hd->hpib_ie = IDS_DMA(hs->sc_dq->dq_chan) |
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((flags & DMAGO_WORD) ? IDS_WDMA : 0);
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return;
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}
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sc->sc_cmd = CT_REN | CT_8BIT | CT_FIFOSEL;
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if (count < hpibdmathresh) {
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#ifdef DEBUG
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/* fhpibnondma[unit]++; XXX */
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if (flags & DMAGO_WORD)
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/* fhpibworddma[unit]--; XXX */ ;
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#endif
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hs->sc_curcnt = count;
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(void) fhpibsend(hs, slave, sec, addr, count);
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fhpibdone(hs);
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return;
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}
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count -= (flags & DMAGO_WORD) ? 2 : 1;
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hs->sc_curcnt = count;
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dmago(hs->sc_dq->dq_chan, addr, count, flags);
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if (fhpibsend(hs, slave, sec, 0, 0) < 0) {
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#ifdef DEBUG
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printf("fhpibgo: send failed, retrying...\n");
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#endif
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(void) fhpibsend(hs, slave, sec, 0, 0);
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}
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i = hd->hpib_cmd;
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hd->hpib_cmd = sc->sc_cmd;
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hd->hpib_ie = IDS_DMA(hs->sc_dq->dq_chan) | IDS_WRITE |
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((flags & DMAGO_WORD) ? IDS_WDMA : 0);
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}
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/*
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* A DMA read can finish but the device can still be waiting (MAG-tape
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* with more data than we're waiting for). This timeout routine
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* takes care of that. Somehow, the thing gets hosed. For now, since
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* this should be a very rare occurence, we RESET it.
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*/
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void
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fhpibdmadone(arg)
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void *arg;
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{
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register struct hpibbus_softc *hs = arg;
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struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
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int s = splbio();
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if (hs->sc_flags & HPIBF_IO) {
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register struct fhpibdevice *hd = sc->sc_regs;
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register struct hpibqueue *hq;
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hd->hpib_imask = 0;
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hd->hpib_cid = 0xFF;
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DELAY(100);
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hd->hpib_cmd = CT_8BIT;
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hd->hpib_ar = AR_ARONC;
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fhpibifc(hd);
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hd->hpib_ie = IDS_IE;
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hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO);
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dmafree(hs->sc_dq);
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hq = hs->sc_queue.tqh_first;
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(hq->hq_intr)(hq->hq_softc);
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}
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splx(s);
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}
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void
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fhpibdone(hs)
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struct hpibbus_softc *hs;
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{
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struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
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register struct fhpibdevice *hd = sc->sc_regs;
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register char *addr;
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register int cnt;
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cnt = hs->sc_curcnt;
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hs->sc_addr += cnt;
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hs->sc_count -= cnt;
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#ifdef DEBUG
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if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == unit)
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printf("fhpibdone: addr %x cnt %d\n",
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hs->sc_addr, hs->sc_count);
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#endif
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if (hs->sc_flags & HPIBF_READ) {
|
|
hd->hpib_imask = IM_IDLE | IM_BYTE;
|
|
if (hs->sc_flags & HPIBF_TIMO)
|
|
timeout(fhpibdmadone, hs, hz >> 2);
|
|
} else {
|
|
cnt = hs->sc_count;
|
|
if (cnt) {
|
|
addr = hs->sc_addr;
|
|
hd->hpib_imask = IM_IDLE | IM_ROOM;
|
|
FHPIBWAIT(hd, IM_IDLE);
|
|
hd->hpib_stat = ST_WRITE;
|
|
while (--cnt) {
|
|
hd->hpib_data = *addr++;
|
|
FHPIBWAIT(hd, IM_ROOM);
|
|
}
|
|
hd->hpib_stat = ST_EOI;
|
|
hd->hpib_data = *addr;
|
|
}
|
|
hd->hpib_imask = IM_IDLE;
|
|
}
|
|
hs->sc_flags |= HPIBF_DONE;
|
|
hd->hpib_stat = ST_IENAB;
|
|
hd->hpib_ie = IDS_IE;
|
|
}
|
|
|
|
int
|
|
fhpibintr(arg)
|
|
void *arg;
|
|
{
|
|
struct fhpib_softc *sc = arg;
|
|
register struct hpibbus_softc *hs = sc->sc_hpibbus;
|
|
register struct fhpibdevice *hd = sc->sc_regs;
|
|
register struct hpibqueue *hq;
|
|
register int stat0, unit = sc->sc_dev.dv_unit;
|
|
|
|
stat0 = hd->hpib_ids;
|
|
if ((stat0 & (IDS_IE|IDS_IR)) != (IDS_IE|IDS_IR)) {
|
|
#ifdef DEBUG
|
|
if ((fhpibdebug & FDB_FAIL) && (stat0 & IDS_IR) &&
|
|
(hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) != HPIBF_IO)
|
|
printf("%s: fhpibintr: bad status %x\n",
|
|
sc->sc_dev.dv_xname, stat0);
|
|
/* fhpibbadint[0]++; XXX */
|
|
#endif
|
|
return(0);
|
|
}
|
|
if ((hs->sc_flags & (HPIBF_IO|HPIBF_DONE)) == HPIBF_IO) {
|
|
#ifdef DEBUG
|
|
/* fhpibbadint[1]++; XXX */
|
|
#endif
|
|
return(0);
|
|
}
|
|
#ifdef DEBUG
|
|
if ((fhpibdebug & FDB_DMA) && fhpibdebugunit == unit)
|
|
printf("fhpibintr: flags %x\n", hs->sc_flags);
|
|
#endif
|
|
hq = hs->sc_queue.tqh_first;
|
|
if (hs->sc_flags & HPIBF_IO) {
|
|
if (hs->sc_flags & HPIBF_TIMO)
|
|
untimeout(fhpibdmadone, hs);
|
|
stat0 = hd->hpib_cmd;
|
|
hd->hpib_cmd = sc->sc_cmd & ~CT_8BIT;
|
|
hd->hpib_stat = 0;
|
|
hd->hpib_cmd = CT_REN | CT_8BIT;
|
|
stat0 = hd->hpib_intr;
|
|
hd->hpib_imask = 0;
|
|
hs->sc_flags &= ~(HPIBF_DONE|HPIBF_IO|HPIBF_READ|HPIBF_TIMO);
|
|
dmafree(hs->sc_dq);
|
|
(hq->hq_intr)(hq->hq_softc);
|
|
} else if (hs->sc_flags & HPIBF_PPOLL) {
|
|
stat0 = hd->hpib_intr;
|
|
#ifdef DEBUG
|
|
if ((fhpibdebug & FDB_FAIL) &&
|
|
doppollint && (stat0 & IM_PPRESP) == 0)
|
|
printf("%s: fhpibintr: bad intr reg %x\n",
|
|
sc->sc_dev.dv_xname, stat0);
|
|
#endif
|
|
hd->hpib_stat = 0;
|
|
hd->hpib_imask = 0;
|
|
#ifdef DEBUG
|
|
stat0 = fhpibppoll(hs);
|
|
if ((fhpibdebug & FDB_PPOLL) && unit == fhpibdebugunit)
|
|
printf("fhpibintr: got PPOLL status %x\n", stat0);
|
|
if ((stat0 & (0x80 >> hq->hq_slave)) == 0) {
|
|
/*
|
|
* XXX give it another shot (68040)
|
|
*/
|
|
/* fhpibppollfail[unit]++; XXX */
|
|
DELAY(fhpibppolldelay);
|
|
stat0 = fhpibppoll(hs);
|
|
if ((stat0 & (0x80 >> hq->hq_slave)) == 0 &&
|
|
(fhpibdebug & FDB_PPOLL) && unit == fhpibdebugunit)
|
|
printf("fhpibintr: PPOLL: unit %d slave %d stat %x\n",
|
|
unit, dq->dq_slave, stat0);
|
|
}
|
|
#endif
|
|
hs->sc_flags &= ~HPIBF_PPOLL;
|
|
(hq->hq_intr)(hq->hq_softc);
|
|
}
|
|
return(1);
|
|
}
|
|
|
|
int
|
|
fhpibppoll(hs)
|
|
struct hpibbus_softc *hs;
|
|
{
|
|
struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
|
|
register struct fhpibdevice *hd = sc->sc_regs;
|
|
register int ppoll;
|
|
|
|
hd->hpib_stat = 0;
|
|
hd->hpib_psense = 0;
|
|
hd->hpib_pmask = 0xFF;
|
|
hd->hpib_imask = IM_PPRESP | IM_PABORT;
|
|
DELAY(25);
|
|
hd->hpib_intr = IM_PABORT;
|
|
ppoll = hd->hpib_data;
|
|
if (hd->hpib_intr & IM_PABORT)
|
|
ppoll = 0;
|
|
hd->hpib_imask = 0;
|
|
hd->hpib_pmask = 0;
|
|
hd->hpib_stat = ST_IENAB;
|
|
return(ppoll);
|
|
}
|
|
|
|
int
|
|
fhpibwait(hd, x)
|
|
register struct fhpibdevice *hd;
|
|
int x;
|
|
{
|
|
register int timo = hpibtimeout;
|
|
|
|
while ((hd->hpib_intr & x) == 0 && --timo)
|
|
DELAY(1);
|
|
if (timo == 0) {
|
|
#ifdef DEBUG
|
|
if (fhpibdebug & FDB_FAIL)
|
|
printf("fhpibwait(%x, %x) timeout\n", hd, x);
|
|
#endif
|
|
return(-1);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
/*
|
|
* XXX: this will have to change if we ever allow more than one
|
|
* pending operation per HP-IB.
|
|
*/
|
|
void
|
|
fhpibppwatch(arg)
|
|
void *arg;
|
|
{
|
|
register struct hpibbus_softc *hs = arg;
|
|
struct fhpib_softc *sc = (struct fhpib_softc *)hs->sc_dev.dv_parent;
|
|
register struct fhpibdevice *hd = sc->sc_regs;
|
|
register int slave;
|
|
|
|
if ((hs->sc_flags & HPIBF_PPOLL) == 0)
|
|
return;
|
|
slave = (0x80 >> hs->sc_queue.tqh_first->hq_slave);
|
|
#ifdef DEBUG
|
|
if (!doppollint) {
|
|
if (fhpibppoll(hs) & slave) {
|
|
hd->hpib_stat = ST_IENAB;
|
|
hd->hpib_imask = IM_IDLE | IM_ROOM;
|
|
} else
|
|
timeout(fhpibppwatch, sc, 1);
|
|
return;
|
|
}
|
|
if ((fhpibdebug & FDB_PPOLL) && sc->sc_dev.dv_unit == fhpibdebugunit)
|
|
printf("fhpibppwatch: sense request on %s\n",
|
|
sc->sc_dev.dv_xname);
|
|
#endif
|
|
hd->hpib_psense = ~slave;
|
|
hd->hpib_pmask = slave;
|
|
hd->hpib_stat = ST_IENAB;
|
|
hd->hpib_imask = IM_PPRESP | IM_PABORT;
|
|
hd->hpib_ie = IDS_IE;
|
|
}
|