181 lines
5.1 KiB
C
181 lines
5.1 KiB
C
/* $NetBSD: clock_pcc.c,v 1.5 1998/01/12 19:51:05 thorpej Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Glue for the Peripheral Channel Controller timers and the
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* Mostek clock chip found on the MVME-147.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/psl.h>
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#include <machine/cpu.h>
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#include <mvme68k/mvme68k/clockreg.h>
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#include <mvme68k/mvme68k/clockvar.h>
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#include <mvme68k/dev/pccreg.h>
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#include <mvme68k/dev/pccvar.h>
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int clock_pcc_match __P((struct device *, struct cfdata *, void *));
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void clock_pcc_attach __P((struct device *, struct device *, void *));
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int clock_pcc_profintr __P((void *));
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int clock_pcc_statintr __P((void *));
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void clock_pcc_initclocks __P((int, int));
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void clock_pcc_shutdown __P((void *));
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u_char clock_pcc_lvl;
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struct cfattach clock_pcc_ca = {
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sizeof(struct device), clock_pcc_match, clock_pcc_attach
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};
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extern struct cfdriver clock_cd;
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int
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clock_pcc_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct pcc_attach_args *pa = aux;
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static int clock_pcc_matched;
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/* Only one clock, please. */
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if (clock_pcc_matched)
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return (0);
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if (strcmp(pa->pa_name, clock_cd.cd_name))
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return (0);
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clock_pcc_matched = 1;
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pa->pa_ipl = cf->pcccf_ipl;
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return (1);
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}
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void
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clock_pcc_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pcc_attach_args *pa = aux;
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caddr_t nvram, clockregs;
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if (pa->pa_ipl != CLOCK_LEVEL)
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panic("clock_pcc_attach: wrong interrupt level");
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nvram = PCC_VADDR(pa->pa_offset);
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clockregs = PCC_VADDR(pa->pa_offset + PCC_RTC_OFF);
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/* Do common portions of clock config. */
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clock_config(self, clockregs, nvram, MK48T02_SIZE,
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clock_pcc_initclocks);
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/* Ensure our interrupts get disabled at shutdown time. */
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(void)shutdownhook_establish(clock_pcc_shutdown, NULL);
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/* Attach the interrupt handlers. */
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pccintr_establish(PCCV_TIMER1, clock_pcc_profintr, pa->pa_ipl, NULL);
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pccintr_establish(PCCV_TIMER2, clock_pcc_statintr, pa->pa_ipl, NULL);
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clock_pcc_lvl = pa->pa_ipl | PCC_IENABLE | PCC_TIMERACK;
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}
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void
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clock_pcc_initclocks(proftick, stattick)
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int proftick, stattick;
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{
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sys_pcc->t1_pload = pcc_timer_us2lim(proftick);
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sys_pcc->t1_cr = PCC_TIMERCLEAR;
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sys_pcc->t1_cr = PCC_TIMERSTART;
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sys_pcc->t1_int = clock_pcc_lvl;
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sys_pcc->t2_pload = pcc_timer_us2lim(stattick);
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sys_pcc->t2_cr = PCC_TIMERCLEAR;
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sys_pcc->t2_cr = PCC_TIMERSTART;
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sys_pcc->t2_int = clock_pcc_lvl;
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}
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int
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clock_pcc_profintr(frame)
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void *frame;
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{
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sys_pcc->t1_int = clock_pcc_lvl;
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hardclock(frame);
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clock_profcnt.ev_count++;
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return (1);
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}
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int
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clock_pcc_statintr(frame)
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void *frame;
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{
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/* Disable the timer interrupt while we handle it. */
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sys_pcc->t2_int = 0;
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statclock((struct clockframe *)frame);
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sys_pcc->t2_pload =
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pcc_timer_us2lim(CLOCK_NEWINT(clock_statvar, clock_statmin));
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sys_pcc->t2_cr = PCC_TIMERCLEAR;
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sys_pcc->t2_cr = PCC_TIMERSTART;
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sys_pcc->t2_int = clock_pcc_lvl;
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clock_statcnt.ev_count++;
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return (1);
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}
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/* ARGSUSED */
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void
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clock_pcc_shutdown(arg)
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void *arg;
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{
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/* Make sure the timer interrupts are turned off. */
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sys_pcc->t1_cr = PCC_TIMERCLEAR;
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sys_pcc->t1_int = 0;
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sys_pcc->t2_cr = PCC_TIMERCLEAR;
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sys_pcc->t2_int = 0;
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}
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