73 lines
2.7 KiB
C
73 lines
2.7 KiB
C
/* $NetBSD: scsivar.h,v 1.1.1.1 1998/06/09 07:53:06 dbj Exp $ */
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/*
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* Copyright (c) 1994 Rolf Grossmann
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Rolf Grossmann.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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struct scsi_softc {
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char sc_state; /* controller state */
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short sc_result; /* result of scsi command */
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/* saved interrupt state */
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u_char sc_status; /* last 5390 status */
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u_char sc_seqstep; /* last 5390 seqstep */
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u_char sc_intrstatus; /* last 5390 intrstatus */
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u_char sc_dmastatus; /* mass-storage chip status */
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char *dma_addr;
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int dma_len;
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};
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/* scsi states */
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#define SCSI_IDLE 0
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#define SCSI_SELECTING 1
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#define SCSI_HASBUS 2
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#define SCSI_DMA 3
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#define SCSI_CLEANUP 4
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#define SCSI_DONE 5
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/* scsi phase bits */
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#define IOI 1
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#define CDI 2
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#define MSGI 4
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/* information transfer phases */
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#define DATA_OUT_PHASE (0)
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#define DATA_IN_PHASE (IOI)
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#define COMMAND_PHASE (CDI)
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#define STATUS_PHASE (CDI|IOI)
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#define MSG_OUT_PHASE (MSGI|CDI)
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#define MSG_IN_PHASE (MSGI|CDI|IOI)
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/* simple loop timeout */
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#define SCSI_TIMEOUT 2000000
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extern struct scsi_softc scsi_softc;
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#define DELAY(n) { register int N = (n); while (--N > 0); }
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