251 lines
6.9 KiB
C
251 lines
6.9 KiB
C
/* $NetBSD: gt_mainbus.c,v 1.7 2003/03/24 17:07:17 matt Exp $ */
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/*
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* Copyright (c) 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Allen Briggs for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_ev64260.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#define _POWERPC_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include "opt_pci.h"
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pciconf.h>
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#include "opt_marvell.h"
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#include <dev/marvell/gtreg.h>
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#include <dev/marvell/gtvar.h>
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#include <dev/marvell/gtpcireg.h>
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#include <dev/marvell/gtpcivar.h>
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extern struct powerpc_bus_space gt_mem_bs_tag;
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extern struct powerpc_bus_space gt_pci0_mem_bs_tag;
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extern struct powerpc_bus_space gt_pci0_io_bs_tag;
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extern struct powerpc_bus_space gt_pci1_mem_bs_tag;
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extern struct powerpc_bus_space gt_pci1_io_bs_tag;
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struct powerpc_bus_dma_tag gt_bus_dma_tag = {
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0, /* _bounce_thresh */
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_bus_dmamap_create,
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_bus_dmamap_destroy,
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_bus_dmamap_load,
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_bus_dmamap_load_mbuf,
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_bus_dmamap_load_uio,
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_bus_dmamap_load_raw,
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_bus_dmamap_unload,
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_bus_dmamap_sync,
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_bus_dmamem_alloc,
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_bus_dmamem_free,
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_bus_dmamem_map,
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_bus_dmamem_unmap,
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_bus_dmamem_mmap,
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};
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const int gtpci_skipmask[2] = {
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#ifdef PCI0_SKIPMASK
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PCI0_SKIPMASK,
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#else
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0,
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#endif
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#ifdef PCI1_SKIPMASK
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PCI1_SKIPMASK,
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#else
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0,
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#endif
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};
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static int gt_match(struct device *, struct cfdata *, void *);
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static void gt_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(gt, sizeof(struct gt_softc), gt_match, gt_attach, NULL, NULL);
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extern struct cfdriver gt_cd;
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extern bus_space_handle_t gt_memh;
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static int gt_found;
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int
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gt_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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const char **busname = aux;
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if (strcmp(*busname, gt_cd.cd_name) != 0)
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return 0;
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if (gt_found)
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return 0;
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return 1;
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}
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void
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gt_attach(struct device *parent, struct device *self, void *aux)
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{
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struct gt_softc *gt = (struct gt_softc *) self;
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gt->gt_dmat = >_bus_dma_tag;
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gt->gt_memt = >_mem_bs_tag;
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gt->gt_pci0_memt = >_pci0_mem_bs_tag;
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gt->gt_pci0_iot = >_pci0_io_bs_tag;
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gt->gt_pci1_memt = >_pci1_mem_bs_tag;
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gt->gt_pci1_iot = >_pci1_io_bs_tag;
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gt->gt_memh = gt_memh;
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#if 0
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GT_DecodeAddr_SET(gt, GT_PCI0_IO_Low_Decode,
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gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_base);
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GT_DecodeAddr_SET(gt, GT_PCI0_IO_High_Decode,
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gt_pci0_io_bs_tag.pbs_offset + gt_pci0_io_bs_tag.pbs_limit - 1);
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GT_DecodeAddr_SET(gt, GT_PCI1_IO_Low_Decode,
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gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_base);
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GT_DecodeAddr_SET(gt, GT_PCI1_IO_High_Decode,
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gt_pci1_io_bs_tag.pbs_offset + gt_pci1_io_bs_tag.pbs_limit - 1);
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GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_Low_Decode,
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gt_pci0_mem_bs_tag.pbs_offset + gt_pci0_mem_bs_tag.pbs_base);
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GT_DecodeAddr_SET(gt, GT_PCI0_Mem0_High_Decode,
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gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1);
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GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_Low_Decode,
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gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_base);
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GT_DecodeAddr_SET(gt, GT_PCI1_Mem0_High_Decode,
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gt_pci1_mem_bs_tag.pbs_offset + gt_pci1_mem_bs_tag.pbs_limit - 1);
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#endif
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gt_attach_common(gt);
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}
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void
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gtpci_bus_configure(struct gtpci_chipset *gtpc)
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{
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#ifdef PCI_NETBSD_CONFIGURE
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struct extent *ioext, *memext;
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#if 0
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extern int pci_conf_debug;
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pci_conf_debug = 1;
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#endif
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switch (gtpc->gtpc_busno) {
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case 0:
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ioext = extent_create("pci0-io", 0x00000600, 0x0000ffff,
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M_DEVBUF, NULL, 0, EX_NOWAIT);
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memext = extent_create("pci0-mem",
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gt_pci0_mem_bs_tag.pbs_base,
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gt_pci0_mem_bs_tag.pbs_limit-1,
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M_DEVBUF, NULL, 0, EX_NOWAIT);
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break;
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case 1:
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ioext = extent_create("pci1-io", 0x00000600, 0x0000ffff,
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M_DEVBUF, NULL, 0, EX_NOWAIT);
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memext = extent_create("pci1-mem",
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gt_pci1_mem_bs_tag.pbs_base,
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gt_pci1_mem_bs_tag.pbs_limit-1,
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M_DEVBUF, NULL, 0, EX_NOWAIT);
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break;
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}
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pci_configure_bus(>pc->gtpc_pc, ioext, memext, NULL, 0, 32);
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extent_destroy(ioext);
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extent_destroy(memext);
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#endif /* PCI_NETBSD_CONFIGURE */
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}
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void
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gtpci_md_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int pin,
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int swiz, int *iline)
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{
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#ifdef PCI_NETBSD_CONFIGURE
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struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
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int line = (gtpc->gtpc_busno == 0 ? PCI0_GPPINTS : PCI1_GPPINTS);
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*iline = (line >> (8 * ((pin + swiz - 1) & 3))) & 0xff;
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if (*iline != 0xff)
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*iline += IRQ_GPP_BASE;
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#endif /* PCI_NETBSD_CONFIGURE */
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}
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void
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gtpci_md_bus_devorder(pci_chipset_tag_t pc, int busno, char devs[])
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{
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struct gtpci_chipset *gtpc = (struct gtpci_chipset *)pc;
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int dev;
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/*
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* Don't bother probing the GT itself.
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*/
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for (dev = 0; dev < 32; dev++) {
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if (PCI_CFG_GET_BUSNO(gtpc->gtpc_self) == busno &&
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(PCI_CFG_GET_DEVNO(gtpc->gtpc_self) == dev ||
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(gtpci_skipmask[gtpc->gtpc_busno] & (1 << dev))))
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continue;
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*devs++ = dev;
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}
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*devs = -1;
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}
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int
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gtpci_md_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func,
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pcireg_t id)
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{
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if (bus == 0 && dev == 0) /* don't configure GT */
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return 0;
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return PCI_CONF_ALL;
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}
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int
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gtpci_md_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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{
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int pin = pa->pa_intrpin;
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int line = pa->pa_intrline;
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if (pin > 4 || line >= NIRQ) {
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printf("pci_intr_map: bad interrupt pin %d\n", pin);
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*ihp = -1;
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return 1;
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}
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*ihp = line;
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return 0;
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}
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