157 lines
5.4 KiB
C
157 lines
5.4 KiB
C
/* $NetBSD: pmap.h,v 1.10 1995/12/11 17:09:23 thorpej Exp $ */
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/*
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* Copyright (c) 1987 Carnegie-Mellon University
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* Copyright (c) 1991, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)pmap.h 8.1 (Berkeley) 6/10/93
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*/
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#ifndef _HP300_PMAP_H_
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#define _HP300_PMAP_H_
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#include <machine/cpu.h>
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#include <machine/pte.h>
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#if defined(M68040)
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#define HP_SEG_SIZE (mmutype == MMU_68040 ? 0x40000 : NBSEG)
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#else
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#define HP_SEG_SIZE NBSEG
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#endif
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#define hp300_trunc_seg(x) (((unsigned)(x)) & ~(HP_SEG_SIZE-1))
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#define hp300_round_seg(x) hp300_trunc_seg((unsigned)(x) + HP_SEG_SIZE-1)
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/*
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* Pmap stuff
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*/
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struct pmap {
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pt_entry_t *pm_ptab; /* KVA of page table */
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st_entry_t *pm_stab; /* KVA of segment table */
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int pm_stchanged; /* ST changed */
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int pm_stfree; /* 040: free lev2 blocks */
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st_entry_t *pm_stpa; /* 040: ST phys addr */
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short pm_sref; /* segment table ref count */
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short pm_count; /* pmap reference count */
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simple_lock_data_t pm_lock; /* lock on pmap */
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struct pmap_statistics pm_stats; /* pmap statistics */
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long pm_ptpages; /* more stats: PT pages */
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};
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typedef struct pmap *pmap_t;
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/*
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* On the 040 we keep track of which level 2 blocks are already in use
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* with the pm_stfree mask. Bits are arranged from LSB (block 0) to MSB
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* (block 31). For convenience, the level 1 table is considered to be
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* block 0.
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*
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* MAX[KU]L2SIZE control how many pages of level 2 descriptors are allowed.
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* for the kernel and users. 8 implies only the initial "segment table"
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* page is used. WARNING: don't change MAXUL2SIZE unless you can allocate
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* physically contiguous pages for the ST in pmap.c!
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*/
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#define MAXKL2SIZE 32
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#define MAXUL2SIZE 8
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#define l2tobm(n) (1 << (n))
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#define bmtol2(n) (ffs(n) - 1)
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/*
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* Macros for speed
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*/
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#define PMAP_ACTIVATE(pmapp, pcbp, iscurproc) \
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if ((pmapp)->pm_stchanged) { \
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(pcbp)->pcb_ustp = hp300_btop((vm_offset_t)(pmapp)->pm_stpa); \
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if (iscurproc) \
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loadustp((pcbp)->pcb_ustp); \
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(pmapp)->pm_stchanged = FALSE; \
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}
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#define PMAP_DEACTIVATE(pmapp, pcbp)
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/*
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* For each vm_page_t, there is a list of all currently valid virtual
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* mappings of that page. An entry is a pv_entry, the list is pv_table.
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*/
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struct pv_entry {
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struct pv_entry *pv_next; /* next pv_entry */
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struct pmap *pv_pmap; /* pmap where mapping lies */
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vm_offset_t pv_va; /* virtual address for mapping */
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st_entry_t *pv_ptste; /* non-zero if VA maps a PT page */
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struct pmap *pv_ptpmap; /* if pv_ptste, pmap for PT page */
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int pv_flags; /* flags */
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};
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#define PV_CI 0x01 /* header: all entries are cache inhibited */
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#define PV_PTPAGE 0x02 /* header: entry maps a page table page */
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struct pv_page;
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struct pv_page_info {
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TAILQ_ENTRY(pv_page) pgi_list;
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struct pv_entry *pgi_freelist;
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int pgi_nfree;
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};
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/*
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* This is basically:
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* ((NBPG - sizeof(struct pv_page_info)) / sizeof(struct pv_entry))
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*/
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#define NPVPPG 170
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struct pv_page {
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struct pv_page_info pvp_pgi;
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struct pv_entry pvp_pv[NPVPPG];
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};
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extern struct pmap kernel_pmap_store;
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#define pmap_kernel() (&kernel_pmap_store)
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#define active_pmap(pm) \
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((pm) == pmap_kernel() || (pm) == curproc->p_vmspace->vm_map.pmap)
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extern struct pv_entry *pv_table; /* array of entries, one per page */
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#define pmap_page_index(pa) atop(pa - vm_first_phys)
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#define pa_to_pvh(pa) (&pv_table[pmap_page_index(pa)])
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count)
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extern pt_entry_t *Sysmap;
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extern char *vmmap; /* map for mem, dumps, etc. */
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#endif /* !_HP300_PMAP_H_ */
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