268 lines
7.3 KiB
C
268 lines
7.3 KiB
C
/* $NetBSD: pchb.c,v 1.17 1998/10/10 14:12:21 drochner Exp $ */
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/*-
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* Copyright (c) 1996, 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#define PCISET_BRIDGETYPE_MASK 0x3
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#define PCISET_TYPE_COMPAT 0x1
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#define PCISET_TYPE_AUX 0x2
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#define PCISET_BUSCONFIG_REG 0x48
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#define PCISET_BRIDGE_NUMBER(reg) (((reg) >> 8) & 0xff)
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#define PCISET_PCI_BUS_NUMBER(reg) (((reg) >> 16) & 0xff)
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/* XXX should be in dev/ic/i82424{reg.var}.h */
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#define I82424_CPU_BCTL_REG 0x53
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#define I82424_PCI_BCTL_REG 0x54
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#define I82424_BCTL_CPUMEM_POSTEN 0x01
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#define I82424_BCTL_CPUPCI_POSTEN 0x02
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#define I82424_BCTL_PCIMEM_BURSTEN 0x01
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#define I82424_BCTL_PCI_BURSTEN 0x02
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int pchbmatch __P((struct device *, struct cfdata *, void *));
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void pchbattach __P((struct device *, struct device *, void *));
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int pchb_print __P((void *, const char *));
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struct cfattach pchb_ca = {
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sizeof(struct device), pchbmatch, pchbattach
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};
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int
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pchbmatch(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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#if 0
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/*
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* PCI host bridges are matched on class/subclass.
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* This list contains only the bridges where correct
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* (or incorrect) behaviour is not yet confirmed.
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*/
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switch (PCI_VENDOR(pa->pa_id)) {
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case PCI_VENDOR_INTEL:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_CDC:
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case PCI_PRODUCT_INTEL_PCMC:
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case PCI_PRODUCT_INTEL_82437FX:
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case PCI_PRODUCT_INTEL_82437MX:
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case PCI_PRODUCT_INTEL_82437VX:
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case PCI_PRODUCT_INTEL_82439HX:
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case PCI_PRODUCT_INTEL_82441FX:
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case PCI_PRODUCT_INTEL_82443BX:
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case PCI_PRODUCT_INTEL_82443LX:
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case PCI_PRODUCT_INTEL_PCI450_PB:
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case PCI_PRODUCT_INTEL_PCI450_MC:
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return (1);
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}
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break;
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case PCI_VENDOR_UMC:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_UMC_UM8891N:
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case PCI_PRODUCT_UMC_UM8881F:
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return (1);
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}
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break;
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case PCI_VENDOR_ACC:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ACC_2188:
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return (1);
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}
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break;
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case PCI_VENDOR_ACER:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ACER_M1435:
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return (1);
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}
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break;
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case PCI_VENDOR_ALI:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_ALI_M1445:
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case PCI_PRODUCT_ALI_M1451:
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case PCI_PRODUCT_ALI_M1461:
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case PCI_PRODUCT_ALI_M1541:
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return (1);
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}
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break;
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case PCI_VENDOR_COMPAQ:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_COMPAQ_TRIFLEX1:
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case PCI_PRODUCT_COMPAQ_TRIFLEX2:
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case PCI_PRODUCT_COMPAQ_TRIFLEX4:
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return (1);
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}
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break;
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case PCI_VENDOR_NEXGEN:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_NEXGEN_NX82C501:
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return (1);
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}
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break;
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case PCI_VENDOR_NKK:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_NKK_NDR4600:
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return (1);
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}
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break;
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case PCI_VENDOR_TOSHIBA:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_TOSHIBA_R4X00:
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return (1);
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}
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break;
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case PCI_VENDOR_VIATECH:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_VIATECH_VT82C570M:
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case PCI_PRODUCT_VIATECH_VT82C595:
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return (1);
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}
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break;
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}
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#endif
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if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
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PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_HOST) {
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return (1);
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}
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return (0);
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}
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void
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pchbattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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char devinfo[256];
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struct pcibus_attach_args pba;
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pcireg_t bcreg;
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u_char bdnum, pbnum;
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printf("\n");
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/*
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* Print out a description, and configure certain chipsets which
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* have auxiliary PCI buses.
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*/
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pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo);
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printf("%s: %s (rev. 0x%02x)\n", self->dv_xname, devinfo,
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PCI_REVISION(pa->pa_class));
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switch (PCI_VENDOR(pa->pa_id)) {
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case PCI_VENDOR_INTEL:
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_PCI450_PB:
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bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
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PCISET_BUSCONFIG_REG);
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bdnum = PCISET_BRIDGE_NUMBER(bcreg);
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pbnum = PCISET_PCI_BUS_NUMBER(bcreg);
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switch (bdnum & PCISET_BRIDGETYPE_MASK) {
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default:
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printf("%s: bdnum=%x (reserved)\n",
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self->dv_xname, bdnum);
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break;
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case PCISET_TYPE_COMPAT:
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printf("%s: Compatibility PB (bus %d)\n",
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self->dv_xname, pbnum);
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break;
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case PCISET_TYPE_AUX:
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printf("%s: Auxiliary PB (bus %d)\n",
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self->dv_xname, pbnum);
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/*
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* This host bridge has a second PCI bus.
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* Configure it.
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*/
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pba.pba_busname = "pci";
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pba.pba_iot = pa->pa_iot;
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pba.pba_memt = pa->pa_memt;
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pba.pba_dmat = pa->pa_dmat;
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pba.pba_bus = pbnum;
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pba.pba_flags = pa->pa_flags;
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pba.pba_pc = pa->pa_pc;
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config_found(self, &pba, pchb_print);
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break;
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}
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break;
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case PCI_PRODUCT_INTEL_CDC:
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bcreg = pci_conf_read(pa->pa_pc, pa->pa_tag,
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I82424_CPU_BCTL_REG);
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if (bcreg & I82424_BCTL_CPUPCI_POSTEN) {
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bcreg &= ~I82424_BCTL_CPUPCI_POSTEN;
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pci_conf_write(pa->pa_pc, pa->pa_tag,
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I82424_CPU_BCTL_REG, bcreg);
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printf("%s: disabled CPU-PCI write posting\n",
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self->dv_xname);
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}
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break;
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}
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/*
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* XXX: vendor=PEQUR, device=0x0005 - host bridge with
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* auxiliary PCI bus (used in Compaq Proliant) should
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* be here, but I don't have enough information.
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*/
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}
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}
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int
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pchb_print(aux, pnp)
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void *aux;
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const char *pnp;
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{
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struct pcibus_attach_args *pba = aux;
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if (pnp)
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printf("%s at %s", pba->pba_busname, pnp);
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printf(" bus %d", pba->pba_bus);
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return (UNCONF);
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}
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