996 lines
22 KiB
C
996 lines
22 KiB
C
/* $NetBSD: if_bm.c,v 1.16 2001/07/22 11:29:46 wiz Exp $ */
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/*-
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* Copyright (C) 1998, 1999, 2000 Tsubai Masanari. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_inet.h"
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#include "opt_ns.h"
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#include "bpfilter.h"
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/ioctl.h>
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#include <sys/kernel.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <sys/systm.h>
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#include <sys/callout.h>
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#include <uvm/uvm_extern.h>
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#endif
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#endif
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#include <dev/ofw/openfirm.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/mii_bitbang.h>
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#include <machine/autoconf.h>
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#include <machine/pio.h>
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#include <macppc/dev/dbdma.h>
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#include <macppc/dev/if_bmreg.h>
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#define BMAC_TXBUFS 2
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#define BMAC_RXBUFS 16
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#define BMAC_BUFLEN 2048
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struct bmac_softc {
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struct device sc_dev;
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struct ethercom sc_ethercom;
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#define sc_if sc_ethercom.ec_if
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struct callout sc_tick_ch;
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vaddr_t sc_regs;
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dbdma_regmap_t *sc_txdma;
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dbdma_regmap_t *sc_rxdma;
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dbdma_command_t *sc_txcmd;
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dbdma_command_t *sc_rxcmd;
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caddr_t sc_txbuf;
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caddr_t sc_rxbuf;
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int sc_rxlast;
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int sc_flags;
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struct mii_data sc_mii;
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u_char sc_enaddr[6];
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};
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#define BMAC_BMACPLUS 0x01
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#define BMAC_DEBUGFLAG 0x02
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extern u_int *heathrow_FCR;
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static __inline int bmac_read_reg __P((struct bmac_softc *, int));
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static __inline void bmac_write_reg __P((struct bmac_softc *, int, int));
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static __inline void bmac_set_bits __P((struct bmac_softc *, int, int));
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static __inline void bmac_reset_bits __P((struct bmac_softc *, int, int));
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int bmac_match __P((struct device *, struct cfdata *, void *));
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void bmac_attach __P((struct device *, struct device *, void *));
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void bmac_reset_chip __P((struct bmac_softc *));
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void bmac_init __P((struct bmac_softc *));
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void bmac_init_dma __P((struct bmac_softc *));
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int bmac_intr __P((void *));
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int bmac_rint __P((void *));
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void bmac_reset __P((struct bmac_softc *));
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void bmac_stop __P((struct bmac_softc *));
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void bmac_start __P((struct ifnet *));
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void bmac_transmit_packet __P((struct bmac_softc *, void *, int));
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int bmac_put __P((struct bmac_softc *, caddr_t, struct mbuf *));
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struct mbuf *bmac_get __P((struct bmac_softc *, caddr_t, int));
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void bmac_watchdog __P((struct ifnet *));
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int bmac_ioctl __P((struct ifnet *, u_long, caddr_t));
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int bmac_mediachange __P((struct ifnet *));
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void bmac_mediastatus __P((struct ifnet *, struct ifmediareq *));
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void bmac_setladrf __P((struct bmac_softc *));
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int bmac_mii_readreg __P((struct device *, int, int));
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void bmac_mii_writereg __P((struct device *, int, int, int));
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void bmac_mii_statchg __P((struct device *));
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void bmac_mii_tick __P((void *));
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u_int32_t bmac_mbo_read __P((struct device *));
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void bmac_mbo_write __P((struct device *, u_int32_t));
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struct cfattach bm_ca = {
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sizeof(struct bmac_softc), bmac_match, bmac_attach
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};
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struct mii_bitbang_ops bmac_mbo = {
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bmac_mbo_read, bmac_mbo_write,
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{ MIFDO, MIFDI, MIFDC, MIFDIR, 0 }
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};
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int
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bmac_read_reg(sc, off)
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struct bmac_softc *sc;
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int off;
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{
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return in16rb(sc->sc_regs + off);
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}
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void
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bmac_write_reg(sc, off, val)
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struct bmac_softc *sc;
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int off, val;
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{
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out16rb(sc->sc_regs + off, val);
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}
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void
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bmac_set_bits(sc, off, val)
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struct bmac_softc *sc;
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int off, val;
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{
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val |= bmac_read_reg(sc, off);
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bmac_write_reg(sc, off, val);
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}
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void
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bmac_reset_bits(sc, off, val)
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struct bmac_softc *sc;
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int off, val;
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{
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bmac_write_reg(sc, off, bmac_read_reg(sc, off) & ~val);
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}
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int
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bmac_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct confargs *ca = aux;
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if (ca->ca_nreg < 24 || ca->ca_nintr < 12)
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return 0;
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if (strcmp(ca->ca_name, "bmac") == 0) /* bmac */
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return 1;
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if (strcmp(ca->ca_name, "ethernet") == 0) /* bmac+ */
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return 1;
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return 0;
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}
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void
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bmac_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct confargs *ca = aux;
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struct bmac_softc *sc = (void *)self;
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struct ifnet *ifp = &sc->sc_if;
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struct mii_data *mii = &sc->sc_mii;
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u_char laddr[6];
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callout_init(&sc->sc_tick_ch);
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sc->sc_flags =0;
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if (strcmp(ca->ca_name, "ethernet") == 0) {
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char name[64];
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memset(name, 0, 64);
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OF_package_to_path(ca->ca_node, name, sizeof(name));
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OF_open(name);
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sc->sc_flags |= BMAC_BMACPLUS;
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}
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ca->ca_reg[0] += ca->ca_baseaddr;
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ca->ca_reg[2] += ca->ca_baseaddr;
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ca->ca_reg[4] += ca->ca_baseaddr;
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sc->sc_regs = (vaddr_t)mapiodev(ca->ca_reg[0], NBPG);
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bmac_write_reg(sc, INTDISABLE, NoEventsMask);
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if (OF_getprop(ca->ca_node, "local-mac-address", laddr, 6) == -1 &&
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OF_getprop(ca->ca_node, "mac-address", laddr, 6) == -1) {
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printf(": cannot get mac-address\n");
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return;
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}
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memcpy(sc->sc_enaddr, laddr, 6);
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sc->sc_txdma = mapiodev(ca->ca_reg[2], NBPG);
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sc->sc_rxdma = mapiodev(ca->ca_reg[4], NBPG);
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sc->sc_txcmd = dbdma_alloc(BMAC_TXBUFS * sizeof(dbdma_command_t));
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sc->sc_rxcmd = dbdma_alloc((BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
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sc->sc_txbuf = malloc(BMAC_BUFLEN * BMAC_TXBUFS, M_DEVBUF, M_NOWAIT);
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sc->sc_rxbuf = malloc(BMAC_BUFLEN * BMAC_RXBUFS, M_DEVBUF, M_NOWAIT);
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if (sc->sc_txbuf == NULL || sc->sc_rxbuf == NULL ||
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sc->sc_txcmd == NULL || sc->sc_rxcmd == NULL) {
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printf("cannot allocate memory\n");
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return;
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}
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printf(" irq %d,%d: address %s\n", ca->ca_intr[0], ca->ca_intr[2],
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ether_sprintf(laddr));
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intr_establish(ca->ca_intr[0], IST_LEVEL, IPL_NET, bmac_intr, sc);
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intr_establish(ca->ca_intr[2], IST_LEVEL, IPL_NET, bmac_rint, sc);
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memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
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ifp->if_softc = sc;
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ifp->if_ioctl = bmac_ioctl;
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ifp->if_start = bmac_start;
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ifp->if_flags =
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IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
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ifp->if_watchdog = bmac_watchdog;
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mii->mii_ifp = ifp;
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mii->mii_readreg = bmac_mii_readreg;
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mii->mii_writereg = bmac_mii_writereg;
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mii->mii_statchg = bmac_mii_statchg;
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ifmedia_init(&mii->mii_media, 0, bmac_mediachange, bmac_mediastatus);
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mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY,
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MII_OFFSET_ANY, 0);
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/* Choose a default media. */
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if (LIST_FIRST(&mii->mii_phys) == NULL) {
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ifmedia_add(&mii->mii_media, IFM_ETHER|IFM_10_T, 0, NULL);
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ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_10_T);
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} else
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ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
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bmac_reset_chip(sc);
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if_attach(ifp);
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ether_ifattach(ifp, sc->sc_enaddr);
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}
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/*
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* Reset and enable bmac by heathrow FCR.
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*/
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void
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bmac_reset_chip(sc)
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struct bmac_softc *sc;
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{
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u_int v;
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dbdma_reset(sc->sc_txdma);
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dbdma_reset(sc->sc_rxdma);
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v = in32rb(heathrow_FCR);
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v |= EnetEnable;
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out32rb(heathrow_FCR, v);
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delay(50000);
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v |= ResetEnetCell;
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out32rb(heathrow_FCR, v);
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delay(50000);
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v &= ~ResetEnetCell;
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out32rb(heathrow_FCR, v);
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delay(50000);
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out32rb(heathrow_FCR, v);
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}
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void
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bmac_init(sc)
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struct bmac_softc *sc;
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{
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struct ifnet *ifp = &sc->sc_if;
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struct ether_header *eh;
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caddr_t data;
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int i, tb, bmcr;
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u_short *p;
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bmac_reset_chip(sc);
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/* XXX */
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bmcr = bmac_mii_readreg((struct device *)sc, 0, MII_BMCR);
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bmcr &= ~BMCR_ISO;
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bmac_mii_writereg((struct device *)sc, 0, MII_BMCR, bmcr);
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bmac_write_reg(sc, RXRST, RxResetValue);
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bmac_write_reg(sc, TXRST, TxResetBit);
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/* Wait for reset completion. */
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for (i = 1000; i > 0; i -= 10) {
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if ((bmac_read_reg(sc, TXRST) & TxResetBit) == 0)
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break;
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delay(10);
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}
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if (i <= 0)
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printf("%s: reset timeout\n", ifp->if_xname);
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if (! (sc->sc_flags & BMAC_BMACPLUS))
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bmac_set_bits(sc, XCVRIF, ClkBit|SerialMode|COLActiveLow);
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__asm __volatile ("mftb %0" : "=r"(tb));
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bmac_write_reg(sc, RSEED, tb);
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bmac_set_bits(sc, XIFC, TxOutputEnable);
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bmac_read_reg(sc, PAREG);
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/* Reset various counters. */
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bmac_write_reg(sc, NCCNT, 0);
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bmac_write_reg(sc, NTCNT, 0);
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bmac_write_reg(sc, EXCNT, 0);
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bmac_write_reg(sc, LTCNT, 0);
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bmac_write_reg(sc, FRCNT, 0);
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bmac_write_reg(sc, LECNT, 0);
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bmac_write_reg(sc, AECNT, 0);
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bmac_write_reg(sc, FECNT, 0);
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bmac_write_reg(sc, RXCV, 0);
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/* Set tx fifo information. */
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bmac_write_reg(sc, TXTH, 4); /* 4 octets before tx starts */
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bmac_write_reg(sc, TXFIFOCSR, 0);
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bmac_write_reg(sc, TXFIFOCSR, TxFIFOEnable);
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/* Set rx fifo information. */
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bmac_write_reg(sc, RXFIFOCSR, 0);
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bmac_write_reg(sc, RXFIFOCSR, RxFIFOEnable);
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/* Clear status register. */
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bmac_read_reg(sc, STATUS);
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bmac_write_reg(sc, HASH3, 0);
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bmac_write_reg(sc, HASH2, 0);
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bmac_write_reg(sc, HASH1, 0);
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bmac_write_reg(sc, HASH0, 0);
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/* Set MAC address. */
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p = (u_short *)sc->sc_enaddr;
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bmac_write_reg(sc, MADD0, *p++);
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bmac_write_reg(sc, MADD1, *p++);
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bmac_write_reg(sc, MADD2, *p);
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bmac_write_reg(sc, RXCFG,
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RxCRCEnable | RxHashFilterEnable | RxRejectOwnPackets);
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if (ifp->if_flags & IFF_PROMISC)
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bmac_set_bits(sc, RXCFG, RxPromiscEnable);
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bmac_init_dma(sc);
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/* Enable TX/RX */
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bmac_set_bits(sc, RXCFG, RxMACEnable);
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bmac_set_bits(sc, TXCFG, TxMACEnable);
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bmac_write_reg(sc, INTDISABLE, NormalIntEvents);
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ifp->if_flags |= IFF_RUNNING;
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ifp->if_flags &= ~IFF_OACTIVE;
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ifp->if_timer = 0;
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data = sc->sc_txbuf;
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eh = (struct ether_header *)data;
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memset(data, 0, sizeof(eh) + ETHERMIN);
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memcpy(eh->ether_dhost, sc->sc_enaddr, ETHER_ADDR_LEN);
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memcpy(eh->ether_shost, sc->sc_enaddr, ETHER_ADDR_LEN);
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bmac_transmit_packet(sc, data, sizeof(eh) + ETHERMIN);
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bmac_start(ifp);
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callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
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}
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void
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bmac_init_dma(sc)
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struct bmac_softc *sc;
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{
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dbdma_command_t *cmd = sc->sc_rxcmd;
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int i;
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dbdma_reset(sc->sc_txdma);
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dbdma_reset(sc->sc_rxdma);
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memset(sc->sc_txcmd, 0, BMAC_TXBUFS * sizeof(dbdma_command_t));
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memset(sc->sc_rxcmd, 0, (BMAC_RXBUFS + 1) * sizeof(dbdma_command_t));
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for (i = 0; i < BMAC_RXBUFS; i++) {
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DBDMA_BUILD(cmd, DBDMA_CMD_IN_LAST, 0, BMAC_BUFLEN,
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vtophys((vaddr_t)sc->sc_rxbuf + BMAC_BUFLEN * i),
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DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
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cmd++;
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}
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DBDMA_BUILD(cmd, DBDMA_CMD_NOP, 0, 0, 0,
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DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_ALWAYS);
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dbdma_st32(&cmd->d_cmddep, vtophys((vaddr_t)sc->sc_rxcmd));
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sc->sc_rxlast = 0;
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dbdma_start(sc->sc_rxdma, sc->sc_rxcmd);
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}
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int
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bmac_intr(v)
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void *v;
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{
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struct bmac_softc *sc = v;
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int stat;
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stat = bmac_read_reg(sc, STATUS);
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if (stat == 0)
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return 0;
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#ifdef BMAC_DEBUG
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printf("bmac_intr status = 0x%x\n", stat);
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#endif
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if (stat & IntFrameSent) {
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sc->sc_if.if_flags &= ~IFF_OACTIVE;
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sc->sc_if.if_timer = 0;
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sc->sc_if.if_opackets++;
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bmac_start(&sc->sc_if);
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}
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/* XXX should do more! */
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return 1;
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}
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int
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bmac_rint(v)
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void *v;
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{
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struct bmac_softc *sc = v;
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struct ifnet *ifp = &sc->sc_if;
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struct mbuf *m;
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dbdma_command_t *cmd;
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int status, resid, count, datalen;
|
|
int i, n;
|
|
void *data;
|
|
|
|
i = sc->sc_rxlast;
|
|
for (n = 0; n < BMAC_RXBUFS; n++, i++) {
|
|
if (i == BMAC_RXBUFS)
|
|
i = 0;
|
|
cmd = &sc->sc_rxcmd[i];
|
|
status = dbdma_ld16(&cmd->d_status);
|
|
resid = dbdma_ld16(&cmd->d_resid);
|
|
|
|
#ifdef BMAC_DEBUG
|
|
if (status != 0 && status != 0x8440 && status != 0x9440)
|
|
printf("bmac_rint status = 0x%x\n", status);
|
|
#endif
|
|
|
|
if ((status & DBDMA_CNTRL_ACTIVE) == 0) /* 0x9440 | 0x8440 */
|
|
continue;
|
|
count = dbdma_ld16(&cmd->d_count);
|
|
datalen = count - resid - 2; /* 2 == framelen */
|
|
if (datalen < sizeof(struct ether_header)) {
|
|
printf("%s: short packet len = %d\n",
|
|
ifp->if_xname, datalen);
|
|
goto next;
|
|
}
|
|
DBDMA_BUILD_CMD(cmd, DBDMA_CMD_STOP, 0, 0, 0, 0);
|
|
data = sc->sc_rxbuf + BMAC_BUFLEN * i;
|
|
|
|
/* XXX Sometimes bmac reads one extra byte. */
|
|
if (datalen == ETHER_MAX_LEN + 1)
|
|
datalen--;
|
|
m = bmac_get(sc, data, datalen);
|
|
|
|
if (m == NULL) {
|
|
ifp->if_ierrors++;
|
|
goto next;
|
|
}
|
|
|
|
#if NBPFILTER > 0
|
|
/*
|
|
* Check if there's a BPF listener on this interface.
|
|
* If so, hand off the raw packet to BPF.
|
|
*/
|
|
if (ifp->if_bpf)
|
|
bpf_mtap(ifp->if_bpf, m);
|
|
#endif
|
|
(*ifp->if_input)(ifp, m);
|
|
ifp->if_ipackets++;
|
|
|
|
next:
|
|
DBDMA_BUILD_CMD(cmd, DBDMA_CMD_IN_LAST, 0, DBDMA_INT_ALWAYS,
|
|
DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
|
|
|
|
cmd->d_status = 0;
|
|
cmd->d_resid = 0;
|
|
sc->sc_rxlast = i + 1;
|
|
}
|
|
dbdma_continue(sc->sc_rxdma);
|
|
|
|
return 1;
|
|
}
|
|
|
|
void
|
|
bmac_reset(sc)
|
|
struct bmac_softc *sc;
|
|
{
|
|
int s;
|
|
|
|
s = splnet();
|
|
bmac_init(sc);
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
bmac_stop(sc)
|
|
struct bmac_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
int s;
|
|
|
|
s = splnet();
|
|
|
|
callout_stop(&sc->sc_tick_ch);
|
|
mii_down(&sc->sc_mii);
|
|
|
|
/* Disable TX/RX. */
|
|
bmac_reset_bits(sc, TXCFG, TxMACEnable);
|
|
bmac_reset_bits(sc, RXCFG, RxMACEnable);
|
|
|
|
/* Disable all interrupts. */
|
|
bmac_write_reg(sc, INTDISABLE, NoEventsMask);
|
|
|
|
dbdma_stop(sc->sc_txdma);
|
|
dbdma_stop(sc->sc_rxdma);
|
|
|
|
ifp->if_flags &= ~(IFF_UP | IFF_RUNNING);
|
|
ifp->if_timer = 0;
|
|
|
|
splx(s);
|
|
}
|
|
|
|
void
|
|
bmac_start(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct bmac_softc *sc = ifp->if_softc;
|
|
struct mbuf *m;
|
|
int tlen;
|
|
|
|
if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
|
|
return;
|
|
|
|
while (1) {
|
|
if (ifp->if_flags & IFF_OACTIVE)
|
|
return;
|
|
|
|
IF_DEQUEUE(&ifp->if_snd, m);
|
|
if (m == 0)
|
|
break;
|
|
#if NBPFILTER > 0
|
|
/*
|
|
* If BPF is listening on this interface, let it see the
|
|
* packet before we commit it to the wire.
|
|
*/
|
|
if (ifp->if_bpf)
|
|
bpf_mtap(ifp->if_bpf, m);
|
|
#endif
|
|
|
|
ifp->if_flags |= IFF_OACTIVE;
|
|
tlen = bmac_put(sc, sc->sc_txbuf, m);
|
|
|
|
/* 5 seconds to watch for failing to transmit */
|
|
ifp->if_timer = 5;
|
|
ifp->if_opackets++; /* # of pkts */
|
|
|
|
bmac_transmit_packet(sc, sc->sc_txbuf, tlen);
|
|
}
|
|
}
|
|
|
|
void
|
|
bmac_transmit_packet(sc, buff, len)
|
|
struct bmac_softc *sc;
|
|
void *buff;
|
|
int len;
|
|
{
|
|
dbdma_command_t *cmd = sc->sc_txcmd;
|
|
vaddr_t va = (vaddr_t)buff;
|
|
|
|
#ifdef BMAC_DEBUG
|
|
if (vtophys(va) + len - 1 != vtophys(va + len - 1))
|
|
panic("bmac_transmit_packet");
|
|
#endif
|
|
|
|
DBDMA_BUILD(cmd, DBDMA_CMD_OUT_LAST, 0, len, vtophys(va),
|
|
DBDMA_INT_NEVER, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
|
|
cmd++;
|
|
DBDMA_BUILD(cmd, DBDMA_CMD_STOP, 0, 0, 0,
|
|
DBDMA_INT_ALWAYS, DBDMA_WAIT_NEVER, DBDMA_BRANCH_NEVER);
|
|
|
|
dbdma_start(sc->sc_txdma, sc->sc_txcmd);
|
|
}
|
|
|
|
int
|
|
bmac_put(sc, buff, m)
|
|
struct bmac_softc *sc;
|
|
caddr_t buff;
|
|
struct mbuf *m;
|
|
{
|
|
struct mbuf *n;
|
|
int len, tlen = 0;
|
|
|
|
for (; m; m = n) {
|
|
len = m->m_len;
|
|
if (len == 0) {
|
|
MFREE(m, n);
|
|
continue;
|
|
}
|
|
memcpy(buff, mtod(m, caddr_t), len);
|
|
buff += len;
|
|
tlen += len;
|
|
MFREE(m, n);
|
|
}
|
|
if (tlen > NBPG)
|
|
panic("%s: putpacket packet overflow", sc->sc_dev.dv_xname);
|
|
|
|
return tlen;
|
|
}
|
|
|
|
struct mbuf *
|
|
bmac_get(sc, pkt, totlen)
|
|
struct bmac_softc *sc;
|
|
caddr_t pkt;
|
|
int totlen;
|
|
{
|
|
struct mbuf *m;
|
|
struct mbuf *top, **mp;
|
|
int len;
|
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
|
if (m == 0)
|
|
return 0;
|
|
m->m_flags |= M_HASFCS;
|
|
m->m_pkthdr.rcvif = &sc->sc_if;
|
|
m->m_pkthdr.len = totlen;
|
|
len = MHLEN;
|
|
top = 0;
|
|
mp = ⊤
|
|
|
|
while (totlen > 0) {
|
|
if (top) {
|
|
MGET(m, M_DONTWAIT, MT_DATA);
|
|
if (m == 0) {
|
|
m_freem(top);
|
|
return 0;
|
|
}
|
|
len = MLEN;
|
|
}
|
|
if (totlen >= MINCLSIZE) {
|
|
MCLGET(m, M_DONTWAIT);
|
|
if ((m->m_flags & M_EXT) == 0) {
|
|
m_free(m);
|
|
m_freem(top);
|
|
return 0;
|
|
}
|
|
len = MCLBYTES;
|
|
}
|
|
m->m_len = len = min(totlen, len);
|
|
memcpy(mtod(m, caddr_t), pkt, len);
|
|
pkt += len;
|
|
totlen -= len;
|
|
*mp = m;
|
|
mp = &m->m_next;
|
|
}
|
|
|
|
return top;
|
|
}
|
|
|
|
void
|
|
bmac_watchdog(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct bmac_softc *sc = ifp->if_softc;
|
|
|
|
bmac_reset_bits(sc, RXCFG, RxMACEnable);
|
|
bmac_reset_bits(sc, TXCFG, TxMACEnable);
|
|
|
|
printf("%s: device timeout\n", ifp->if_xname);
|
|
ifp->if_oerrors++;
|
|
|
|
bmac_reset(sc);
|
|
}
|
|
|
|
int
|
|
bmac_ioctl(ifp, cmd, data)
|
|
struct ifnet *ifp;
|
|
u_long cmd;
|
|
caddr_t data;
|
|
{
|
|
struct bmac_softc *sc = ifp->if_softc;
|
|
struct ifaddr *ifa = (struct ifaddr *)data;
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
int s, error = 0;
|
|
|
|
s = splnet();
|
|
|
|
switch (cmd) {
|
|
|
|
case SIOCSIFADDR:
|
|
ifp->if_flags |= IFF_UP;
|
|
|
|
switch (ifa->ifa_addr->sa_family) {
|
|
#ifdef INET
|
|
case AF_INET:
|
|
bmac_init(sc);
|
|
arp_ifinit(ifp, ifa);
|
|
break;
|
|
#endif
|
|
#ifdef NS
|
|
case AF_NS:
|
|
{
|
|
struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
|
|
|
|
if (ns_nullhost(*ina))
|
|
ina->x_host =
|
|
*(union ns_host *)LLADDR(ifp->if_sadl);
|
|
else {
|
|
memcpy(LLADDR(ifp->if_sadl),
|
|
ina->x_host.c_host,
|
|
sizeof(sc->sc_enaddr));
|
|
}
|
|
/* Set new address. */
|
|
bmac_init(sc);
|
|
break;
|
|
}
|
|
#endif
|
|
default:
|
|
bmac_init(sc);
|
|
break;
|
|
}
|
|
break;
|
|
|
|
case SIOCSIFFLAGS:
|
|
if ((ifp->if_flags & IFF_UP) == 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) != 0) {
|
|
/*
|
|
* If interface is marked down and it is running, then
|
|
* stop it.
|
|
*/
|
|
bmac_stop(sc);
|
|
ifp->if_flags &= ~IFF_RUNNING;
|
|
} else if ((ifp->if_flags & IFF_UP) != 0 &&
|
|
(ifp->if_flags & IFF_RUNNING) == 0) {
|
|
/*
|
|
* If interface is marked up and it is stopped, then
|
|
* start it.
|
|
*/
|
|
bmac_init(sc);
|
|
} else {
|
|
/*
|
|
* Reset the interface to pick up changes in any other
|
|
* flags that affect hardware registers.
|
|
*/
|
|
/*bmac_stop(sc);*/
|
|
bmac_init(sc);
|
|
}
|
|
#ifdef BMAC_DEBUG
|
|
if (ifp->if_flags & IFF_DEBUG)
|
|
sc->sc_flags |= BMAC_DEBUGFLAG;
|
|
#endif
|
|
break;
|
|
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
error = (cmd == SIOCADDMULTI) ?
|
|
ether_addmulti(ifr, &sc->sc_ethercom) :
|
|
ether_delmulti(ifr, &sc->sc_ethercom);
|
|
|
|
if (error == ENETRESET) {
|
|
/*
|
|
* Multicast list has changed; set the hardware filter
|
|
* accordingly.
|
|
*/
|
|
bmac_init(sc);
|
|
bmac_setladrf(sc);
|
|
error = 0;
|
|
}
|
|
break;
|
|
|
|
case SIOCGIFMEDIA:
|
|
case SIOCSIFMEDIA:
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
|
|
break;
|
|
|
|
default:
|
|
error = EINVAL;
|
|
}
|
|
|
|
splx(s);
|
|
return error;
|
|
}
|
|
|
|
int
|
|
bmac_mediachange(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct bmac_softc *sc = ifp->if_softc;
|
|
|
|
return mii_mediachg(&sc->sc_mii);
|
|
}
|
|
|
|
void
|
|
bmac_mediastatus(ifp, ifmr)
|
|
struct ifnet *ifp;
|
|
struct ifmediareq *ifmr;
|
|
{
|
|
struct bmac_softc *sc = ifp->if_softc;
|
|
|
|
mii_pollstat(&sc->sc_mii);
|
|
|
|
ifmr->ifm_status = sc->sc_mii.mii_media_status;
|
|
ifmr->ifm_active = sc->sc_mii.mii_media_active;
|
|
}
|
|
|
|
/*
|
|
* Set up the logical address filter.
|
|
*/
|
|
void
|
|
bmac_setladrf(sc)
|
|
struct bmac_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
struct ether_multi *enm;
|
|
struct ether_multistep step;
|
|
u_int32_t crc;
|
|
u_int16_t hash[4];
|
|
int x;
|
|
|
|
/*
|
|
* Set up multicast address filter by passing all multicast addresses
|
|
* through a crc generator, and then using the high order 6 bits as an
|
|
* index into the 64 bit logical address filter. The high order bit
|
|
* selects the word, while the rest of the bits select the bit within
|
|
* the word.
|
|
*/
|
|
|
|
if (ifp->if_flags & IFF_PROMISC) {
|
|
bmac_set_bits(sc, RXCFG, RxPromiscEnable);
|
|
return;
|
|
}
|
|
|
|
if (ifp->if_flags & IFF_ALLMULTI) {
|
|
hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
|
|
goto chipit;
|
|
}
|
|
|
|
hash[3] = hash[2] = hash[1] = hash[0] = 0;
|
|
|
|
ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm);
|
|
while (enm != NULL) {
|
|
if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
|
|
/*
|
|
* We must listen to a range of multicast addresses.
|
|
* For now, just accept all multicasts, rather than
|
|
* trying to set only those filter bits needed to match
|
|
* the range. (At this time, the only use of address
|
|
* ranges is for IP multicast routing, for which the
|
|
* range is big enough to require all bits set.)
|
|
*/
|
|
hash[3] = hash[2] = hash[1] = hash[0] = 0xffff;
|
|
ifp->if_flags |= IFF_ALLMULTI;
|
|
goto chipit;
|
|
}
|
|
|
|
crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
|
|
|
|
/* Just want the 6 most significant bits. */
|
|
crc >>= 26;
|
|
|
|
/* Set the corresponding bit in the filter. */
|
|
hash[crc >> 4] |= 1 << (crc & 0xf);
|
|
|
|
ETHER_NEXT_MULTI(step, enm);
|
|
}
|
|
|
|
ifp->if_flags &= ~IFF_ALLMULTI;
|
|
|
|
chipit:
|
|
bmac_write_reg(sc, HASH0, hash[0]);
|
|
bmac_write_reg(sc, HASH1, hash[1]);
|
|
bmac_write_reg(sc, HASH2, hash[2]);
|
|
bmac_write_reg(sc, HASH3, hash[3]);
|
|
x = bmac_read_reg(sc, RXCFG);
|
|
x &= ~RxPromiscEnable;
|
|
x |= RxHashFilterEnable;
|
|
bmac_write_reg(sc, RXCFG, x);
|
|
}
|
|
|
|
int
|
|
bmac_mii_readreg(dev, phy, reg)
|
|
struct device *dev;
|
|
int phy, reg;
|
|
{
|
|
return mii_bitbang_readreg(dev, &bmac_mbo, phy, reg);
|
|
}
|
|
|
|
void
|
|
bmac_mii_writereg(dev, phy, reg, val)
|
|
struct device *dev;
|
|
int phy, reg, val;
|
|
{
|
|
mii_bitbang_writereg(dev, &bmac_mbo, phy, reg, val);
|
|
}
|
|
|
|
u_int32_t
|
|
bmac_mbo_read(dev)
|
|
struct device *dev;
|
|
{
|
|
struct bmac_softc *sc = (void *)dev;
|
|
|
|
return bmac_read_reg(sc, MIFCSR);
|
|
}
|
|
|
|
void
|
|
bmac_mbo_write(dev, val)
|
|
struct device *dev;
|
|
u_int32_t val;
|
|
{
|
|
struct bmac_softc *sc = (void *)dev;
|
|
|
|
bmac_write_reg(sc, MIFCSR, val);
|
|
}
|
|
|
|
void
|
|
bmac_mii_statchg(dev)
|
|
struct device *dev;
|
|
{
|
|
struct bmac_softc *sc = (void *)dev;
|
|
int x;
|
|
|
|
/* Update duplex mode in TX configuration */
|
|
x = bmac_read_reg(sc, TXCFG);
|
|
if ((IFM_OPTIONS(sc->sc_mii.mii_media_active) & IFM_FDX) != 0)
|
|
x |= TxFullDuplex;
|
|
else
|
|
x &= ~TxFullDuplex;
|
|
bmac_write_reg(sc, TXCFG, x);
|
|
|
|
#ifdef BMAC_DEBUG
|
|
printf("bmac_mii_statchg 0x%x\n",
|
|
IFM_OPTIONS(sc->sc_mii.mii_media_active));
|
|
#endif
|
|
}
|
|
|
|
void
|
|
bmac_mii_tick(v)
|
|
void *v;
|
|
{
|
|
struct bmac_softc *sc = v;
|
|
int s;
|
|
|
|
s = splnet();
|
|
mii_tick(&sc->sc_mii);
|
|
splx(s);
|
|
|
|
callout_reset(&sc->sc_tick_ch, hz, bmac_mii_tick, sc);
|
|
}
|