93 lines
4.0 KiB
C
93 lines
4.0 KiB
C
/* $NetBSD: vr4181aiureg.h,v 1.1 2003/05/01 07:02:04 igy Exp $ */
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/*
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Naoto Shimazaki of YOKOGAWA Electric Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* VR4181 AIU (Audio Interface Unit) Registers definitions.
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*/
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#define VR4181AIU_DCU1_BASE 0x0a000020
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#define VR4181AIU_DCU1_SIZE 0x28
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#define VR4181AIU_DCU2_BASE 0x0a000650
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#define VR4181AIU_DCU2_SIZE 0x18
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#define VR4181AIU_AIU_BASE 0x0b000160
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#define VR4181AIU_AIU_SIZE 0x20
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#define VR4181AIU_SDMADAT_REG_W 0x00 /* speaker DMA data (10bit) */
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#define VR4181AIU_MDMADAT_REG_W 0x02 /* microphone DMA data (10bit) */
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#define VR4181AIU_DAVREF_SETUP_REG_W 0x004 /* D/A Vref setup */
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#define VR4181AIU_SODATA_REG_W 0x06 /* speaker output data (10bit) */
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#define VR4181AIU_SCNT_REG_W 0x08 /* speaker control */
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#define VR4181AIU_DAENAIU 0x8000 /* D/A enable */
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#define VR4181AIU_SSTATE 0x0008 /* speaker status */
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#define VR4181AIU_SSTOPEN 0x0002 /* speaker stop end
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(1: 1 page, 0: 2 page) */
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#define VR4181AIU_SCNVC_END 0x0e /* speaker convert rate */
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#define VR4181AIU_MIDAT_REG_W 0x10 /* microphone input data (10bit) */
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#define VR4181AIU_MCNT_REG_W 0x12 /* microphone control */
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#define VR4181AIU_ADENAIU 0x8000 /* A/D enable */
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#define VR4181AIU_MSTATE 0x0008 /* microphone status */
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#define VR4181AIU_MSTOPEN 0x0002 /* microphone stop end
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(1: 1 page, 0: 2 page) */
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#define VR4181AIU_ADREQAIU 0x0001 /* A/D Request */
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#define VR4181AIU_DVALID_REG_W 0x18 /* data valid */
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#define VR4181AIU_SODATV 0x0008 /* SODATREG valid */
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#define VR4181AIU_SOMAV 0x0004 /* SDMADATREG valid */
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#define VR4181AIU_MIDATV 0x0002 /* MIDATREG valid */
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#define VR4181AIU_MDMAV 0x0001 /* MDMADATREG valid */
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#define VR4181AIU_SEQ_REG_W 0x1a /* sequencer */
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#define VR4181AIU_AIURST 0x8000 /* AIU reset */
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#define VR4181AIU_AIUMEN 0x0010 /* microphone enable */
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#define VR4181AIU_AIUSEN 0x0001 /* speaker enable */
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#define VR4181AIU_INT_REG_W 0x1c /* interrupt */
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#define VR4181AIU_MIDLEINTR 0x0200 /* microphone idle interrupt */
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#define VR4181AIU_MSTINTR 0x0100 /* microphone set interrupt */
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#define VR4181AIU_SIDLEINTR 0x0002 /* speaker idle interrupt */
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#define VR4181AIU_MCNVC_END 0x1e /* microphone convert rate */
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