437 lines
13 KiB
C
437 lines
13 KiB
C
/* $NetBSD: rtc.c,v 1.20 2003/07/15 02:29:34 lukem Exp $ */
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/*-
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* Copyright (c) 1999 Shin Takemura. All rights reserved.
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* Copyright (c) 1999 SATO Kazumi. All rights reserved.
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* Copyright (c) 1999 PocketBSD Project. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the PocketBSD project
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* and its contributors.
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* 4. Neither the name of the project nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: rtc.c,v 1.20 2003/07/15 02:29:34 lukem Exp $");
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#include "opt_vr41xx.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <machine/sysconf.h>
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#include <machine/bus.h>
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#include <dev/clock_subr.h>
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#include <hpcmips/vr/vr.h>
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#include <hpcmips/vr/vrcpudef.h>
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#include <hpcmips/vr/vripif.h>
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#include <hpcmips/vr/vripreg.h>
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#include <hpcmips/vr/rtcreg.h>
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/*
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* for debugging definitions
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* VRRTCDEBUG print rtc debugging information
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*/
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#ifdef VRRTCDEBUG
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#ifndef VRRTCDEBUG_CONF
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#define VRRTCDEBUG_CONF 0
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#endif
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int vrrtc_debug = VRRTCDEBUG_CONF;
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#define DPRINTF(arg) if (vrrtc_debug) printf arg;
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#define DDUMP_REGS(arg) if (vrrtc_debug) vrrtc_dump_regs(arg);
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#else /* VRRTCDEBUG */
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#define DPRINTF(arg)
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#define DDUMP_REGS(arg)
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#endif /* VRRTCDEBUG */
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struct vrrtc_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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void *sc_ih;
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#ifndef SINGLE_VRIP_BASE
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int sc_rtcint_reg;
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int sc_tclk_h_reg, sc_tclk_l_reg;
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int sc_tclk_cnt_h_reg, sc_tclk_cnt_l_reg;
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#endif /* SINGLE_VRIP_BASE */
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};
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void clock_init(struct device *);
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void clock_get(struct device *, time_t, struct clock_ymdhms *);
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void clock_set(struct device *, struct clock_ymdhms *);
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struct platform_clock vr_clock = {
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#define CLOCK_RATE 128
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CLOCK_RATE, clock_init, clock_get, clock_set,
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};
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int vrrtc_match(struct device *, struct cfdata *, void *);
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void vrrtc_attach(struct device *, struct device *, void *);
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int vrrtc_intr(void*, u_int32_t, u_int32_t);
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void vrrtc_dump_regs(struct vrrtc_softc *);
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CFATTACH_DECL(vrrtc, sizeof(struct vrrtc_softc),
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vrrtc_match, vrrtc_attach, NULL, NULL);
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static __inline__ void vrrtc_write(struct vrrtc_softc *, int, u_int16_t);
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static __inline__ u_int16_t vrrtc_read(struct vrrtc_softc *, int);
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void cvt_timehl_ymdhms(u_int32_t, u_int32_t, struct clock_ymdhms *);
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extern int rtc_offset;
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static int m2d[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
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static __inline__ void
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vrrtc_write(struct vrrtc_softc *sc, int port, u_int16_t val)
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{
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);
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}
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static __inline__ u_int16_t
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vrrtc_read(struct vrrtc_softc *sc, int port)
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{
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return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, port));
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}
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int
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vrrtc_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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return (1);
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}
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#ifndef SINGLE_VRIP_BASE
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#define RTCINT_REG_W (sc->sc_rtcint_reg)
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#define TCLK_H_REG_W (sc->sc_tclk_h_reg)
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#define TCLK_L_REG_W (sc->sc_tclk_l_reg)
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#define TCLK_CNT_H_REG_W (sc->sc_tclk_cnt_h_reg)
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#define TCLK_CNT_L_REG_W (sc->sc_tclk_cnt_l_reg)
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#endif /* SINGLE_VRIP_BASE */
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void
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vrrtc_attach(struct device *parent, struct device *self, void *aux)
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{
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struct vrip_attach_args *va = aux;
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struct vrrtc_softc *sc = (void *)self;
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#ifndef SINGLE_VRIP_BASE
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if (va->va_addr == VR4102_RTC_ADDR) {
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sc->sc_rtcint_reg = VR4102_RTCINT_REG_W;
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sc->sc_tclk_h_reg = VR4102_TCLK_H_REG_W;
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sc->sc_tclk_l_reg = VR4102_TCLK_L_REG_W;
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sc->sc_tclk_cnt_h_reg = VR4102_TCLK_CNT_H_REG_W;
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sc->sc_tclk_cnt_l_reg = VR4102_TCLK_CNT_L_REG_W;
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} else
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if (va->va_addr == VR4122_RTC_ADDR) {
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sc->sc_rtcint_reg = VR4122_RTCINT_REG_W;
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sc->sc_tclk_h_reg = VR4122_TCLK_H_REG_W;
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sc->sc_tclk_l_reg = VR4122_TCLK_L_REG_W;
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sc->sc_tclk_cnt_h_reg = VR4122_TCLK_CNT_H_REG_W;
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sc->sc_tclk_cnt_l_reg = VR4122_TCLK_CNT_L_REG_W;
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} else
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if (va->va_addr == VR4181_RTC_ADDR) {
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sc->sc_rtcint_reg = VR4181_RTCINT_REG_W;
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sc->sc_tclk_h_reg = RTC_NO_REG_W;
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sc->sc_tclk_l_reg = RTC_NO_REG_W;
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sc->sc_tclk_cnt_h_reg = RTC_NO_REG_W;
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sc->sc_tclk_cnt_l_reg = RTC_NO_REG_W;
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} else {
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panic("%s: unknown base address 0x%lx",
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sc->sc_dev.dv_xname, va->va_addr);
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}
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#endif /* SINGLE_VRIP_BASE */
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sc->sc_iot = va->va_iot;
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if (bus_space_map(sc->sc_iot, va->va_addr, va->va_size,
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0 /* no flags */, &sc->sc_ioh)) {
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printf("vrrtc_attach: can't map i/o space\n");
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return;
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}
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/* RTC interrupt handler is directly dispatched from CPU intr */
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vr_intr_establish(VR_INTR1, vrrtc_intr, sc);
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/* But need to set level 1 interrupt mask register,
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* so regsiter fake interrurpt handler
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*/
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if (!(sc->sc_ih = vrip_intr_establish(va->va_vc, va->va_unit, 0,
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IPL_CLOCK, 0, 0))) {
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printf (":can't map interrupt.\n");
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return;
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}
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/*
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* Rtc is attached to call this routine
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* before cpu_initclock() calls clock_init().
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* So we must disable all interrupt for now.
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*/
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/*
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* Disable all rtc interrupts
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*/
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/* Disable Elapse compare intr */
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_H_REG_W, 0);
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_M_REG_W, 0);
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, ECMP_L_REG_W, 0);
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/* Disable RTC Long1 intr */
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W, 0);
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_L_REG_W, 0);
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/* Disable RTC Long2 intr */
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL2_H_REG_W, 0);
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL2_L_REG_W, 0);
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/* Disable RTC TCLK intr */
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if (TCLK_H_REG_W != RTC_NO_REG_W) {
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, TCLK_H_REG_W, 0);
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, TCLK_L_REG_W, 0);
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}
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/*
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* Clear all rtc intrrupts.
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*/
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCINT_REG_W, RTCINT_ALL);
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platform_clock_attach(sc, &vr_clock);
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}
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int
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vrrtc_intr(void *arg, u_int32_t pc, u_int32_t statusReg)
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{
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struct vrrtc_softc *sc = arg;
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struct clockframe cf;
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCINT_REG_W, RTCINT_ALL);
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cf.pc = pc;
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cf.sr = statusReg;
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hardclock(&cf);
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return 0;
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}
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void
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clock_init(struct device *dev)
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{
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struct vrrtc_softc *sc = (struct vrrtc_softc *)dev;
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DDUMP_REGS(sc);
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/*
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* Set tick (CLOCK_RATE)
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*/
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W, 0);
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, RTCL1_L_REG_W,
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RTCL1_L_HZ/CLOCK_RATE);
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}
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void
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clock_get(struct device *dev, time_t base, struct clock_ymdhms *dt)
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{
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struct vrrtc_softc *sc = (struct vrrtc_softc *)dev;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int32_t timeh; /* elapse time (2*timeh sec) */
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u_int32_t timel; /* timel/32768 sec */
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timeh = bus_space_read_2(iot, ioh, ETIME_H_REG_W);
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timeh = (timeh << 16) | bus_space_read_2(iot, ioh, ETIME_M_REG_W);
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timel = bus_space_read_2(iot, ioh, ETIME_L_REG_W);
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DPRINTF(("clock_get: timeh %08x timel %08x\n", timeh, timel));
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cvt_timehl_ymdhms(timeh, timel, dt);
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DPRINTF(("clock_get: %d/%d/%d/%d/%d/%d\n", dt->dt_year, dt->dt_mon,
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dt->dt_day, dt->dt_hour, dt->dt_min, dt->dt_sec));
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}
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void
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clock_set(struct device *dev, struct clock_ymdhms *dt)
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{
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struct vrrtc_softc *sc = (struct vrrtc_softc *)dev;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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u_int32_t timeh; /* elapse time (2*timeh sec) */
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u_int32_t timel; /* timel/32768 sec */
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int year, month, sec2;
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timeh = 0;
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timel = 0;
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DPRINTF(("clock_set: %d/%d/%d/%d/%d/%d\n", dt->dt_year, dt->dt_mon,
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dt->dt_day, dt->dt_hour, dt->dt_min, dt->dt_sec));
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dt->dt_year += YBASE;
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DPRINTF(("clock_set: %d/%d/%d/%d/%d/%d\n", dt->dt_year, dt->dt_mon,
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dt->dt_day, dt->dt_hour, dt->dt_min, dt->dt_sec));
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year = EPOCHYEAR;
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sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
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while (year < dt->dt_year) {
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year++;
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timeh += sec2;
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sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
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}
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month = 1; /* now month is 1..12 */
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sec2 = SEC2DAY * m2d[month-1];
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while (month < dt->dt_mon) {
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month++;
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timeh += sec2;
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sec2 = SEC2DAY * m2d[month-1];
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if (month == 2 && LEAPYEAR4(year)) /* feb. and leapyear */
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sec2 += SEC2DAY;
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}
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timeh += (dt->dt_day - 1)*SEC2DAY;
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timeh += dt->dt_hour*SEC2HOUR;
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timeh += dt->dt_min*SEC2MIN;
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timeh += dt->dt_sec/2;
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timel += (dt->dt_sec%2)*ETIME_L_HZ;
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timeh += EPOCHOFF;
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timeh -= (rtc_offset*SEC2MIN);
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#ifdef VRRTCDEBUG
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cvt_timehl_ymdhms(timeh, timel, NULL);
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#endif /* RTCDEBUG */
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bus_space_write_2(iot, ioh, ETIME_H_REG_W, (timeh >> 16) & 0xffff);
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bus_space_write_2(iot, ioh, ETIME_M_REG_W, timeh & 0xffff);
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bus_space_write_2(iot, ioh, ETIME_L_REG_W, timel);
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}
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void
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cvt_timehl_ymdhms(
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u_int32_t timeh, /* 2 sec */
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u_int32_t timel, /* 1/32768 sec */
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struct clock_ymdhms *dt)
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{
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u_int32_t year, month, date, hour, min, sec, sec2;
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timeh -= EPOCHOFF;
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timeh += (rtc_offset*SEC2MIN);
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year = EPOCHYEAR;
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sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
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while (timeh > sec2) {
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year++;
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timeh -= sec2;
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sec2 = LEAPYEAR4(year)?SEC2YR+SEC2DAY:SEC2YR;
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}
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DPRINTF(("cvt_timehl_ymdhms: timeh %08x year %d yrref %d\n",
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timeh, year, sec2));
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month = 0; /* now month is 0..11 */
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sec2 = SEC2DAY * m2d[month];
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while (timeh > sec2) {
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timeh -= sec2;
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month++;
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sec2 = SEC2DAY * m2d[month];
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if (month == 1 && LEAPYEAR4(year)) /* feb. and leapyear */
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sec2 += SEC2DAY;
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}
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month +=1; /* now month is 1..12 */
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DPRINTF(("cvt_timehl_ymdhms: timeh %08x month %d mref %d\n",
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timeh, month, sec2));
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sec2 = SEC2DAY;
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date = timeh/sec2+1; /* date is 1..31 */
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timeh -= (date-1)*sec2;
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DPRINTF(("cvt_timehl_ymdhms: timeh %08x date %d dref %d\n",
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timeh, date, sec2));
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sec2 = SEC2HOUR;
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hour = timeh/sec2;
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timeh -= hour*sec2;
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sec2 = SEC2MIN;
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min = timeh/sec2;
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timeh -= min*sec2;
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sec = timeh*2 + timel/ETIME_L_HZ;
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DPRINTF(("cvt_timehl_ymdhms: hour %d min %d sec %d\n", hour, min, sec));
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if (dt) {
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dt->dt_year = year - YBASE; /* base 1900 */
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dt->dt_mon = month;
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dt->dt_day = date;
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dt->dt_hour = hour;
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dt->dt_min = min;
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dt->dt_sec = sec;
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}
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}
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void
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vrrtc_dump_regs(struct vrrtc_softc *sc)
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{
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int timeh;
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int timel;
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_M_REG_W);
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timel = (timel << 16)
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| bus_space_read_2(sc->sc_iot, sc->sc_ioh, ETIME_L_REG_W);
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printf("clock_init() Elapse Time %04x%04x\n", timeh, timel);
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_M_REG_W);
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timel = (timel << 16)
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| bus_space_read_2(sc->sc_iot, sc->sc_ioh, ECMP_L_REG_W);
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printf("clock_init() Elapse Compare %04x%04x\n", timeh, timel);
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_L_REG_W);
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printf("clock_init() LONG1 %04x%04x\n", timeh, timel);
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_CNT_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL1_CNT_L_REG_W);
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printf("clock_init() LONG1 CNTL %04x%04x\n", timeh, timel);
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_L_REG_W);
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printf("clock_init() LONG2 %04x%04x\n", timeh, timel);
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_CNT_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, RTCL2_CNT_L_REG_W);
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printf("clock_init() LONG2 CNTL %04x%04x\n", timeh, timel);
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if (TCLK_H_REG_W != RTC_NO_REG_W) {
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_L_REG_W);
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printf("clock_init() TCLK %04x%04x\n", timeh, timel);
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timeh = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_CNT_H_REG_W);
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timel = bus_space_read_2(sc->sc_iot, sc->sc_ioh, TCLK_CNT_L_REG_W);
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printf("clock_init() TCLK CNTL %04x%04x\n", timeh, timel);
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}
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}
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