729 lines
19 KiB
C
729 lines
19 KiB
C
/* $NetBSD: if_url.c,v 1.97 2022/08/20 14:08:59 riastradh Exp $ */
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/*
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* Copyright (c) 2001, 2002
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* Shingo WATANABE <nabe@nabechan.org>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/*
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* The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at
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* ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf
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* ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf
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*/
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/*
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* TODO:
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* Interrupt Endpoint support
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* External PHYs
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* powerhook() support?
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.97 2022/08/20 14:08:59 riastradh Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_inet.h"
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#include "opt_usb.h"
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#endif
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#include <sys/param.h>
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#include <net/if_ether.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#endif
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#include <dev/mii/urlphyreg.h>
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#include <dev/usb/usbnet.h>
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#include <dev/usb/if_urlreg.h>
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/* Function declarations */
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static int url_match(device_t, cfdata_t, void *);
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static void url_attach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(url, sizeof(struct usbnet), url_match, url_attach,
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usbnet_detach, usbnet_activate);
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static unsigned url_uno_tx_prepare(struct usbnet *, struct mbuf *,
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struct usbnet_chain *);
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static void url_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
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static int url_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
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static int url_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
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static void url_uno_stop(struct ifnet *, int);
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static void url_uno_mii_statchg(struct ifnet *);
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static int url_uno_init(struct ifnet *);
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static void url_uno_mcast(struct ifnet *);
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static void url_reset(struct usbnet *);
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static int url_csr_read_1(struct usbnet *, int);
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static int url_csr_read_2(struct usbnet *, int);
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static int url_csr_write_1(struct usbnet *, int, int);
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static int url_csr_write_2(struct usbnet *, int, int);
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static int url_csr_write_4(struct usbnet *, int, int);
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static int url_mem(struct usbnet *, int, int, void *, int);
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static const struct usbnet_ops url_ops = {
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.uno_stop = url_uno_stop,
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.uno_mcast = url_uno_mcast,
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.uno_read_reg = url_uno_mii_read_reg,
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.uno_write_reg = url_uno_mii_write_reg,
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.uno_statchg = url_uno_mii_statchg,
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.uno_tx_prepare = url_uno_tx_prepare,
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.uno_rx_loop = url_uno_rx_loop,
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.uno_init = url_uno_init,
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};
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/* Macros */
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#ifdef URL_DEBUG
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#define DPRINTF(x) if (urldebug) printf x
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#define DPRINTFN(n, x) if (urldebug >= (n)) printf x
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int urldebug = 0;
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#else
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#define DPRINTF(x)
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#define DPRINTFN(n, x)
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#endif
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#define URL_SETBIT(un, reg, x) \
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url_csr_write_1(un, reg, url_csr_read_1(un, reg) | (x))
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#define URL_SETBIT2(un, reg, x) \
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url_csr_write_2(un, reg, url_csr_read_2(un, reg) | (x))
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#define URL_CLRBIT(un, reg, x) \
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url_csr_write_1(un, reg, url_csr_read_1(un, reg) & ~(x))
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#define URL_CLRBIT2(un, reg, x) \
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url_csr_write_2(un, reg, url_csr_read_2(un, reg) & ~(x))
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static const struct url_type {
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struct usb_devno url_dev;
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uint16_t url_flags;
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#define URL_EXT_PHY 0x0001
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} url_devs [] = {
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/* MELCO LUA-KTX */
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{{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0},
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/* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */
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{{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0},
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/* Longshine LCS-8138TX */
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{{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0},
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/* Micronet SP128AR */
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{{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0},
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/* OQO model 01 */
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{{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0},
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};
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#define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p))
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/* Probe */
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static int
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url_match(device_t parent, cfdata_t match, void *aux)
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{
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struct usb_attach_arg *uaa = aux;
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return url_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
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UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
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}
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/* Attach */
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static void
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url_attach(device_t parent, device_t self, void *aux)
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{
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USBNET_MII_DECL_DEFAULT(unm);
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struct usbnet * const un = device_private(self);
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struct usb_attach_arg *uaa = aux;
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struct usbd_device *dev = uaa->uaa_device;
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struct usbd_interface *iface;
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usbd_status err;
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usb_interface_descriptor_t *id;
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usb_endpoint_descriptor_t *ed;
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char *devinfop;
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int i;
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aprint_naive("\n");
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aprint_normal("\n");
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devinfop = usbd_devinfo_alloc(dev, 0);
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aprint_normal_dev(self, "%s\n", devinfop);
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usbd_devinfo_free(devinfop);
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un->un_dev = self;
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un->un_udev = dev;
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un->un_sc = un;
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un->un_ops = &url_ops;
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un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
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un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
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un->un_rx_list_cnt = URL_RX_LIST_CNT;
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un->un_tx_list_cnt = URL_TX_LIST_CNT;
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un->un_rx_bufsz = URL_BUFSZ;
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un->un_tx_bufsz = URL_BUFSZ;
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/* Move the device into the configured state. */
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err = usbd_set_config_no(dev, URL_CONFIG_NO, 1);
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if (err) {
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aprint_error_dev(self, "failed to set configuration"
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", err=%s\n", usbd_errstr(err));
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return;
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}
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/* get control interface */
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err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface);
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if (err) {
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aprint_error_dev(self, "failed to get interface, err=%s\n",
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usbd_errstr(err));
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return;
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}
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un->un_iface = iface;
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un->un_flags = url_lookup(uaa->uaa_vendor, uaa->uaa_product)->url_flags;
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#if 0
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if (un->un_flags & URL_EXT_PHY) {
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un->un_read_reg_cb = url_ext_mii_read_reg;
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un->un_write_reg_cb = url_ext_mii_write_reg;
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}
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#endif
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/* get interface descriptor */
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id = usbd_get_interface_descriptor(un->un_iface);
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/* find endpoints */
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un->un_ed[USBNET_ENDPT_RX] = un->un_ed[USBNET_ENDPT_TX] =
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un->un_ed[USBNET_ENDPT_INTR] = 0;
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for (i = 0; i < id->bNumEndpoints; i++) {
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ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
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if (ed == NULL) {
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aprint_error_dev(self,
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"couldn't get endpoint %d\n", i);
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return;
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}
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if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
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UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
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un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
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else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
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UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT)
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un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
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else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT &&
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UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
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un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
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}
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if (un->un_ed[USBNET_ENDPT_RX] == 0 ||
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un->un_ed[USBNET_ENDPT_TX] == 0 ||
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un->un_ed[USBNET_ENDPT_INTR] == 0) {
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aprint_error_dev(self, "missing endpoint\n");
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return;
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}
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/* Set these up now for url_mem(). */
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usbnet_attach(un);
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/* reset the adapter */
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url_reset(un);
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/* Get Ethernet Address */
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err = url_mem(un, URL_CMD_READMEM, URL_IDR0, (void *)un->un_eaddr,
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ETHER_ADDR_LEN);
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if (err) {
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aprint_error_dev(self, "read MAC address failed\n");
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return;
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}
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/* initialize interface information */
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usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
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0, &unm);
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}
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/* read/write memory */
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static int
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url_mem(struct usbnet *un, int cmd, int offset, void *buf, int len)
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{
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usb_device_request_t req;
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usbd_status err;
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DPRINTFN(0x200,
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("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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if (usbnet_isdying(un)) {
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if (cmd == URL_CMD_READMEM)
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memset(buf, 0, len);
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return 0;
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}
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if (cmd == URL_CMD_READMEM)
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req.bmRequestType = UT_READ_VENDOR_DEVICE;
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else
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req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
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req.bRequest = URL_REQ_MEM;
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USETW(req.wValue, offset);
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USETW(req.wIndex, 0x0000);
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USETW(req.wLength, len);
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err = usbd_do_request(un->un_udev, &req, buf);
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if (err) {
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DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n",
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device_xname(un->un_dev),
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cmd == URL_CMD_READMEM ? "read" : "write",
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offset, err));
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if (cmd == URL_CMD_READMEM)
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memset(buf, 0, len);
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}
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return err;
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}
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/* read 1byte from register */
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static int
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url_csr_read_1(struct usbnet *un, int reg)
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{
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uint8_t val = 0;
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DPRINTFN(0x100,
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("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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return url_mem(un, URL_CMD_READMEM, reg, &val, 1) ? 0 : val;
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}
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/* read 2bytes from register */
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static int
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url_csr_read_2(struct usbnet *un, int reg)
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{
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uWord val;
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DPRINTFN(0x100,
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("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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USETW(val, 0);
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return url_mem(un, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val);
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}
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/* write 1byte to register */
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static int
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url_csr_write_1(struct usbnet *un, int reg, int aval)
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{
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uint8_t val = aval;
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DPRINTFN(0x100,
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("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0;
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}
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/* write 2bytes to register */
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static int
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url_csr_write_2(struct usbnet *un, int reg, int aval)
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{
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uWord val;
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DPRINTFN(0x100,
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("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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USETW(val, aval);
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return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0;
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}
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/* write 4bytes to register */
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static int
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url_csr_write_4(struct usbnet *un, int reg, int aval)
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{
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uDWord val;
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DPRINTFN(0x100,
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("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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USETDW(val, aval);
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return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0;
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}
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static int
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url_uno_init(struct ifnet *ifp)
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{
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struct usbnet * const un = ifp->if_softc;
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const u_char *eaddr;
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int i;
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DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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url_reset(un);
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eaddr = CLLADDR(ifp->if_sadl);
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for (i = 0; i < ETHER_ADDR_LEN; i++)
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url_csr_write_1(un, URL_IDR0 + i, eaddr[i]);
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/* Init transmission control register */
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URL_CLRBIT(un, URL_TCR,
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URL_TCR_TXRR1 | URL_TCR_TXRR0 |
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URL_TCR_IFG1 | URL_TCR_IFG0 |
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URL_TCR_NOCRC);
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/* Init receive control register */
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URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD | URL_RCR_AB);
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/* Enable RX and TX */
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URL_SETBIT(un, URL_CR, URL_CR_TE | URL_CR_RE);
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return 0;
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}
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static void
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url_reset(struct usbnet *un)
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{
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int i;
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DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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if (usbnet_isdying(un))
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return;
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URL_SETBIT(un, URL_CR, URL_CR_SOFT_RST);
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for (i = 0; i < URL_TX_TIMEOUT; i++) {
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if (usbnet_isdying(un))
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return;
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if (!(url_csr_read_1(un, URL_CR) & URL_CR_SOFT_RST))
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break;
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delay(10); /* XXX */
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}
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delay(10000); /* XXX */
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}
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static void
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url_uno_mcast(struct ifnet *ifp)
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{
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struct usbnet * const un = ifp->if_softc;
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struct ethercom *ec = usbnet_ec(un);
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struct ether_multi *enm;
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struct ether_multistep step;
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uint32_t mchash[2] = { 0, 0 };
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int h = 0, rcr;
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DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
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if (usbnet_isdying(un))
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return;
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rcr = url_csr_read_2(un, URL_RCR);
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rcr &= ~(URL_RCR_AAP | URL_RCR_AAM | URL_RCR_AM);
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ETHER_LOCK(ec);
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if (usbnet_ispromisc(un)) {
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ec->ec_flags |= ETHER_F_ALLMULTI;
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ETHER_UNLOCK(ec);
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/* run promisc. mode */
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rcr |= URL_RCR_AAM; /* ??? */
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rcr |= URL_RCR_AAP;
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goto update;
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}
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ec->ec_flags &= ~ETHER_F_ALLMULTI;
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ETHER_FIRST_MULTI(step, ec, enm);
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while (enm != NULL) {
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if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
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ec->ec_flags |= ETHER_F_ALLMULTI;
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ETHER_UNLOCK(ec);
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/* accept all multicast frames */
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rcr |= URL_RCR_AAM;
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goto update;
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}
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h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN);
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/* 1(31) and 5(30:26) bit sampling */
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mchash[h >> 31] |= 1 << ((h >> 26) & 0x1f);
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ETHER_NEXT_MULTI(step, enm);
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}
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ETHER_UNLOCK(ec);
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if (h != 0)
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rcr |= URL_RCR_AM; /* activate mcast hash filter */
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url_csr_write_4(un, URL_MAR0, mchash[0]);
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url_csr_write_4(un, URL_MAR4, mchash[1]);
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update:
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url_csr_write_2(un, URL_RCR, rcr);
|
|
}
|
|
|
|
static unsigned
|
|
url_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
|
|
{
|
|
int total_len;
|
|
|
|
DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__));
|
|
|
|
KASSERT(un->un_tx_bufsz >= URL_MIN_FRAME_LEN);
|
|
if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz)
|
|
return 0;
|
|
|
|
/* Copy the mbuf data into a contiguous buffer */
|
|
m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf);
|
|
total_len = m->m_pkthdr.len;
|
|
|
|
if (total_len < URL_MIN_FRAME_LEN) {
|
|
memset(c->unc_buf + total_len, 0,
|
|
URL_MIN_FRAME_LEN - total_len);
|
|
total_len = URL_MIN_FRAME_LEN;
|
|
}
|
|
|
|
DPRINTF(("%s: %s: send %d bytes\n", device_xname(un->un_dev),
|
|
__func__, total_len));
|
|
|
|
return total_len;
|
|
}
|
|
|
|
static void
|
|
url_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
|
|
{
|
|
struct ifnet *ifp = usbnet_ifp(un);
|
|
url_rxhdr_t rxhdr;
|
|
|
|
DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__));
|
|
|
|
if (total_len <= ETHER_CRC_LEN || total_len <= sizeof(rxhdr)) {
|
|
if_statinc(ifp, if_ierrors);
|
|
return;
|
|
}
|
|
|
|
memcpy(&rxhdr, c->unc_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr));
|
|
|
|
DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n",
|
|
device_xname(un->un_dev),
|
|
UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK,
|
|
UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "",
|
|
UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "",
|
|
UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "",
|
|
UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : ""));
|
|
|
|
if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) {
|
|
if_statinc(ifp, if_ierrors);
|
|
return;
|
|
}
|
|
|
|
total_len -= ETHER_CRC_LEN;
|
|
|
|
DPRINTF(("%s: %s: deliver %d\n", device_xname(un->un_dev),
|
|
__func__, total_len));
|
|
usbnet_enqueue(un, c->unc_buf, total_len, 0, 0, 0);
|
|
}
|
|
|
|
#if 0
|
|
static void url_intr(void)
|
|
{
|
|
}
|
|
#endif
|
|
|
|
/* Stop the adapter and free any mbufs allocated to the RX and TX lists. */
|
|
static void
|
|
url_uno_stop(struct ifnet *ifp, int disable)
|
|
{
|
|
struct usbnet * const un = ifp->if_softc;
|
|
|
|
DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__));
|
|
|
|
url_reset(un);
|
|
}
|
|
|
|
static int
|
|
url_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
|
|
{
|
|
uint16_t data;
|
|
usbd_status err = USBD_NORMAL_COMPLETION;
|
|
|
|
DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n",
|
|
device_xname(un->un_dev), __func__, phy, reg));
|
|
|
|
/* XXX: one PHY only for the RTL8150 internal PHY */
|
|
if (phy != 0) {
|
|
DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
|
|
device_xname(un->un_dev), __func__, phy));
|
|
*val = 0;
|
|
return EINVAL;
|
|
}
|
|
|
|
switch (reg) {
|
|
case MII_BMCR: /* Control Register */
|
|
reg = URL_BMCR;
|
|
break;
|
|
case MII_BMSR: /* Status Register */
|
|
reg = URL_BMSR;
|
|
break;
|
|
case MII_PHYIDR1:
|
|
case MII_PHYIDR2:
|
|
*val = 0;
|
|
goto R_DONE;
|
|
break;
|
|
case MII_ANAR: /* Autonegotiation advertisement */
|
|
reg = URL_ANAR;
|
|
break;
|
|
case MII_ANLPAR: /* Autonegotiation link partner abilities */
|
|
reg = URL_ANLP;
|
|
break;
|
|
case URLPHY_MSR: /* Media Status Register */
|
|
reg = URL_MSR;
|
|
break;
|
|
default:
|
|
printf("%s: %s: bad register %04x\n",
|
|
device_xname(un->un_dev), __func__, reg);
|
|
return EINVAL;
|
|
}
|
|
|
|
if (reg == URL_MSR)
|
|
data = url_csr_read_1(un, reg);
|
|
else
|
|
data = url_csr_read_2(un, reg);
|
|
*val = data;
|
|
|
|
R_DONE:
|
|
DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04hx\n",
|
|
device_xname(un->un_dev), __func__, phy, reg, *val));
|
|
|
|
return err;
|
|
}
|
|
|
|
static int
|
|
url_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
|
|
{
|
|
|
|
DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x val=0x%04hx\n",
|
|
device_xname(un->un_dev), __func__, phy, reg, val));
|
|
|
|
/* XXX: one PHY only for the RTL8150 internal PHY */
|
|
if (phy != 0) {
|
|
DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
|
|
device_xname(un->un_dev), __func__, phy));
|
|
return EINVAL;
|
|
}
|
|
|
|
switch (reg) {
|
|
case MII_BMCR: /* Control Register */
|
|
reg = URL_BMCR;
|
|
break;
|
|
case MII_BMSR: /* Status Register */
|
|
reg = URL_BMSR;
|
|
break;
|
|
case MII_PHYIDR1:
|
|
case MII_PHYIDR2:
|
|
return 0;
|
|
case MII_ANAR: /* Autonegotiation advertisement */
|
|
reg = URL_ANAR;
|
|
break;
|
|
case MII_ANLPAR: /* Autonegotiation link partner abilities */
|
|
reg = URL_ANLP;
|
|
break;
|
|
case URLPHY_MSR: /* Media Status Register */
|
|
reg = URL_MSR;
|
|
break;
|
|
default:
|
|
printf("%s: %s: bad register %04x\n",
|
|
device_xname(un->un_dev), __func__, reg);
|
|
return EINVAL;
|
|
}
|
|
|
|
if (reg == URL_MSR)
|
|
url_csr_write_1(un, reg, val);
|
|
else
|
|
url_csr_write_2(un, reg, val);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
url_uno_mii_statchg(struct ifnet *ifp)
|
|
{
|
|
struct usbnet * const un = ifp->if_softc;
|
|
|
|
DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__));
|
|
|
|
/* XXX */
|
|
usbnet_set_link(un, true);
|
|
}
|
|
|
|
#if 0
|
|
/*
|
|
* external PHYs support, but not test.
|
|
*/
|
|
static usbd_status
|
|
url_ext_mii_read_reg(struct usbnet *un, int phy, int reg)
|
|
{
|
|
uint16_t val;
|
|
|
|
DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n",
|
|
device_xname(un->un_dev), __func__, phy, reg));
|
|
|
|
url_csr_write_1(un, URL_PHYADD, phy & URL_PHYADD_MASK);
|
|
/*
|
|
* RTL8150L will initiate a MII management data transaction
|
|
* if PHYCNT_OWN bit is set 1 by software. After transaction,
|
|
* this bit is auto cleared by TRL8150L.
|
|
*/
|
|
url_csr_write_1(un, URL_PHYCNT,
|
|
(reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR);
|
|
for (i = 0; i < URL_TIMEOUT; i++) {
|
|
if ((url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0)
|
|
break;
|
|
}
|
|
if (i == URL_TIMEOUT) {
|
|
printf("%s: MII read timed out\n", device_xname(un->un_dev));
|
|
}
|
|
|
|
val = url_csr_read_2(un, URL_PHYDAT);
|
|
|
|
DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
|
|
device_xname(un->un_dev), __func__, phy, reg, val));
|
|
|
|
return USBD_NORMAL_COMPLETION;
|
|
}
|
|
|
|
static usbd_status
|
|
url_ext_mii_write_reg(struct usbnet *un, int phy, int reg, int data)
|
|
{
|
|
|
|
DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
|
|
device_xname(un->un_dev), __func__, phy, reg, data));
|
|
|
|
url_csr_write_2(un, URL_PHYDAT, data);
|
|
url_csr_write_1(un, URL_PHYADD, phy);
|
|
url_csr_write_1(un, URL_PHYCNT, reg | URL_PHYCNT_RWCR); /* Write */
|
|
|
|
for (i=0; i < URL_TIMEOUT; i++) {
|
|
if (url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN)
|
|
break;
|
|
}
|
|
|
|
if (i == URL_TIMEOUT) {
|
|
printf("%s: MII write timed out\n",
|
|
device_xname(un->un_dev));
|
|
return USBD_TIMEOUT;
|
|
}
|
|
|
|
return USBD_NORMAL_COMPLETION;
|
|
}
|
|
#endif
|
|
|
|
#ifdef _MODULE
|
|
#include "ioconf.c"
|
|
#endif
|
|
|
|
USBNET_MODULE(url)
|