673 lines
16 KiB
C
673 lines
16 KiB
C
/* $NetBSD: clock.c,v 1.32 1998/01/12 10:39:18 thorpej Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: Utah $Hdr: clock.c 1.18 91/01/21$
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*
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* @(#)clock.c 7.6 (Berkeley) 5/7/91
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <machine/psl.h>
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#include <machine/cpu.h>
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#include <amiga/amiga/device.h>
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#include <amiga/amiga/custom.h>
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#include <amiga/amiga/cia.h>
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#ifdef DRACO
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#include <amiga/amiga/drcustom.h>
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#endif
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#include <amiga/dev/rtc.h>
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#include <amiga/dev/zbusvar.h>
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#if defined(PROF) && defined(PROFTIMER)
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#include <sys/PROF.h>
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#endif
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/* the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz.
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We're using a 100 Hz clock. */
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#define CLK_INTERVAL amiga_clk_interval
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int amiga_clk_interval;
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int eclockfreq;
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struct CIA *clockcia;
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/*
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* Machine-dependent clock routines.
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*
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* Startrtclock restarts the real-time clock, which provides
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* hardclock interrupts to kern_clock.c.
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*
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* Inittodr initializes the time of day hardware which provides
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* date functions.
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*
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* Resettodr restores the time of day hardware after a time change.
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*
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* A note on the real-time clock:
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* We actually load the clock with CLK_INTERVAL-1 instead of CLK_INTERVAL.
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* This is because the counter decrements to zero after N+1 enabled clock
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* periods where N is the value loaded into the counter.
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*/
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int clockmatch __P((struct device *, struct cfdata *, void *));
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void clockattach __P((struct device *, struct device *, void *));
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void cpu_initclocks __P((void));
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void calibrate_delay __P((struct device *));
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struct cfattach clock_ca = {
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sizeof(struct device), clockmatch, clockattach
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};
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int
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clockmatch(pdp, cfp, auxp)
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struct device *pdp;
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struct cfdata *cfp;
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void *auxp;
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{
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if (matchname("clock", auxp))
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return(1);
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return(0);
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}
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/*
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* Start the real-time clock.
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*/
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void
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clockattach(pdp, dp, auxp)
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struct device *pdp, *dp;
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void *auxp;
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{
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char *clockchip;
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unsigned short interval;
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#ifdef DRACO
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u_char dracorev;
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#endif
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if (eclockfreq == 0)
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eclockfreq = 715909; /* guess NTSC */
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CLK_INTERVAL = (eclockfreq / 100);
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#ifdef DRACO
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dracorev = is_draco();
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if (dracorev >= 4) {
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CLK_INTERVAL = (eclockfreq / 700);
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clockchip = "QuickLogic";
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} else if (dracorev) {
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clockcia = (struct CIA *)CIAAbase;
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clockchip = "CIA A";
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} else
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#endif
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{
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clockcia = (struct CIA *)CIABbase;
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clockchip = "CIA B";
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}
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if (dp)
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printf(": %s system hz %d hardware hz %d\n", clockchip, hz,
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#ifdef DRACO
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dracorev >= 4 ? eclockfreq / 7 : eclockfreq);
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#else
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eclockfreq);
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#endif
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#ifdef DRACO
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if (dracorev >= 4) {
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/*
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* can't preload anything beforehand, timer is free_running;
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* but need this for delay calibration.
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*/
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draco_ioct->io_timerlo = CLK_INTERVAL & 0xff;
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draco_ioct->io_timerhi = CLK_INTERVAL >> 8;
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calibrate_delay(dp);
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return;
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}
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#endif
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/*
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* stop timer A
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*/
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clockcia->cra = clockcia->cra & 0xc0;
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clockcia->icr = 1 << 0; /* disable timer A interrupt */
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interval = clockcia->icr; /* and make sure it's clear */
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/*
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* load interval into registers.
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* the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz
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* supprort for PAL WHEN?!?! XXX
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*/
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interval = CLK_INTERVAL - 1;
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/*
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* order of setting is important !
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*/
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clockcia->talo = interval & 0xff;
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clockcia->tahi = interval >> 8;
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/*
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* start timer A in continuous mode
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*/
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clockcia->cra = (clockcia->cra & 0xc0) | 1;
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calibrate_delay(dp);
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}
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/*
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* Calibrate delay loop.
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* We use two iterations because we don't have enough bits to do a factor of
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* 8 with better than 1%.
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*
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* XXX Note that we MUST stay below 1 tick if using clkread(), even for
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* underestimated values of delaydivisor.
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*
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* XXX the "ns" below is only correct for a shift of 10 bits, and even then
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* off by 2.4%
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*/
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void calibrate_delay(dp)
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struct device *dp;
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{
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unsigned long t1, t2;
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extern u_int32_t delaydivisor;
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/* XXX this should be defined elsewhere */
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if (dp)
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printf("Calibrating delay loop... ");
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do {
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t1 = clkread();
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delay(1024);
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t2 = clkread();
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} while (t2 <= t1);
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t2 -= t1;
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delaydivisor = (delaydivisor * t2 + 1023) >> 10;
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#ifdef DEBUG
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if (dp)
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printf("\ndiff %ld us, new divisor %u/1024 us\n", t2,
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delaydivisor);
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do {
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t1 = clkread();
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delay(1024);
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t2 = clkread();
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} while (t2 <= t1);
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t2 -= t1;
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delaydivisor = (delaydivisor * t2 + 1023) >> 10;
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if (dp)
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printf("diff %ld us, new divisor %u/1024 us\n", t2,
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delaydivisor);
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#endif
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do {
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t1 = clkread();
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delay(1024);
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t2 = clkread();
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} while (t2 <= t1);
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t2 -= t1;
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delaydivisor = (delaydivisor * t2 + 1023) >> 10;
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#ifdef DEBUG
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if (dp)
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printf("diff %ld us, new divisor ", t2);
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#endif
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if (dp)
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printf("%u/1024 us\n", delaydivisor);
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}
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void
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cpu_initclocks()
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{
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#ifdef DRACO
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unsigned char dracorev;
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dracorev = is_draco();
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if (dracorev >= 4) {
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draco_ioct->io_timerlo = CLK_INTERVAL & 0xFF;
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draco_ioct->io_timerhi = CLK_INTERVAL >> 8;
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draco_ioct->io_timerrst = 0; /* any value resets */
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draco_ioct->io_status2 |= DRSTAT2_TMRINTENA;
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return;
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}
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#endif
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/*
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* enable interrupts for timer A
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*/
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clockcia->icr = (1<<7) | (1<<0);
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/*
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* start timer A in continuous shot mode
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*/
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clockcia->cra = (clockcia->cra & 0xc0) | 1;
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/*
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* and globally enable interrupts for ciab
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*/
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#ifdef DRACO
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if (dracorev) /* we use cia a on DraCo */
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*draco_intena |= DRIRQ_INT2;
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else
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#endif
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custom.intena = INTF_SETCLR | INTF_EXTER;
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}
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void
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setstatclockrate(hz)
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int hz;
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{
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}
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/*
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* Returns number of usec since last recorded clock "tick"
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* (i.e. clock interrupt).
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*/
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u_long
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clkread()
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{
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u_int interval;
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u_char hi, hi2, lo;
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#ifdef DRACO
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if (is_draco() >= 4) {
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hi2 = draco_ioct->io_chiprev; /* latch timer */
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hi = draco_ioct->io_timerhi;
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lo = draco_ioct->io_timerlo;
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interval = ((hi<<8) | lo);
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if (interval > CLK_INTERVAL) /* timer underflow */
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interval = 65536 + CLK_INTERVAL - interval;
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else
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interval = CLK_INTERVAL - interval;
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} else
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#endif
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{
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hi = clockcia->tahi;
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lo = clockcia->talo;
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hi2 = clockcia->tahi;
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if (hi != hi2) {
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lo = clockcia->talo;
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hi = hi2;
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}
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interval = (CLK_INTERVAL - 1) - ((hi<<8) | lo);
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/*
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* should read ICR and if there's an int pending, adjust
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* interval. However, since reading ICR clears the interrupt,
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* we'd lose a hardclock int, and this is not tolerable.
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*/
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}
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return((interval * tick) / CLK_INTERVAL);
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}
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#if notyet
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/* implement this later. I'd suggest using both timers in CIA-A, they're
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not yet used. */
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#include "clock.h"
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#if NCLOCK > 0
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/*
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* /dev/clock: mappable high resolution timer.
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*
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* This code implements a 32-bit recycling counter (with a 4 usec period)
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* using timers 2 & 3 on the 6840 clock chip. The counter can be mapped
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* RO into a user's address space to achieve low overhead (no system calls),
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* high-precision timing.
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*
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* Note that timer 3 is also used for the high precision profiling timer
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* (PROFTIMER code above). Care should be taken when both uses are
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* configured as only a token effort is made to avoid conflicting use.
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*/
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#include <sys/proc.h>
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#include <sys/resourcevar.h>
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#include <sys/ioctl.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <amiga/amiga/clockioctl.h>
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#include <sys/specdev.h>
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#include <sys/vnode.h>
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#include <sys/mman.h>
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int clockon = 0; /* non-zero if high-res timer enabled */
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#ifdef PROFTIMER
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int profprocs = 0; /* # of procs using profiling timer */
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#endif
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#ifdef DEBUG
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int clockdebug = 0;
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#endif
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/*ARGSUSED*/
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clockopen(dev, flags)
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dev_t dev;
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{
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#ifdef PROFTIMER
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#ifdef PROF
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/*
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* Kernel profiling enabled, give up.
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*/
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if (profiling)
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return(EBUSY);
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#endif
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/*
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* If any user processes are profiling, give up.
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*/
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if (profprocs)
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return(EBUSY);
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#endif
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if (!clockon) {
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startclock();
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clockon++;
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}
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return(0);
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}
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/*ARGSUSED*/
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clockclose(dev, flags)
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dev_t dev;
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{
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(void) clockunmmap(dev, (caddr_t)0, curproc); /* XXX */
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stopclock();
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clockon = 0;
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return(0);
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}
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/*ARGSUSED*/
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clockioctl(dev, cmd, data, flag, p)
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dev_t dev;
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u_long cmd;
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caddr_t data;
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struct proc *p;
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{
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int error = 0;
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switch (cmd) {
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case CLOCKMAP:
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error = clockmmap(dev, (caddr_t *)data, p);
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break;
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case CLOCKUNMAP:
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error = clockunmmap(dev, *(caddr_t *)data, p);
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break;
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case CLOCKGETRES:
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*(int *)data = CLK_RESOLUTION;
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break;
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default:
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error = EINVAL;
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break;
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}
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return(error);
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}
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/*ARGSUSED*/
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clockmap(dev, off, prot)
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dev_t dev;
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{
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return((off + (INTIOBASE+CLKBASE+CLKSR-1)) >> PGSHIFT);
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}
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clockmmap(dev, addrp, p)
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dev_t dev;
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caddr_t *addrp;
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struct proc *p;
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{
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int error;
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struct vnode vn;
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struct specinfo si;
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int flags;
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flags = MAP_FILE|MAP_SHARED;
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if (*addrp)
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flags |= MAP_FIXED;
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else
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*addrp = (caddr_t)0x1000000; /* XXX */
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vn.v_type = VCHR; /* XXX */
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vn.v_specinfo = &si; /* XXX */
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vn.v_rdev = dev; /* XXX */
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error = vm_mmap(&p->p_vmspace->vm_map, (vm_offset_t *)addrp,
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PAGE_SIZE, VM_PROT_ALL, flags, (caddr_t)&vn, 0);
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return(error);
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}
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clockunmmap(dev, addr, p)
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dev_t dev;
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caddr_t addr;
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struct proc *p;
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{
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int rv;
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if (addr == 0)
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return(EINVAL); /* XXX: how do we deal with this? */
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rv = vm_deallocate(p->p_vmspace->vm_map, (vm_offset_t)addr, PAGE_SIZE);
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return(rv == KERN_SUCCESS ? 0 : EINVAL);
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}
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startclock()
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{
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register struct clkreg *clk = (struct clkreg *)clkstd[0];
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clk->clk_msb2 = -1; clk->clk_lsb2 = -1;
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clk->clk_msb3 = -1; clk->clk_lsb3 = -1;
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clk->clk_cr2 = CLK_CR3;
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clk->clk_cr3 = CLK_OENAB|CLK_8BIT;
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clk->clk_cr2 = CLK_CR1;
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clk->clk_cr1 = CLK_IENAB;
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}
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stopclock()
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{
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register struct clkreg *clk = (struct clkreg *)clkstd[0];
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clk->clk_cr2 = CLK_CR3;
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clk->clk_cr3 = 0;
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clk->clk_cr2 = CLK_CR1;
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clk->clk_cr1 = CLK_IENAB;
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}
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#endif
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#endif
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#ifdef PROFTIMER
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/*
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* This code allows the amiga kernel to use one of the extra timers on
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* the clock chip for profiling, instead of the regular system timer.
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* The advantage of this is that the profiling timer can be turned up to
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* a higher interrupt rate, giving finer resolution timing. The profclock
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* routine is called from the lev6intr in locore, and is a specialized
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* routine that calls addupc. The overhead then is far less than if
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* hardclock/softclock was called. Further, the context switch code in
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* locore has been changed to turn the profile clock on/off when switching
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* into/out of a process that is profiling (startprofclock/stopprofclock).
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* This reduces the impact of the profiling clock on other users, and might
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* possibly increase the accuracy of the profiling.
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*/
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int profint = PRF_INTERVAL; /* Clock ticks between interrupts */
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int profscale = 0; /* Scale factor from sys clock to prof clock */
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char profon = 0; /* Is profiling clock on? */
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/* profon values - do not change, locore.s assumes these values */
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#define PRF_NONE 0x00
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#define PRF_USER 0x01
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#define PRF_KERNEL 0x80
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initprofclock()
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{
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#if NCLOCK > 0
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struct proc *p = curproc; /* XXX */
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/*
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* If the high-res timer is running, force profiling off.
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* Unfortunately, this gets reflected back to the user not as
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* an error but as a lack of results.
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*/
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if (clockon) {
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p->p_stats->p_prof.pr_scale = 0;
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return;
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}
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/*
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* Keep track of the number of user processes that are profiling
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* by checking the scale value.
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|
*
|
|
* XXX: this all assumes that the profiling code is well behaved;
|
|
* i.e. profil() is called once per process with pcscale non-zero
|
|
* to turn it on, and once with pcscale zero to turn it off.
|
|
* Also assumes you don't do any forks or execs. Oh well, there
|
|
* is always adb...
|
|
*/
|
|
if (p->p_stats->p_prof.pr_scale)
|
|
profprocs++;
|
|
else
|
|
profprocs--;
|
|
#endif
|
|
/*
|
|
* The profile interrupt interval must be an even divisor
|
|
* of the CLK_INTERVAL so that scaling from a system clock
|
|
* tick to a profile clock tick is possible using integer math.
|
|
*/
|
|
if (profint > CLK_INTERVAL || (CLK_INTERVAL % profint) != 0)
|
|
profint = CLK_INTERVAL;
|
|
profscale = CLK_INTERVAL / profint;
|
|
}
|
|
|
|
startprofclock()
|
|
{
|
|
unsigned short interval;
|
|
|
|
/* stop timer B */
|
|
clockcia->crb = clockcia->crb & 0xc0;
|
|
|
|
/* load interval into registers.
|
|
the clocks run at NTSC: 715.909kHz or PAL: 709.379kHz */
|
|
|
|
interval = profint - 1;
|
|
|
|
/* order of setting is important ! */
|
|
clockcia->tblo = interval & 0xff;
|
|
clockcia->tbhi = interval >> 8;
|
|
|
|
/* enable interrupts for timer B */
|
|
clockcia->icr = (1<<7) | (1<<1);
|
|
|
|
/* start timer B in continuous shot mode */
|
|
clockcia->crb = (clockcia->crb & 0xc0) | 1;
|
|
}
|
|
|
|
stopprofclock()
|
|
{
|
|
/* stop timer B */
|
|
clockcia->crb = clockcia->crb & 0xc0;
|
|
}
|
|
|
|
#ifdef PROF
|
|
/*
|
|
* profclock() is expanded in line in lev6intr() unless profiling kernel.
|
|
* Assumes it is called with clock interrupts blocked.
|
|
*/
|
|
profclock(pc, ps)
|
|
caddr_t pc;
|
|
int ps;
|
|
{
|
|
/*
|
|
* Came from user mode.
|
|
* If this process is being profiled record the tick.
|
|
*/
|
|
if (USERMODE(ps)) {
|
|
if (p->p_stats.p_prof.pr_scale)
|
|
addupc(pc, &curproc->p_stats.p_prof, 1);
|
|
}
|
|
/*
|
|
* Came from kernel (supervisor) mode.
|
|
* If we are profiling the kernel, record the tick.
|
|
*/
|
|
else if (profiling < 2) {
|
|
register int s = pc - s_lowpc;
|
|
|
|
if (s < s_textsize)
|
|
kcount[s / (HISTFRACTION * sizeof (*kcount))]++;
|
|
}
|
|
/*
|
|
* Kernel profiling was on but has been disabled.
|
|
* Mark as no longer profiling kernel and if all profiling done,
|
|
* disable the clock.
|
|
*/
|
|
if (profiling && (profon & PRF_KERNEL)) {
|
|
profon &= ~PRF_KERNEL;
|
|
if (profon == PRF_NONE)
|
|
stopprofclock();
|
|
}
|
|
}
|
|
#endif
|
|
#endif
|
|
|
|
/*
|
|
* Initialize the time of day register, based on the time base which is, e.g.
|
|
* from a filesystem.
|
|
*/
|
|
void
|
|
inittodr(base)
|
|
time_t base;
|
|
{
|
|
time_t timbuf = base; /* assume no battery clock exists */
|
|
|
|
if (gettod == NULL)
|
|
printf("WARNING: no battery clock\n");
|
|
else
|
|
timbuf = gettod() + rtc_offset * 60;
|
|
|
|
if (timbuf < base) {
|
|
printf("WARNING: bad date in battery clock\n");
|
|
timbuf = base;
|
|
}
|
|
|
|
/* Battery clock does not store usec's, so forget about it. */
|
|
time.tv_sec = timbuf;
|
|
}
|
|
|
|
void
|
|
resettodr()
|
|
{
|
|
if (settod && settod(time.tv_sec - rtc_offset * 60) == 0)
|
|
printf("Cannot set battery backed clock\n");
|
|
}
|