60530be43c
CFATTACH_DECL conversion. (Grumble.)
397 lines
11 KiB
C
397 lines
11 KiB
C
/* $NetBSD: tcic2_isa.c,v 1.9 2002/10/02 03:10:50 thorpej Exp $ */
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/*
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*
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* Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
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* Copyright (c) 1997 Marc Horowitz. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Marc Horowitz.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tcic2_isa.c,v 1.9 2002/10/02 03:10:50 thorpej Exp $");
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#undef TCICISADEBUG
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/extent.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/pcmcia/pcmciareg.h>
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#include <dev/pcmcia/pcmciavar.h>
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#include <dev/pcmcia/pcmciachip.h>
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#include <dev/ic/tcic2reg.h>
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#include <dev/ic/tcic2var.h>
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/*****************************************************************************
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* Configurable parameters.
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*****************************************************************************/
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#include "opt_tcic_isa_alloc_iobase.h"
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#include "opt_tcic_isa_alloc_iosize.h"
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#include "opt_tcic_isa_intr_alloc_mask.h"
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/*
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* Default I/O allocation range. If both are set to non-zero, these
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* values will be used instead. Otherwise, the code attempts to probe
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* the bus width. Systems with 10 address bits should use 0x300 and 0xff.
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* Systems with 12 address bits (most) should use 0x400 and 0xbff.
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*/
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#ifndef TCIC_ISA_ALLOC_IOBASE
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#define TCIC_ISA_ALLOC_IOBASE 0
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#endif
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#ifndef TCIC_ISA_ALLOC_IOSIZE
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#define TCIC_ISA_ALLOC_IOSIZE 0
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#endif
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int tcic_isa_alloc_iobase = TCIC_ISA_ALLOC_IOBASE;
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int tcic_isa_alloc_iosize = TCIC_ISA_ALLOC_IOSIZE;
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/*
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* Default IRQ allocation bitmask. This defines the range of allowable
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* IRQs for PCMCIA slots. Useful if order of probing would screw up other
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* devices, or if TCIC hardware/cards have trouble with certain interrupt
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* lines.
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*
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* We disable IRQ 10 by default, since some common laptops (namely, the
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* NEC Versa series) reserve IRQ 10 for the docking station SCSI interface.
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*
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* XXX Do we care about this? the Versa doesn't use a tcic. -chb
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*/
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#ifndef TCIC_ISA_INTR_ALLOC_MASK
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#define TCIC_ISA_INTR_ALLOC_MASK 0xffff
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#endif
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int tcic_isa_intr_alloc_mask = TCIC_ISA_INTR_ALLOC_MASK;
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/*****************************************************************************
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* End of configurable parameters.
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*****************************************************************************/
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#ifdef TCICISADEBUG
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int tcic_isa_debug = 1;
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#define DPRINTF(arg) if (tcic_isa_debug) printf arg;
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#else
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#define DPRINTF(arg)
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#endif
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int tcic_isa_probe __P((struct device *, struct cfdata *, void *));
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void tcic_isa_attach __P((struct device *, struct device *, void *));
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void *tcic_isa_chip_intr_establish __P((pcmcia_chipset_handle_t,
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struct pcmcia_function *, int, int (*) (void *), void *));
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void tcic_isa_chip_intr_disestablish __P((pcmcia_chipset_handle_t, void *));
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CFATTACH_DECL(tcic_isa, sizeof(struct tcic_softc),
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tcic_isa_probe, tcic_isa_attach, NULL, NULL);
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static struct pcmcia_chip_functions tcic_isa_functions = {
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tcic_chip_mem_alloc,
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tcic_chip_mem_free,
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tcic_chip_mem_map,
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tcic_chip_mem_unmap,
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tcic_chip_io_alloc,
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tcic_chip_io_free,
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tcic_chip_io_map,
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tcic_chip_io_unmap,
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tcic_isa_chip_intr_establish,
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tcic_isa_chip_intr_disestablish,
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tcic_chip_socket_enable,
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tcic_chip_socket_disable,
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};
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int
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tcic_isa_probe(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct isa_attach_args *ia = aux;
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bus_space_tag_t iot = ia->ia_iot;
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bus_space_handle_t ioh, memh;
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int val, found, msize;
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if (ia->ia_nio < 1)
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return (0);
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if (ia->ia_niomem < 1)
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return (0);
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if (ISA_DIRECT_CONFIG(ia))
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return (0);
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/* Disallow wildcarded i/o address. */
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if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT)
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return (0);
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if (ia->ia_iomem[0].ir_addr == ISACF_IOMEM_DEFAULT)
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return (0);
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if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh))
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return (0);
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if (ia->ia_iomem[0].ir_size == ISACF_IOSIZ_DEFAULT)
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msize = TCIC_MEMSIZE;
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else
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msize = ia->ia_iomem[0].ir_size;
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if (bus_space_map(ia->ia_memt, ia->ia_iomem[0].ir_addr,
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msize, 0, &memh)) {
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bus_space_unmap(iot, ioh, TCIC_IOSIZE);
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return (0);
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}
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DPRINTF(("tcic probing 0x%03x\n", ia->ia_iobase));
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found = 0;
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/*
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* First, check for the reserved bits to be zero.
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*/
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if (tcic_check_reserved_bits(iot, ioh)) {
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DPRINTF(("tcic: reserved bits checked OK\n"));
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/* Second, check whether the we know how to handle the chip. */
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if ((val = tcic_chipid(iot, ioh))) {
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DPRINTF(("tcic id: 0x%02x\n", val));
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if (tcic_chipid_known(val))
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found++;
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}
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}
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else
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DPRINTF(("tcic: reserved bits didn't check OK\n"));
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bus_space_unmap(iot, ioh, TCIC_IOSIZE);
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bus_space_unmap(ia->ia_memt, memh, msize);
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if (!found)
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return (0);
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ia->ia_nio = 1;
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ia->ia_io[0].ir_size = TCIC_IOSIZE;
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ia->ia_niomem = 1;
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ia->ia_iomem[0].ir_size = msize;
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/* IRQ is special. */
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ia->ia_ndrq = 0;
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return (1);
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}
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void
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tcic_isa_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct tcic_softc *sc = (void *) self;
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struct isa_attach_args *ia = aux;
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isa_chipset_tag_t ic = ia->ia_ic;
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bus_space_tag_t iot = ia->ia_iot;
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bus_space_tag_t memt = ia->ia_memt;
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bus_space_handle_t ioh;
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bus_space_handle_t memh;
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/* Map i/o space. */
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if (bus_space_map(iot, ia->ia_io[0].ir_addr, TCIC_IOSIZE, 0, &ioh)) {
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printf(": can't map i/o space\n");
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return;
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}
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/* Map mem space. */
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if (bus_space_map(memt, ia->ia_iomem[0].ir_addr,
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ia->ia_iomem[0].ir_size, 0, &memh)) {
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printf(": can't map mem space\n");
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return;
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}
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sc->membase = ia->ia_iomem[0].ir_addr;
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sc->subregionmask =
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(1 << (ia->ia_iomem[0].ir_size / TCIC_MEM_PAGESIZE)) - 1;
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sc->memsize2 = tcic_log2((u_int)ia->ia_iomem[0].ir_size);
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sc->intr_est = ic;
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sc->pct = (pcmcia_chipset_tag_t) & tcic_isa_functions;
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sc->iot = iot;
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sc->ioh = ioh;
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sc->memt = memt;
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sc->memh = memh;
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/*
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* determine chip type and initialise some chip type dependend
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* parameters in softc.
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*/
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sc->chipid = tcic_chipid(iot, ioh);
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sc->validirqs = tcic_validirqs(sc->chipid);
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/*
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* allocate an irq. interrupts are relatively
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* scarce but for TCIC controllers very infrequent.
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*/
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if (ia->ia_nirq < 1)
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sc->irq = ISACF_IRQ_DEFAULT;
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else
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sc->irq = ia->ia_irq[0].ir_irq;
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if (sc->irq == ISACF_IRQ_DEFAULT) {
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if (isa_intr_alloc(ic,
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sc->validirqs & (tcic_isa_intr_alloc_mask & 0xff00),
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IST_EDGE, &sc->irq)) {
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printf("\n%s: can't allocate interrupt\n",
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sc->dev.dv_xname);
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return;
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}
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printf(": using irq %d", sc->irq);
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}
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printf("\n");
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tcic_attach(sc);
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/*
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* XXX mycroft recommends I/O space range 0x400-0xfff.
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*/
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/*
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* XXX some hardware doesn't seem to grok addresses in 0x400 range--
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* apparently missing a bit or more of address lines. (e.g.
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* CIRRUS_PD672X with Linksys EthernetCard ne2000 clone in TI
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* TravelMate 5000--not clear which is at fault)
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*
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* Add a kludge to detect 10 bit wide buses and deal with them,
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* and also a config file option to override the probe.
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*/
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#if 0
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/*
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* This is what we'd like to use, but...
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*/
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sc->iobase = 0x400;
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sc->iosize = 0xbff;
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#else
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/*
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* ...the above bus width probe doesn't always work.
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* So, experimentation has shown the following range
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* to not lose on systems that 0x300-0x3ff loses on
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* (e.g. the NEC Versa 6030X).
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*/
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sc->iobase = 0x330;
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sc->iosize = 0x0cf;
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#endif
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DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx)\n",
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sc->dev.dv_xname, (long) sc->iobase,
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(long) sc->iobase + sc->iosize));
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if (tcic_isa_alloc_iobase && tcic_isa_alloc_iosize) {
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sc->iobase = tcic_isa_alloc_iobase;
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sc->iosize = tcic_isa_alloc_iosize;
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DPRINTF(("%s: bus_space_alloc range 0x%04lx-0x%04lx "
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"(config override)\n", sc->dev.dv_xname, (long) sc->iobase,
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(long) sc->iobase + sc->iosize));
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}
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sc->ih = isa_intr_establish(ic, sc->irq, IST_EDGE, IPL_TTY,
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tcic_intr, sc);
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if (sc->ih == NULL) {
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printf("%s: can't establish interrupt\n", sc->dev.dv_xname);
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return;
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}
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tcic_attach_sockets(sc);
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}
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void *
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tcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
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pcmcia_chipset_handle_t pch;
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struct pcmcia_function *pf;
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int ipl;
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int (*fct) __P((void *));
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void *arg;
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{
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struct tcic_handle *h = (struct tcic_handle *) pch;
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int irq, ist;
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void *ih;
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DPRINTF(("%s: tcic_isa_chip_intr_establish\n", h->sc->dev.dv_xname));
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/* XXX should we convert level to pulse? -chb */
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if (pf->cfe->flags & PCMCIA_CFE_IRQLEVEL)
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ist = IST_LEVEL;
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else if (pf->cfe->flags & PCMCIA_CFE_IRQPULSE)
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ist = IST_PULSE;
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else
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ist = IST_LEVEL;
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if (isa_intr_alloc(h->sc->intr_est,
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h->sc->validirqs & tcic_isa_intr_alloc_mask, ist, &irq))
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return (NULL);
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if ((ih = isa_intr_establish(h->sc->intr_est, irq, ist, ipl,
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fct, arg)) == NULL)
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return (NULL);
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DPRINTF(("%s: intr estrablished\n", h->sc->dev.dv_xname));
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h->ih_irq = irq;
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printf("%s: card irq %d\n", h->pcmcia->dv_xname, irq);
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return (ih);
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}
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void
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tcic_isa_chip_intr_disestablish(pch, ih)
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pcmcia_chipset_handle_t pch;
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void *ih;
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{
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struct tcic_handle *h = (struct tcic_handle *) pch;
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int val, reg;
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DPRINTF(("%s: tcic_isa_chip_intr_disestablish\n", h->sc->dev.dv_xname));
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h->ih_irq = 0;
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reg = TCIC_IR_SCF1_N(h->sock);
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val = tcic_read_ind_2(h, reg);
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val &= ~TCIC_SCF1_IRQ_MASK;
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tcic_write_ind_2(h, reg, val);
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isa_intr_disestablish(h->sc->intr_est, ih);
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}
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