238 lines
6.7 KiB
C
238 lines
6.7 KiB
C
/* $NetBSD: dwlpx.c,v 1.2 1997/03/12 21:09:52 cgd Exp $ */
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/*
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* Copyright (c) 1997 by Matthew Jacob
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* NASA AMES Research Center.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice immediately at the beginning of the file, without modification,
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* this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <machine/autoconf.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/tlsb/tlsbreg.h>
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#include <alpha/tlsb/kftxxvar.h>
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#include <alpha/tlsb/kftxxreg.h>
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#include <alpha/pci/dwlpxreg.h>
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#include <alpha/pci/dwlpxvar.h>
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#include <alpha/pci/pci_kn8ae.h>
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#include <alpha/include/pmap.old.h>
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#define KV(_addr) ((caddr_t)ALPHA_PHYS_TO_K0SEG((_addr)))
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static int dwlpxmatch __P((struct device *, struct cfdata *, void *));
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static void dwlpxattach __P((struct device *, struct device *, void *));
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struct cfattach dwlpx_ca = {
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sizeof(struct dwlpx_softc), dwlpxmatch, dwlpxattach
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};
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struct cfdriver dwlpx_cd = {
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NULL, "dwlpx", DV_DULL,
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};
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static int dwlpxprint __P((void *, const char *));
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static int
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dwlpxprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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register struct pcibus_attach_args *pba = aux;
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/* only PCIs can attach to DWLPX's; easy. */
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if (pnp)
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printf("%s at %s", pba->pba_busname, pnp);
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printf(" bus %d", pba->pba_bus);
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return (UNCONF);
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}
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static int
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dwlpxmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct kft_dev_attach_args *ka = aux;
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if (strcmp(ka->ka_name, dwlpx_cd.cd_name) != 0)
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return (0);
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return (1);
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}
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static void
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dwlpxattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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static int once = 0;
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struct dwlpx_softc *sc = (struct dwlpx_softc *)self;
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struct kft_dev_attach_args *ka = aux;
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struct pcibus_attach_args pba;
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sc->dwlpx_node = ka->ka_node;
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sc->dwlpx_dtype = ka->ka_dtype;
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sc->dwlpx_hosenum = ka->ka_hosenum;
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/*
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* On reads, you get a fault if you read a nonexisted HPC.
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* The internal KFTIA hose (hose 0) has only 2 HPCs.
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*/
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sc->dwlpx_nhpc = NHPC;
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if (sc->dwlpx_hosenum == 0) {
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if (TLDEV_DTYPE(sc->dwlpx_dtype) == TLDEV_DTYPE_KFTIA) {
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sc->dwlpx_nhpc = NHPC - 1;
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}
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}
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dwlpx_init(sc);
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printf(", hose %d\n", sc->dwlpx_hosenum);
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if (once == 0) {
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/*
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* Set up interrupts
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*/
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pci_kn8ae_pickintr(&sc->dwlpx_cc, 1);
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#ifdef EVCNT_COUNTERS
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evcnt_attach(self, "intr", kn8ae_intr_evcnt);
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#endif
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once++;
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} else {
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pci_kn8ae_pickintr(&sc->dwlpx_cc, 0);
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}
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/*
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* Attach PCI bus
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*/
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pba.pba_busname = "pci";
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pba.pba_iot = sc->dwlpx_cc.cc_iot;
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pba.pba_memt = sc->dwlpx_cc.cc_memt;
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pba.pba_pc = &sc->dwlpx_cc.cc_pc;
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pba.pba_bus = 0;
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config_found(self, &pba, dwlpxprint);
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}
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void
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dwlpx_init(sc)
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struct dwlpx_softc *sc;
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{
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int i;
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struct dwlpx_config *ccp = &sc->dwlpx_cc;
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if (ccp->cc_initted == 0) {
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ccp->cc_iot = dwlpx_bus_io_init(ccp);
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ccp->cc_memt = dwlpx_bus_mem_init(ccp);
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}
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dwlpx_pci_init(&ccp->cc_pc, ccp);
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ccp->cc_sc = sc;
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/*
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* Establish a precalculated base for convenience's sake.
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*/
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ccp->cc_sysbase =
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(((unsigned long)(sc->dwlpx_node - 4)) << 36) |
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(((unsigned long) sc->dwlpx_hosenum) << 34) |
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(1LL << 39);
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/*
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* Set up DMA windows for this DWLPX.
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*
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* Basically, we set up for a 1GB direct mapped window,
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* starting from PCI address 0x40000000. And that's it.
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*
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* Do this even for all HPCs- even for the nonexistent
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* one on hose zero of a KFTIA.
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*/
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for (i = 0; i < NHPC; i++) {
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REGVAL(PCIA_WMASK_A(i) + ccp->cc_sysbase) = 0;
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REGVAL(PCIA_TBASE_A(i) + ccp->cc_sysbase) = 0;
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REGVAL(PCIA_WBASE_A(i) + ccp->cc_sysbase) = 0;
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REGVAL(PCIA_WMASK_B(i) + ccp->cc_sysbase) = 0x3fff0000;
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REGVAL(PCIA_TBASE_B(i) + ccp->cc_sysbase) = 0;
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REGVAL(PCIA_WBASE_B(i) + ccp->cc_sysbase) = 0x40000002;
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REGVAL(PCIA_WMASK_C(i) + ccp->cc_sysbase) = 0;
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REGVAL(PCIA_TBASE_C(i) + ccp->cc_sysbase) = 0;
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REGVAL(PCIA_WBASE_C(i) + ccp->cc_sysbase) = 0;
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}
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/* XXX XXX BEGIN XXX XXX */
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{ /* XXX */
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extern vm_offset_t alpha_XXX_dmamap_or; /* XXX */
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alpha_XXX_dmamap_or = 0x40000000; /* XXX */
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} /* XXX */
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/* XXX XXX END XXX XXX */
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/*
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* Set up interrupt stuff for this DWLPX.
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*
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* Note that all PCI interrupt pins are disabled at this time.
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*
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* Do this even for all HPCs- even for the nonexistent
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* one on hose zero of a KFTIA.
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*/
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for (i = 0; i < NHPC; i++) {
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REGVAL(PCIA_IMASK(i) + ccp->cc_sysbase) = DWLPX_IMASK_DFLT;
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REGVAL(PCIA_ERRVEC(i) + ccp->cc_sysbase) =
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DWLPX_ERRVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum);
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}
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for (i = 0; i < DWLPX_MAXDEV; i++) {
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u_int16_t vec;
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int ss, hpc;
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vec = DWLPX_MVEC((sc->dwlpx_node - 4), sc->dwlpx_hosenum, i);
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ss = i;
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if (i < 4) {
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hpc = 0;
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} else if (i < 8) {
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ss -= 4;
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hpc = 1;
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} else {
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ss -= 8;
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hpc = 2;
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}
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REGVAL(PCIA_DEVVEC(hpc, ss, 1) + ccp->cc_sysbase) = vec;
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REGVAL(PCIA_DEVVEC(hpc, ss, 2) + ccp->cc_sysbase) = vec;
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REGVAL(PCIA_DEVVEC(hpc, ss, 3) + ccp->cc_sysbase) = vec;
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REGVAL(PCIA_DEVVEC(hpc, ss, 4) + ccp->cc_sysbase) = vec;
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}
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/*
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* Establish HAE values, as well as make sure of sanity elsewhere.
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*/
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for (i = 0; i < sc->dwlpx_nhpc; i++) {
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u_int32_t ctl = REGVAL(PCIA_CTL(i) + ccp->cc_sysbase);
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ctl &= 0x0fffffff;
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ctl &= ~((0x1f << 14) | (0x1f << 9) | 0x3);
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#if 0
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ctl |= ((1 << 14) | (1 << 9));
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#endif
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REGVAL(PCIA_CTL(i) + ccp->cc_sysbase) = ctl;
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}
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ccp->cc_initted = 1;
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}
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