164b045485
There are too many differences between the Hades and Milan in this area.
255 lines
6.1 KiB
C
255 lines
6.1 KiB
C
/* $NetBSD: isa_milan.c,v 1.1 2001/04/24 06:39:48 leo Exp $ */
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/*-
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* Copyright (c) 2001 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Leo Weppelman.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isareg.h>
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#include <machine/iomap.h>
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void isa_bus_init(void);
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#if 0
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static void init_icu(void);
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#endif
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static void set_icus(void);
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static void calc_imask(void);
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/*
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* Bitmask of currently enabled isa interrupts. Used by set_icus().
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*/
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static u_int16_t imask_enable = 0xffff;
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#define IRQ_SLAVE 2
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/*
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* Interrupt routing table
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*/
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#define MILAN_MAX_ISA_INTS 16
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static isa_intr_info_t milan_isa_iinfo[MILAN_MAX_ISA_INTS];
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void
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isa_bus_init()
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{
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#if 0
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init_icu();
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#endif
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set_icus();
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}
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#if 0
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static void
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init_icu()
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{
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#define ICU_OFFSET 0
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u_int8_t *icu;
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icu = (u_int8_t*)(AD_8259_MASTER);
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icu[0] = 0x11; /* reset; program device, four bytes */
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icu[1] = ICU_OFFSET; /* starting at this vector index */
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icu[1] = (1 << IRQ_SLAVE); /* slave on line 2 */
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icu[1] = 1; /* 8086 mode */
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icu[1] = 0xff; /* leave interrupts masked */
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icu = (u_int8_t*)(AD_8259_SLAVE);
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icu[0] = 0x11; /* reset; program device, four bytes */
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icu[1] = ICU_OFFSET + 8; /* starting at this vector index */
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icu[1] = IRQ_SLAVE; /* slave on line 2 */
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icu[1] = 1; /* 8086 mode */
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icu[1] = 0xff; /* leave interrupts masked */
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}
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#endif
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static void
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set_icus()
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{
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u_int8_t *icu;
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icu = (u_int8_t*)AD_8259_MASTER;
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icu[1] = imask_enable & 0xff;
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icu = (u_int8_t*)AD_8259_SLAVE;
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icu[1] = (imask_enable >> 8) & 0xff;
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}
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static void
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calc_imask()
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{
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int irq;
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u_int16_t nmask = 0;
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for (irq = 0; irq < MILAN_MAX_ISA_INTS; irq++) {
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if (milan_isa_iinfo[irq].ifunc != NULL)
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nmask |= 1 << irq;
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if (nmask >= 0x100)
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nmask |= 1 << IRQ_SLAVE;
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}
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imask_enable = ~nmask;
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set_icus();
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}
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void milan_isa_intr(int);
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void
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milan_isa_intr(vector)
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int vector;
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{
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isa_intr_info_t *iinfo_p;
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if(vector != 6)
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printf("milan_isa_intr: vector: %d\n", vector);
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if (vector >= MILAN_MAX_ISA_INTS) {
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printf("milan_isa_intr: Bogus vector %d\n", vector);
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return;
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}
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/* DEBUGGING LWP */
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if (vector == 1) { /* Keyboard */
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printf("kbd scancode: 0x%x, 0x%x, 0x%x, 0x%x\n",
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*((u_char *)(pci_io_addr + 0x60)),
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*((u_char *)(pci_io_addr + 0x61)),
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*((u_char *)(pci_io_addr + 0x62)),
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*((u_char *)(pci_io_addr + 0x63)));
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}
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/* Acknowledge interrupt XXX 0x20 == EOI */
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if (vector > 7)
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*((u_char *)AD_8259_SLAVE) = 0x20;
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*((u_char *)AD_8259_MASTER) = 0x20;
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iinfo_p = &milan_isa_iinfo[vector];
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if (iinfo_p->ifunc == NULL)
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printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n",
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vector, imask_enable);
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else (void) (iinfo_p->ifunc)(iinfo_p->iarg);
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}
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/*
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* Try to allocate a free interrupt... On the Milan, we have available:
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* 5, 9, 10, 11, 13. Or in a bitmask: 0x1720.
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*/
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#define MILAN_AVAIL_ISA_INTS 0x1720
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int
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isa_intr_alloc(ic, mask, type, irq)
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isa_chipset_tag_t ic;
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int mask;
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int type;
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int *irq;
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{
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int i;
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/*
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* The Hades only supports edge triggered interrupts!
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* XXX: Find out about the Milan....
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*/
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if (type != IST_EDGE)
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return 1;
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/*
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* Say no to impossible questions...
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*/
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if (!(mask &= MILAN_AVAIL_ISA_INTS))
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return 1;
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for (i = 0; i < MILAN_MAX_ISA_INTS; i++) {
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if (mask & (1<<i)) {
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if (milan_isa_iinfo[i].ifunc == NULL) {
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*irq = i;
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return 0;
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}
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}
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}
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return (1);
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}
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void *
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isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
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isa_chipset_tag_t ic;
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int irq, type, level;
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int (*ih_fun) __P((void *));
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void *ih_arg;
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{
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isa_intr_info_t *iinfo_p;
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/*
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* The Hades only supports edge triggered interrupts!
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* XXX: Find out oubout the Milan...
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*/
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if (type != IST_EDGE)
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return NULL;
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iinfo_p = &milan_isa_iinfo[irq];
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if (iinfo_p->ifunc != NULL) {
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printf("isa_intr_establish: interrupt %d was already "
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"established\n", irq);
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return NULL;
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}
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iinfo_p->slot = 0; /* Unused on Milan */
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iinfo_p->ihand = NULL; /* Unused on Milan */
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iinfo_p->ipl = level;
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iinfo_p->ifunc = ih_fun;
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iinfo_p->iarg = ih_arg;
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printf("Irq %d established\n", irq);
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calc_imask();
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return(iinfo_p);
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}
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void
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isa_intr_disestablish(ic, handler)
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isa_chipset_tag_t ic;
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void *handler;
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{
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isa_intr_info_t *iinfo_p = (isa_intr_info_t *)handler;
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if (iinfo_p->ifunc == NULL)
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panic("isa_intr_disestablish: interrupt was not established\n");
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iinfo_p->ifunc = NULL;
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calc_imask();
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}
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