100 lines
4.5 KiB
C
100 lines
4.5 KiB
C
/*
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* Copyright (c) 1994 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed at Ludd, University of Lule}.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: mtpr.h,v 1.1 1994/08/02 20:20:38 ragge Exp $
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*/
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/* All bugs are subject to removal without further notice */
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/******************************************************************************
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Processor register numbers in the VAX /IC
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******************************************************************************/
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#define PR_KSP 0 /* Kernel Stack Pointer */
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#define PR_ESP 1 /* Executive Stack Pointer */
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#define PR_SSP 2 /* Supervisor Stack Pointer */
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#define PR_USP 3 /* User Stack Pointer */
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#define PR_ISP 4 /* Interrupt Stack Pointer */
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#define PR_P0BR 8 /* P0 Base Register */
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#define PR_P0LR 9 /* P0 Length Register */
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#define PR_P1BR 10 /* P1 Base Register */
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#define PR_P1LR 11 /* P1 Length Register */
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#define PR_SBR 12 /* System Base Register */
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#define PR_SLR 13 /* System Limit Register */
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#define PR_PCBB 16 /* Process Control Block Base */
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#define PR_SCBB 17 /* System Control Block Base */
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#define PR_IPL 18 /* Interrupt Priority Level */
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#define PR_ASTLVL 19 /* AST Level */
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#define PR_SIRR 20 /* Software Interrupt Request */
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#define PR_SISR 21 /* Software Interrupt Summary */
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#define PR_MCSR 23 /* Machine Check Status Register 11/750 */
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#define PR_ICCS 24 /* Interval Clock Control */
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#define PR_NICR 25 /* Next Interval Count */
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#define PR_ICR 26 /* Interval Count */
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#define PR_TODR 27 /* Time Of Year (optional) */
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#define PR_RXCS 32 /* Console Receiver C/S */
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#define PR_RXDB 33 /* Console Receiver D/B */
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#define PR_TXCS 34 /* Console Transmit C/S */
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#define PR_TXDB 35 /* Console Transmit D/B */
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#define PR_TBDR 36 /* Translation Buffer Group Disable Register 11/750 */
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#define PR_IUR 37 /* Initialize Unibus Register 11/750 */
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#define PR_MCESR 38 /* Machiune Check Error Summary Register 11/750 */
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#define PR_MAPEN 56 /* Memory Management Enable */
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#define PR_TBIA 57 /* Trans. Buf. Invalidate All */
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#define PR_TBIS 58 /* Trans. Buf. Invalidate Single */
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#define PR_PMR 61 /* Performance Monnitor Enable */
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#define PR_SID 62 /* System ID Register */
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#define PR_TBCHK 63 /* Translation Buffer Check */
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/* Definitions for AST */
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#define AST_NO 4
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#define AST_OK 3
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#define mtpr(val,reg) \
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{ \
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asm __volatile ("mtpr %0,%1" \
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: /* No output */ \
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: "g" (val), "g" (reg)); \
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}
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#define mfpr(reg) \
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({ \
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register int val; \
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asm __volatile ("mfpr %1,%0" \
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: "=g" (val) \
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: "g" (reg)); \
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val; \
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})
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