409 lines
11 KiB
C
409 lines
11 KiB
C
/* $NetBSD: ncr.c,v 1.26 2000/03/25 15:27:57 tsutsui Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Adam Glass, David Jones, Gordon W. Ross, and Jens A. Nilsson.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* This file contains the machine-dependent parts of the NCR-5380
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* controller. The machine-independent parts are in ncr5380sbc.c.
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*
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* Note: Only PIO transfers for now which implicates very bad
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* performance. DMA support will come soon.
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*
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* Jens A. Nilsson.
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*
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* Credits:
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*
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* This code is based on arch/sun3/dev/si*
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* Written by David Jones, Gordon Ross, and Adam Glass.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsipi_debug.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/ic/ncr5380reg.h>
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#include <dev/ic/ncr5380var.h>
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#include <machine/cpu.h>
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#include <machine/vsbus.h>
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#include <machine/bus.h>
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#include <machine/sid.h>
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#include <machine/scb.h>
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#include "ioconf.h"
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#define MIN_DMA_LEN 128
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struct si_dma_handle {
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int dh_flags;
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#define SIDH_BUSY 1
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#define SIDH_OUT 2
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caddr_t dh_addr;
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int dh_len;
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struct proc *dh_proc;
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};
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struct si_softc {
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struct ncr5380_softc ncr_sc;
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caddr_t ncr_addr;
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int ncr_off;
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int ncr_dmaaddr;
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int ncr_dmacount;
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int ncr_dmadir;
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struct si_dma_handle ncr_dma[SCI_OPENINGS];
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};
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static int si_match(struct device *, struct cfdata *, void *);
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static void si_attach(struct device *, struct device *, void *);
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static void si_minphys(struct buf *);
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static void si_dma_alloc __P((struct ncr5380_softc *));
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static void si_dma_free __P((struct ncr5380_softc *));
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static void si_dma_setup __P((struct ncr5380_softc *));
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static void si_dma_start __P((struct ncr5380_softc *));
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static void si_dma_poll __P((struct ncr5380_softc *));
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static void si_dma_eop __P((struct ncr5380_softc *));
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static void si_dma_stop __P((struct ncr5380_softc *));
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struct cfattach ncr_ca = {
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sizeof(struct si_softc), si_match, si_attach
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};
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static int
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si_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct vsbus_attach_args *va = aux;
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volatile char *si_csr = (char *) va->va_addr;
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if (vax_boardtype == VAX_BTYP_49)
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return 0;
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/* This is the way Linux autoprobes the interrupt MK-990321 */
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si_csr[12] = 0;
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si_csr[16] = 0x80;
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si_csr[0] = 0x80;
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si_csr[4] = 5; /* 0xcf */
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DELAY(100000);
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return 1;
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}
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static void
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si_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct vsbus_attach_args *va = aux;
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struct si_softc *sc = (struct si_softc *) self;
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struct ncr5380_softc *ncr_sc = &sc->ncr_sc;
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printf("\n");
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scb_vecalloc(va->va_cvec, (void (*)(void *)) ncr5380_intr, sc, SCB_ISTACK);
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/*
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* DMA area mapin.
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* On VS3100, split the 128K block between the two devices.
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* On VS2000, don't care for now.
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*/
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#define DMASIZE (64*1024)
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if (vax_boardtype != VAX_BTYP_410) {
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if (va->va_paddr & 0x100) /* Magic */
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sc->ncr_off = DMASIZE;
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sc->ncr_addr = (caddr_t)uvm_km_valloc(kernel_map, DMASIZE);
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ioaccess((vaddr_t)sc->ncr_addr,
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0x202d0000 + sc->ncr_off, DMASIZE/VAX_NBPG);
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/*
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* MD function pointers used by the MI code.
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*/
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ncr_sc->sc_dma_alloc = si_dma_alloc;
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ncr_sc->sc_dma_free = si_dma_free;
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ncr_sc->sc_dma_setup = si_dma_setup;
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ncr_sc->sc_dma_start = si_dma_start;
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ncr_sc->sc_dma_poll = si_dma_poll;
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ncr_sc->sc_dma_eop = si_dma_eop;
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ncr_sc->sc_dma_stop = si_dma_stop;
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/* DMA control register offsets */
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sc->ncr_dmaaddr = 32; /* DMA address in buffer, longword */
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sc->ncr_dmacount = 64; /* DMA count register */
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sc->ncr_dmadir = 68; /* Direction of DMA transfer */
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}
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ncr_sc->sc_pio_out = ncr5380_pio_out;
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ncr_sc->sc_pio_in = ncr5380_pio_in;
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ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
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/*
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* Initialize fields used by the MI code.
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*/
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/* ncr_sc->sc_regt = Unused on VAX */
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ncr_sc->sc_regh = vax_map_physmem(va->va_paddr, 1);
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/* Register offsets */
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ncr_sc->sci_r0 = 0;
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ncr_sc->sci_r1 = 4;
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ncr_sc->sci_r2 = 8;
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ncr_sc->sci_r3 = 12;
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ncr_sc->sci_r4 = 16;
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ncr_sc->sci_r5 = 20;
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ncr_sc->sci_r6 = 24;
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ncr_sc->sci_r7 = 28;
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ncr_sc->sc_rev = NCR_VARIANT_NCR5380;
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ncr_sc->sc_no_disconnect = 0xff;
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ncr_sc->sc_link.scsipi_scsi.adapter_target = 7;
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ncr_sc->sc_adapter.scsipi_minphys = si_minphys;
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/*
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* Initialize si board itself.
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*/
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ncr5380_attach(ncr_sc);
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}
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/*
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* Adjust the max transfer size. The DMA buffer is only 16k on VS2000.
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*/
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static void
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si_minphys(struct buf *bp)
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{
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if ((vax_boardtype == VAX_BTYP_410) && (bp->b_bcount > (16*1024)))
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bp->b_bcount = (16*1024);
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else if (bp->b_bcount > MAXPHYS)
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bp->b_bcount = MAXPHYS;
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}
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void
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si_dma_alloc(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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struct sci_req *sr = ncr_sc->sc_current;
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struct scsipi_xfer *xs = sr->sr_xs;
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struct si_dma_handle *dh;
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int xlen, i;
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#ifdef DIAGNOSTIC
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if (sr->sr_dma_hand != NULL)
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panic("si_dma_alloc: already have DMA handle");
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#endif
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/* Polled transfers shouldn't allocate a DMA handle. */
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if (sr->sr_flags & SR_IMMED)
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return;
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xlen = ncr_sc->sc_datalen;
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/* Make sure our caller checked sc_min_dma_len. */
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if (xlen < MIN_DMA_LEN)
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panic("si_dma_alloc: len=0x%x\n", xlen);
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/*
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* Find free PDMA handle. Guaranteed to find one since we
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* have as many PDMA handles as the driver has processes.
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* (instances?)
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*/
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for (i = 0; i < SCI_OPENINGS; i++) {
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if ((sc->ncr_dma[i].dh_flags & SIDH_BUSY) == 0)
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goto found;
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}
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panic("sbc: no free PDMA handles");
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found:
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dh = &sc->ncr_dma[i];
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dh->dh_flags = SIDH_BUSY;
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dh->dh_addr = ncr_sc->sc_dataptr;
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dh->dh_len = xlen;
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dh->dh_proc = xs->bp->b_proc;
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/* Remember dest buffer parameters */
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if (xs->xs_control & XS_CTL_DATA_OUT)
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dh->dh_flags |= SIDH_OUT;
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sr->sr_dma_hand = dh;
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}
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void
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si_dma_free(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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if (dh->dh_flags & SIDH_BUSY)
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dh->dh_flags = 0;
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else
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printf("si_dma_free: free'ing unused buffer\n");
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sr->sr_dma_hand = NULL;
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}
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void
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si_dma_setup(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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/* Do nothing here */
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}
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void
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si_dma_start(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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/*
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* Set the VAX-DMA-specific registers, and copy the data if
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* it is directed "outbound".
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*/
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if (dh->dh_flags & SIDH_OUT) {
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if ((vaddr_t)dh->dh_addr & KERNBASE)
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bcopy(dh->dh_addr, sc->ncr_addr, dh->dh_len);
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else
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vsbus_copyfromproc(dh->dh_proc, dh->dh_addr,
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sc->ncr_addr, dh->dh_len);
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bus_space_write_1(ncr_sc->sc_regt, ncr_sc->sc_regh,
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sc->ncr_dmadir, 0);
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} else {
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bus_space_write_1(ncr_sc->sc_regt, ncr_sc->sc_regh,
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sc->ncr_dmadir, 1);
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}
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bus_space_write_4(ncr_sc->sc_regt, ncr_sc->sc_regh,
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sc->ncr_dmacount, -dh->dh_len);
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bus_space_write_4(ncr_sc->sc_regt, ncr_sc->sc_regh,
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sc->ncr_dmaaddr, sc->ncr_off);
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/*
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* Now from the 5380-internal DMA registers.
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*/
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if (dh->dh_flags & SIDH_OUT) {
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NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_OUT);
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NCR5380_WRITE(ncr_sc, sci_icmd, SCI_ICMD_DATA);
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NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
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| SCI_MODE_DMA | SCI_MODE_DMA_IE);
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NCR5380_WRITE(ncr_sc, sci_dma_send, 0);
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} else {
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NCR5380_WRITE(ncr_sc, sci_tcmd, PHASE_DATA_IN);
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NCR5380_WRITE(ncr_sc, sci_icmd, 0);
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NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode)
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| SCI_MODE_DMA | SCI_MODE_DMA_IE);
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NCR5380_WRITE(ncr_sc, sci_irecv, 0);
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}
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ncr_sc->sc_state |= NCR_DOINGDMA;
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}
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/*
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* When?
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*/
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void
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si_dma_poll(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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printf("si_dma_poll\n");
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}
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/*
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* When?
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*/
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void
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si_dma_eop(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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printf("si_dma_eop\n");
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}
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void
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si_dma_stop(ncr_sc)
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struct ncr5380_softc *ncr_sc;
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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struct sci_req *sr = ncr_sc->sc_current;
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struct si_dma_handle *dh = sr->sr_dma_hand;
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int count, i;
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if (ncr_sc->sc_state & NCR_DOINGDMA)
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ncr_sc->sc_state &= ~NCR_DOINGDMA;
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/*
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* Sometimes the FIFO buffer isn't drained when the
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* interrupt is posted. Just loop here and hope that
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* it will drain soon.
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*/
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for (i = 0; i < 20000; i++) {
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count = bus_space_read_4(ncr_sc->sc_regt,
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ncr_sc->sc_regh, sc->ncr_dmacount);
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if (count == 0)
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break;
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DELAY(100);
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}
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if (count == 0) {
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if (((dh->dh_flags & SIDH_OUT) == 0)) {
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if ((vaddr_t)dh->dh_addr & KERNBASE)
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bcopy(sc->ncr_addr, dh->dh_addr, dh->dh_len);
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else
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vsbus_copytoproc(dh->dh_proc, sc->ncr_addr,
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dh->dh_addr, dh->dh_len);
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}
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ncr_sc->sc_dataptr += dh->dh_len;
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ncr_sc->sc_datalen -= dh->dh_len;
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}
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NCR5380_WRITE(ncr_sc, sci_mode, NCR5380_READ(ncr_sc, sci_mode) &
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~(SCI_MODE_DMA | SCI_MODE_DMA_IE));
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NCR5380_WRITE(ncr_sc, sci_icmd, 0);
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}
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