805 lines
22 KiB
C
805 lines
22 KiB
C
/* $NetBSD: pci_bwx_bus_mem_chipdep.c,v 1.16 2001/09/04 16:14:49 thorpej Exp $ */
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/*-
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* Copyright (c) 1997, 1998, 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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/*
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* Common PCI Chipset "bus I/O" functions, for chipsets which have to
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* deal with only a single PCI interface chip in a machine.
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*
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* uses:
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* CHIP name of the 'chip' it's being compiled for.
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* CHIP_MEM_BASE Mem space base to use.
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* CHIP_MEM_EX_STORE
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* If defined, device-provided static storage area
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* for the memory space extent. If this is
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* defined, CHIP_MEM_EX_STORE_SIZE must also be
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* defined. If this is not defined, a static area
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* will be declared.
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* CHIP_MEM_EX_STORE_SIZE
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* Size of the device-provided static storage area
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* for the memory space extent.
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*/
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#include <sys/extent.h>
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#include <machine/bwx.h>
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#define __C(A,B) __CONCAT(A,B)
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#define __S(S) __STRING(S)
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/* mapping/unmapping */
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int __C(CHIP,_mem_map) __P((void *, bus_addr_t, bus_size_t, int,
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bus_space_handle_t *, int));
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void __C(CHIP,_mem_unmap) __P((void *, bus_space_handle_t,
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bus_size_t, int));
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int __C(CHIP,_mem_subregion) __P((void *, bus_space_handle_t,
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bus_size_t, bus_size_t, bus_space_handle_t *));
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int __C(CHIP,_mem_translate) __P((void *, bus_addr_t, bus_size_t,
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int, struct alpha_bus_space_translation *));
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int __C(CHIP,_mem_get_window) __P((void *, int,
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struct alpha_bus_space_translation *));
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/* allocation/deallocation */
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int __C(CHIP,_mem_alloc) __P((void *, bus_addr_t, bus_addr_t,
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bus_size_t, bus_size_t, bus_addr_t, int, bus_addr_t *,
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bus_space_handle_t *));
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void __C(CHIP,_mem_free) __P((void *, bus_space_handle_t,
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bus_size_t));
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/* get kernel virtual address */
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void * __C(CHIP,_mem_vaddr) __P((void *, bus_space_handle_t));
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/* mmap for user */
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paddr_t __C(CHIP,_mem_mmap) __P((void *, bus_addr_t, off_t, int, int));
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/* barrier */
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inline void __C(CHIP,_mem_barrier) __P((void *, bus_space_handle_t,
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bus_size_t, bus_size_t, int));
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/* read (single) */
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inline u_int8_t __C(CHIP,_mem_read_1) __P((void *, bus_space_handle_t,
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bus_size_t));
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inline u_int16_t __C(CHIP,_mem_read_2) __P((void *, bus_space_handle_t,
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bus_size_t));
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inline u_int32_t __C(CHIP,_mem_read_4) __P((void *, bus_space_handle_t,
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bus_size_t));
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inline u_int64_t __C(CHIP,_mem_read_8) __P((void *, bus_space_handle_t,
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bus_size_t));
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/* read multiple */
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void __C(CHIP,_mem_read_multi_1) __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t));
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void __C(CHIP,_mem_read_multi_2) __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t));
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void __C(CHIP,_mem_read_multi_4) __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t));
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void __C(CHIP,_mem_read_multi_8) __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t));
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/* read region */
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void __C(CHIP,_mem_read_region_1) __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t));
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void __C(CHIP,_mem_read_region_2) __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t));
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void __C(CHIP,_mem_read_region_4) __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t *, bus_size_t));
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void __C(CHIP,_mem_read_region_8) __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t *, bus_size_t));
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/* write (single) */
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inline void __C(CHIP,_mem_write_1) __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t));
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inline void __C(CHIP,_mem_write_2) __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t));
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inline void __C(CHIP,_mem_write_4) __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t));
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inline void __C(CHIP,_mem_write_8) __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t));
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/* write multiple */
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void __C(CHIP,_mem_write_multi_1) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t));
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void __C(CHIP,_mem_write_multi_2) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t));
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void __C(CHIP,_mem_write_multi_4) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t));
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void __C(CHIP,_mem_write_multi_8) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t));
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/* write region */
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void __C(CHIP,_mem_write_region_1) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int8_t *, bus_size_t));
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void __C(CHIP,_mem_write_region_2) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int16_t *, bus_size_t));
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void __C(CHIP,_mem_write_region_4) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int32_t *, bus_size_t));
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void __C(CHIP,_mem_write_region_8) __P((void *, bus_space_handle_t,
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bus_size_t, const u_int64_t *, bus_size_t));
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/* set multiple */
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void __C(CHIP,_mem_set_multi_1) __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t));
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void __C(CHIP,_mem_set_multi_2) __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t));
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void __C(CHIP,_mem_set_multi_4) __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t));
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void __C(CHIP,_mem_set_multi_8) __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t));
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/* set region */
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void __C(CHIP,_mem_set_region_1) __P((void *, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t));
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void __C(CHIP,_mem_set_region_2) __P((void *, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t));
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void __C(CHIP,_mem_set_region_4) __P((void *, bus_space_handle_t,
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bus_size_t, u_int32_t, bus_size_t));
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void __C(CHIP,_mem_set_region_8) __P((void *, bus_space_handle_t,
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bus_size_t, u_int64_t, bus_size_t));
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/* copy */
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void __C(CHIP,_mem_copy_region_1) __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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void __C(CHIP,_mem_copy_region_2) __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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void __C(CHIP,_mem_copy_region_4) __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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void __C(CHIP,_mem_copy_region_8) __P((void *, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t));
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#ifndef CHIP_MEM_EX_STORE
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static long
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__C(CHIP,_mem_ex_storage)[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
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#define CHIP_MEM_EX_STORE(v) (__C(CHIP,_mem_ex_storage))
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#define CHIP_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_mem_ex_storage))
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#endif
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void
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__C(CHIP,_bus_mem_init)(t, v)
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bus_space_tag_t t;
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void *v;
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{
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struct extent *ex;
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/*
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* Initialize the bus space tag.
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*/
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/* cookie */
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t->abs_cookie = v;
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/* mapping/unmapping */
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t->abs_map = __C(CHIP,_mem_map);
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t->abs_unmap = __C(CHIP,_mem_unmap);
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t->abs_subregion = __C(CHIP,_mem_subregion);
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t->abs_translate = __C(CHIP,_mem_translate);
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t->abs_get_window = __C(CHIP,_mem_get_window);
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/* allocation/deallocation */
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t->abs_alloc = __C(CHIP,_mem_alloc);
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t->abs_free = __C(CHIP,_mem_free);
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/* get kernel virtual address */
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t->abs_vaddr = __C(CHIP,_mem_vaddr);
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/* mmap for user */
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t->abs_mmap = __C(CHIP,_mem_mmap);
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/* barrier */
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t->abs_barrier = __C(CHIP,_mem_barrier);
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/* read (single) */
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t->abs_r_1 = __C(CHIP,_mem_read_1);
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t->abs_r_2 = __C(CHIP,_mem_read_2);
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t->abs_r_4 = __C(CHIP,_mem_read_4);
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t->abs_r_8 = __C(CHIP,_mem_read_8);
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/* read multiple */
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t->abs_rm_1 = __C(CHIP,_mem_read_multi_1);
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t->abs_rm_2 = __C(CHIP,_mem_read_multi_2);
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t->abs_rm_4 = __C(CHIP,_mem_read_multi_4);
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t->abs_rm_8 = __C(CHIP,_mem_read_multi_8);
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/* read region */
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t->abs_rr_1 = __C(CHIP,_mem_read_region_1);
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t->abs_rr_2 = __C(CHIP,_mem_read_region_2);
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t->abs_rr_4 = __C(CHIP,_mem_read_region_4);
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t->abs_rr_8 = __C(CHIP,_mem_read_region_8);
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/* write (single) */
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t->abs_w_1 = __C(CHIP,_mem_write_1);
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t->abs_w_2 = __C(CHIP,_mem_write_2);
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t->abs_w_4 = __C(CHIP,_mem_write_4);
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t->abs_w_8 = __C(CHIP,_mem_write_8);
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/* write multiple */
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t->abs_wm_1 = __C(CHIP,_mem_write_multi_1);
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t->abs_wm_2 = __C(CHIP,_mem_write_multi_2);
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t->abs_wm_4 = __C(CHIP,_mem_write_multi_4);
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t->abs_wm_8 = __C(CHIP,_mem_write_multi_8);
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/* write region */
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t->abs_wr_1 = __C(CHIP,_mem_write_region_1);
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t->abs_wr_2 = __C(CHIP,_mem_write_region_2);
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t->abs_wr_4 = __C(CHIP,_mem_write_region_4);
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t->abs_wr_8 = __C(CHIP,_mem_write_region_8);
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/* set multiple */
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t->abs_sm_1 = __C(CHIP,_mem_set_multi_1);
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t->abs_sm_2 = __C(CHIP,_mem_set_multi_2);
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t->abs_sm_4 = __C(CHIP,_mem_set_multi_4);
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t->abs_sm_8 = __C(CHIP,_mem_set_multi_8);
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/* set region */
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t->abs_sr_1 = __C(CHIP,_mem_set_region_1);
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t->abs_sr_2 = __C(CHIP,_mem_set_region_2);
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t->abs_sr_4 = __C(CHIP,_mem_set_region_4);
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t->abs_sr_8 = __C(CHIP,_mem_set_region_8);
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/* copy */
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t->abs_c_1 = __C(CHIP,_mem_copy_region_1);
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t->abs_c_2 = __C(CHIP,_mem_copy_region_2);
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t->abs_c_4 = __C(CHIP,_mem_copy_region_4);
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t->abs_c_8 = __C(CHIP,_mem_copy_region_8);
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ex = extent_create(__S(__C(CHIP,_bus_mem)), 0x0UL, 0xffffffffUL,
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M_DEVBUF, (caddr_t)CHIP_MEM_EX_STORE(v), CHIP_MEM_EX_STORE_SIZE(v),
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EX_NOWAIT|EX_NOCOALESCE);
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CHIP_MEM_EXTENT(v) = ex;
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}
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int
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__C(CHIP,_mem_translate)(v, memaddr, memlen, flags, abst)
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void *v;
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bus_addr_t memaddr;
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bus_size_t memlen;
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int flags;
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struct alpha_bus_space_translation *abst;
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{
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/* XXX */
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return (EOPNOTSUPP);
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}
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int
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__C(CHIP,_mem_get_window)(v, window, abst)
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void *v;
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int window;
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struct alpha_bus_space_translation *abst;
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{
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switch (window) {
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case 0:
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abst->abst_bus_start = 0;
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abst->abst_bus_end = 0xffffffffUL;
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abst->abst_sys_start = CHIP_MEM_SYS_START(v);
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abst->abst_sys_end = CHIP_MEM_SYS_START(v) + abst->abst_bus_end;
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abst->abst_addr_shift = 0;
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abst->abst_size_shift = 0;
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abst->abst_flags = ABST_DENSE|ABST_BWX;
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break;
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default:
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panic(__S(__C(CHIP,_mem_get_window)) ": invalid window %d",
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window);
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}
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return (0);
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}
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int
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__C(CHIP,_mem_map)(v, memaddr, memsize, flags, memhp, acct)
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void *v;
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bus_addr_t memaddr;
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bus_size_t memsize;
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int flags;
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bus_space_handle_t *memhp;
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int acct;
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{
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int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE;
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int linear = flags & BUS_SPACE_MAP_LINEAR;
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int error;
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/* Requests for linear unprefetchable space can't be satisfied. */
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if (linear && !prefetchable)
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return (EOPNOTSUPP);
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if (acct == 0)
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goto mapit;
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#ifdef EXTENT_DEBUG
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printf("mem: allocating 0x%lx to 0x%lx\n", memaddr,
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memaddr + memsize - 1);
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#endif
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error = extent_alloc_region(CHIP_MEM_EXTENT(v), memaddr, memsize,
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EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
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if (error) {
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#ifdef EXTENT_DEBUG
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printf("mem: allocation failed (%d)\n", error);
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extent_print(CHIP_MEM_EXTENT(v));
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#endif
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return (error);
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}
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mapit:
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*memhp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr;
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return (0);
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}
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void
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__C(CHIP,_mem_unmap)(v, memh, memsize, acct)
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void *v;
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bus_space_handle_t memh;
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bus_size_t memsize;
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int acct;
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{
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bus_addr_t memaddr;
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int error;
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if (acct == 0)
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return;
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#ifdef EXTENT_DEBUG
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printf("mem: freeing handle 0x%lx for 0x%lx\n", memh, memsize);
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#endif
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memaddr = memh - ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v));
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#ifdef EXTENT_DEBUG
|
|
printf("mem: freeing 0x%lx to 0x%lx\n", memaddr, memaddr + memsize - 1);
|
|
#endif
|
|
|
|
error = extent_free(CHIP_MEM_EXTENT(v), memaddr, memsize,
|
|
EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0));
|
|
if (error) {
|
|
printf("%s: WARNING: could not unmap 0x%lx-0x%lx (error %d)\n",
|
|
__S(__C(CHIP,_mem_unmap)), memaddr, memaddr + memsize - 1,
|
|
error);
|
|
#ifdef EXTENT_DEBUG
|
|
extent_print(CHIP_MEM_EXTENT(v));
|
|
#endif
|
|
}
|
|
}
|
|
|
|
int
|
|
__C(CHIP,_mem_subregion)(v, memh, offset, size, nmemh)
|
|
void *v;
|
|
bus_space_handle_t memh, *nmemh;
|
|
bus_size_t offset, size;
|
|
{
|
|
|
|
*nmemh = memh + offset;
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
__C(CHIP,_mem_alloc)(v, rstart, rend, size, align, boundary, flags,
|
|
addrp, bshp)
|
|
void *v;
|
|
bus_addr_t rstart, rend, *addrp;
|
|
bus_size_t size, align, boundary;
|
|
int flags;
|
|
bus_space_handle_t *bshp;
|
|
{
|
|
int prefetchable = flags & BUS_SPACE_MAP_PREFETCHABLE;
|
|
int linear = flags & BUS_SPACE_MAP_LINEAR;
|
|
bus_addr_t memaddr;
|
|
int error;
|
|
|
|
/* Requests for linear unprefetchable space can't be satisfied. */
|
|
if (linear && !prefetchable)
|
|
return (EOPNOTSUPP);
|
|
|
|
/*
|
|
* Do the requested allocation.
|
|
*/
|
|
#ifdef EXTENT_DEBUG
|
|
printf("mem: allocating from 0x%lx to 0x%lx\n", rstart, rend);
|
|
#endif
|
|
error = extent_alloc_subregion(CHIP_MEM_EXTENT(v), rstart, rend,
|
|
size, align, boundary,
|
|
EX_FAST | EX_NOWAIT | (CHIP_EX_MALLOC_SAFE(v) ? EX_MALLOCOK : 0),
|
|
&memaddr);
|
|
if (error) {
|
|
#ifdef EXTENT_DEBUG
|
|
printf("mem: allocation failed (%d)\n", error);
|
|
extent_print(CHIP_MEM_EXTENT(v));
|
|
#endif
|
|
}
|
|
|
|
#ifdef EXTENT_DEBUG
|
|
printf("mem: allocated 0x%lx to 0x%lx\n", memaddr, memaddr + size - 1);
|
|
#endif
|
|
|
|
*addrp = memaddr;
|
|
*bshp = ALPHA_PHYS_TO_K0SEG(CHIP_MEM_SYS_START(v)) + memaddr;
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
__C(CHIP,_mem_free)(v, bsh, size)
|
|
void *v;
|
|
bus_space_handle_t bsh;
|
|
bus_size_t size;
|
|
{
|
|
|
|
/* Unmap does all we need to do. */
|
|
__C(CHIP,_mem_unmap)(v, bsh, size, 1);
|
|
}
|
|
|
|
void *
|
|
__C(CHIP,_mem_vaddr)(v, bsh)
|
|
void *v;
|
|
bus_space_handle_t bsh;
|
|
{
|
|
/*
|
|
* We get linear access only with BUS_SPACE_MAP_PREFETCHABLE,
|
|
* so it should be OK if the caller doesn't use BWX instructions.
|
|
*/
|
|
return ((void *)bsh);
|
|
}
|
|
|
|
paddr_t
|
|
__C(CHIP,_mem_mmap)(v, addr, off, prot, flags)
|
|
void *v;
|
|
bus_addr_t addr;
|
|
off_t off;
|
|
int prot;
|
|
int flags;
|
|
{
|
|
|
|
return (alpha_btop(CHIP_MEM_SYS_START(v) + addr + off));
|
|
}
|
|
|
|
inline void
|
|
__C(CHIP,_mem_barrier)(v, h, o, l, f)
|
|
void *v;
|
|
bus_space_handle_t h;
|
|
bus_size_t o, l;
|
|
int f;
|
|
{
|
|
|
|
if ((f & BUS_SPACE_BARRIER_READ) != 0)
|
|
alpha_mb();
|
|
else if ((f & BUS_SPACE_BARRIER_WRITE) != 0)
|
|
alpha_wmb();
|
|
}
|
|
|
|
inline u_int8_t
|
|
__C(CHIP,_mem_read_1)(v, memh, off)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
{
|
|
bus_addr_t addr;
|
|
|
|
addr = memh + off;
|
|
alpha_mb();
|
|
return (alpha_ldbu((u_int8_t *)addr));
|
|
}
|
|
|
|
inline u_int16_t
|
|
__C(CHIP,_mem_read_2)(v, memh, off)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
{
|
|
bus_addr_t addr;
|
|
|
|
addr = memh + off;
|
|
#ifdef DIAGNOSTIC
|
|
if (addr & 1)
|
|
panic(__S(__C(CHIP,_mem_read_2)) ": addr 0x%lx not aligned",
|
|
addr);
|
|
#endif
|
|
alpha_mb();
|
|
return (alpha_ldwu((u_int16_t *)addr));
|
|
}
|
|
|
|
inline u_int32_t
|
|
__C(CHIP,_mem_read_4)(v, memh, off)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
{
|
|
bus_addr_t addr;
|
|
|
|
addr = memh + off;
|
|
#ifdef DIAGNOSTIC
|
|
if (addr & 3)
|
|
panic(__S(__C(CHIP,_mem_read_4)) ": addr 0x%lx not aligned",
|
|
addr);
|
|
#endif
|
|
alpha_mb();
|
|
return (*(u_int32_t *)addr);
|
|
}
|
|
|
|
inline u_int64_t
|
|
__C(CHIP,_mem_read_8)(v, memh, off)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
{
|
|
|
|
alpha_mb();
|
|
|
|
/* XXX XXX XXX */
|
|
panic("%s not implemented", __S(__C(CHIP,_mem_read_8)));
|
|
}
|
|
|
|
#define CHIP_mem_read_multi_N(BYTES,TYPE) \
|
|
void \
|
|
__C(__C(CHIP,_mem_read_multi_),BYTES)(v, h, o, a, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
TYPE *a; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
|
|
BUS_SPACE_BARRIER_READ); \
|
|
*a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
|
|
} \
|
|
}
|
|
CHIP_mem_read_multi_N(1,u_int8_t)
|
|
CHIP_mem_read_multi_N(2,u_int16_t)
|
|
CHIP_mem_read_multi_N(4,u_int32_t)
|
|
CHIP_mem_read_multi_N(8,u_int64_t)
|
|
|
|
#define CHIP_mem_read_region_N(BYTES,TYPE) \
|
|
void \
|
|
__C(__C(CHIP,_mem_read_region_),BYTES)(v, h, o, a, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
TYPE *a; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
*a++ = __C(__C(CHIP,_mem_read_),BYTES)(v, h, o); \
|
|
o += sizeof *a; \
|
|
} \
|
|
}
|
|
CHIP_mem_read_region_N(1,u_int8_t)
|
|
CHIP_mem_read_region_N(2,u_int16_t)
|
|
CHIP_mem_read_region_N(4,u_int32_t)
|
|
CHIP_mem_read_region_N(8,u_int64_t)
|
|
|
|
inline void
|
|
__C(CHIP,_mem_write_1)(v, memh, off, val)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
u_int8_t val;
|
|
{
|
|
bus_addr_t addr;
|
|
|
|
addr = memh + off;
|
|
alpha_stb((u_int8_t *)addr, val);
|
|
alpha_mb();
|
|
}
|
|
|
|
inline void
|
|
__C(CHIP,_mem_write_2)(v, memh, off, val)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
u_int16_t val;
|
|
{
|
|
bus_addr_t addr;
|
|
|
|
addr = memh + off;
|
|
#ifdef DIAGNOSTIC
|
|
if (addr & 1)
|
|
panic(__S(__C(CHIP,_mem_write_2)) ": addr 0x%lx not aligned",
|
|
addr);
|
|
#endif
|
|
alpha_stw((u_int16_t *)addr, val);
|
|
alpha_mb();
|
|
}
|
|
|
|
inline void
|
|
__C(CHIP,_mem_write_4)(v, memh, off, val)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
u_int32_t val;
|
|
{
|
|
bus_addr_t addr;
|
|
|
|
addr = memh + off;
|
|
#ifdef DIAGNOSTIC
|
|
if (addr & 3)
|
|
panic(__S(__C(CHIP,_mem_write_4)) ": addr 0x%lx not aligned",
|
|
addr);
|
|
#endif
|
|
*(u_int32_t *)addr = val;
|
|
alpha_mb();
|
|
}
|
|
|
|
inline void
|
|
__C(CHIP,_mem_write_8)(v, memh, off, val)
|
|
void *v;
|
|
bus_space_handle_t memh;
|
|
bus_size_t off;
|
|
u_int64_t val;
|
|
{
|
|
|
|
/* XXX XXX XXX */
|
|
panic("%s not implemented", __S(__C(CHIP,_mem_write_8)));
|
|
alpha_mb();
|
|
}
|
|
|
|
#define CHIP_mem_write_multi_N(BYTES,TYPE) \
|
|
void \
|
|
__C(__C(CHIP,_mem_write_multi_),BYTES)(v, h, o, a, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
const TYPE *a; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
|
|
__C(CHIP,_mem_barrier)(v, h, o, sizeof *a, \
|
|
BUS_SPACE_BARRIER_WRITE); \
|
|
} \
|
|
}
|
|
CHIP_mem_write_multi_N(1,u_int8_t)
|
|
CHIP_mem_write_multi_N(2,u_int16_t)
|
|
CHIP_mem_write_multi_N(4,u_int32_t)
|
|
CHIP_mem_write_multi_N(8,u_int64_t)
|
|
|
|
#define CHIP_mem_write_region_N(BYTES,TYPE) \
|
|
void \
|
|
__C(__C(CHIP,_mem_write_region_),BYTES)(v, h, o, a, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
const TYPE *a; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, *a++); \
|
|
o += sizeof *a; \
|
|
} \
|
|
}
|
|
CHIP_mem_write_region_N(1,u_int8_t)
|
|
CHIP_mem_write_region_N(2,u_int16_t)
|
|
CHIP_mem_write_region_N(4,u_int32_t)
|
|
CHIP_mem_write_region_N(8,u_int64_t)
|
|
|
|
#define CHIP_mem_set_multi_N(BYTES,TYPE) \
|
|
void \
|
|
__C(__C(CHIP,_mem_set_multi_),BYTES)(v, h, o, val, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
TYPE val; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
|
|
__C(CHIP,_mem_barrier)(v, h, o, sizeof val, \
|
|
BUS_SPACE_BARRIER_WRITE); \
|
|
} \
|
|
}
|
|
CHIP_mem_set_multi_N(1,u_int8_t)
|
|
CHIP_mem_set_multi_N(2,u_int16_t)
|
|
CHIP_mem_set_multi_N(4,u_int32_t)
|
|
CHIP_mem_set_multi_N(8,u_int64_t)
|
|
|
|
#define CHIP_mem_set_region_N(BYTES,TYPE) \
|
|
void \
|
|
__C(__C(CHIP,_mem_set_region_),BYTES)(v, h, o, val, c) \
|
|
void *v; \
|
|
bus_space_handle_t h; \
|
|
bus_size_t o, c; \
|
|
TYPE val; \
|
|
{ \
|
|
\
|
|
while (c-- > 0) { \
|
|
__C(__C(CHIP,_mem_write_),BYTES)(v, h, o, val); \
|
|
o += sizeof val; \
|
|
} \
|
|
}
|
|
CHIP_mem_set_region_N(1,u_int8_t)
|
|
CHIP_mem_set_region_N(2,u_int16_t)
|
|
CHIP_mem_set_region_N(4,u_int32_t)
|
|
CHIP_mem_set_region_N(8,u_int64_t)
|
|
|
|
#define CHIP_mem_copy_region_N(BYTES) \
|
|
void \
|
|
__C(__C(CHIP,_mem_copy_region_),BYTES)(v, h1, o1, h2, o2, c) \
|
|
void *v; \
|
|
bus_space_handle_t h1, h2; \
|
|
bus_size_t o1, o2, c; \
|
|
{ \
|
|
bus_size_t o; \
|
|
\
|
|
if ((h1 + o1) >= (h2 + o2)) { \
|
|
/* src after dest: copy forward */ \
|
|
for (o = 0; c != 0; c--, o += BYTES) { \
|
|
__C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
|
|
__C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \
|
|
} \
|
|
} else { \
|
|
/* dest after src: copy backwards */ \
|
|
for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) { \
|
|
__C(__C(CHIP,_mem_write_),BYTES)(v, h2, o2 + o, \
|
|
__C(__C(CHIP,_mem_read_),BYTES)(v, h1, o1 + o)); \
|
|
} \
|
|
} \
|
|
}
|
|
CHIP_mem_copy_region_N(1)
|
|
CHIP_mem_copy_region_N(2)
|
|
CHIP_mem_copy_region_N(4)
|
|
CHIP_mem_copy_region_N(8)
|