506 lines
16 KiB
C
506 lines
16 KiB
C
/* $NetBSD: pmap.h,v 1.25 1999/06/26 09:09:51 matthias Exp $ */
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/*
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*
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* Copyright (c) 1997 Charles D. Cranor and Washington University.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgment:
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* This product includes software developed by Charles D. Cranor and
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* Washington University.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* pmap.h: see pmap.c for the history of this pmap module.
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*/
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#ifndef _NS532_PMAP_H_
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#define _NS532_PMAP_H_
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#include <machine/cpufunc.h>
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#include <machine/pte.h>
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#include <uvm/uvm_object.h>
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/*
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* See pte.h for a description of ns32k MMU terminology and hardware
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* interface.
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*
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* A pmap describes a processes' 4GB virtual address space. This
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* virtual address space can be broken up into 1024 4MB regions which
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* are described by PDEs in the PDP. The PDEs are defined as follows:
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*
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* (ranges are inclusive -> exclusive, just like vm_map_entry start/end)
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* (the following assumes that KERNBASE is 0xf8000000)
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*
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* PDE#s VA range usage
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* 0->991 0x0 -> 0xf7c00000 user address space
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* 991 0xf7c00000-> recursive mapping of PDP (used for
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* 0xf8000000 linear mapping of PTPs)
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* 992->1022 0xf8000000-> kernel address space (constant
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* 0xff800000 across all pmap's/processes)
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* 1022 0xff800000-> "alternate" recursive PDP mapping
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* 0xffc00000 (for other pmaps)
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* 1023 0xffc00000-> memory mapped i/o
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* <end>
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*
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*
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* Note: A recursive PDP mapping provides a way to map all the PTEs for
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* a 4GB address space into a linear chunk of virtual memory. In other
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* words, the PTE for page 0 is the first int mapped into the 4MB recursive
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* area. The PTE for page 1 is the second int. The very last int in the
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* 4MB range is the PTE that maps VA 0xffffe000 (the last page in a 4GB
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* address).
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*
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* All pmap's PD's must have the same values in slots 991->1023 so that
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* the kernel and the i/o is always mapped in every process. These values
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* are loaded into the PD at pmap creation time.
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*
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* At any one time only one pmap can be active on a processor. This is
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* the pmap whose PDP is pointed to by processor register ptb0. This pmap
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* will have all its PTEs mapped into memory at the recursive mapping
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* point (slot #991 as show above). When the pmap code wants to find the
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* PTE for a virtual address, all it has to do is the following:
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*
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* address of PTE = (991 * 4MB) + (VA / NBPG) * sizeof(pt_entry_t)
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* = 0xf7c00000 + (VA / 4096) * 4
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*
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* What happens if the pmap layer is asked to perform an operation
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* on a pmap that is not the one which is currently active? In that
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* case we take the PA of the PDP of non-active pmap and put it in
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* slot 1022 of the active pmap. This causes the non-active pmap's
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* PTEs to get mapped in the 4MB just before the last 4MB of the
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* 4GB address space (e.g. starting at 0xff800000).
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*
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* The following figure shows the effects of the recursive PDP mapping:
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*
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* PDP (ptb0)
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* +----+
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* | 0| -> PTP#0 that maps VA 0x0 -> 0x400000
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* | |
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* | |
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* | 991| -> points back to PDP (ptb0) mapping VA 0xf7c00000 -> 0xf8000000
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* | 992| -> first kernel PTP (maps 0xf8000000 -> 0xf8400000)
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* | |
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* |1022| -> points to alternate pmap's PDP (maps 0xff800000 -> 0xffc00000)
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* +----+
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*
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* Note that the PDE#991 VA (0xf7c00000) is defined as "PTE_BASE"
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* Note that the PDE#1022 VA (0xff800000) is defined as "APTE_BASE"
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*
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* starting at VA 0xf7c00000 the current active PDP (ptb0) acts as a
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* PTP:
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*
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* PTP#991 == PDP(ptb0) => maps VA 0xf7c00000 -> 0xf8000000
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* +----+
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* | 0| -> maps the contents of PTP#0 at VA 0xf7c00000->0xf7c01000
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* | |
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* | |
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* | 991| -> maps contents of PTP#991 (the PDP) at VA 0xf7fdf000
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* | 992| -> maps contents of first kernel PTP
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* | |
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* |1023|
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* +----+
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*
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* Note that mapping of the PDP at PTP#991's VA (0xf7fdf000) is
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* defined as "PDP_BASE".... within that mapping there are two
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* defines:
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* "PDP_PDE" (0xf7fdff7c) is the VA of the PDE in the PDP
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* which points back to itself.
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* "APDP_PDE" (0xf7fdfff8) is the VA of the PDE in the PDP which
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* establishes the recursive mapping of the alternate pmap.
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* To set the alternate PDP, one just has to put the correct
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* PA info in *APDP_PDE.
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*
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* Note that in the APTE_BASE space, the APDP appears at VA
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* "APDP_BASE" (0xffbfe000).
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*/
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/*
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* the following defines identify the slots used as described above.
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*/
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#define PDSLOT_PTE ((KERNBASE/NBPD)-1) /* 991: for recursive PDP map */
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#define PDSLOT_KERN (KERNBASE/NBPD) /* 992: start of kernel space */
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#define PDSLOT_APTE ((unsigned)1022) /* 1022: alternative recursive slot */
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/*
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* the following defines give the virtual addresses of various MMU
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* data structures:
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* PTE_BASE and APTE_BASE: the base VA of the linear PTE mappings
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* PTD_BASE and APTD_BASE: the base VA of the recursive mapping of the PTD
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* PDP_PDE and APDP_PDE: the VA of the PDE that points back to the PDP/APDP
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*/
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#define PTE_BASE ((pt_entry_t *) (PDSLOT_PTE * NBPD) )
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#define APTE_BASE ((pt_entry_t *) (PDSLOT_APTE * NBPD) )
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#define PDP_BASE ((pd_entry_t *) (((char *)PTE_BASE) + (PDSLOT_PTE * NBPG)) )
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#define APDP_BASE ((pd_entry_t *) (((char *)APTE_BASE) + (PDSLOT_APTE * NBPG)) )
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#define PDP_PDE (PDP_BASE + PDSLOT_PTE)
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#define APDP_PDE (PDP_BASE + PDSLOT_APTE)
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/*
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* XXXCDC: tmp xlate from old names:
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* PTDPTDI -> PDSLOT_PTE
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* KPTDI -> PDSLOT_KERN
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* APTDPTDI -> PDSLOT_APTE
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*/
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/*
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* the follow define determines how many PTPs should be set up for the
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* kernel by locore.s at boot time. this should be large enough to
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* get the VM system running. once the VM system is running, the
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* pmap module can add more PTPs to the kernel area on demand.
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*/
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#ifndef NKPTP
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#define NKPTP 4 /* 16MB to start */
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#endif
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#define NKPTP_MIN 4 /* smallest value we allow */
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#define NKPTP_MAX (1024 - (KERNBASE/NBPD) - 2)
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/* largest value (-2 for APTP and i/o space) */
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/*
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* various address macros
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*
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* vtopte: return a pointer to the PTE mapping a VA
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* kvtopte: same as above (takes a KVA, but doesn't matter with this pmap)
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* ptetov: given a pointer to a PTE, return the VA that it maps
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* vtophys: translate a VA to the PA mapped to it
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*
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* plus alternative versions of the above
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*/
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#define vtopte(VA) (PTE_BASE + ns532_btop(VA))
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#define kvtopte(VA) vtopte(VA)
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#define ptetov(PT) (ns532_ptob(PT - PTE_BASE))
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#define vtophys(VA) ((*vtopte(VA) & PG_FRAME) | ((unsigned)(VA) & ~PG_FRAME))
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#define avtopte(VA) (APTE_BASE + ns532_btop(VA))
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#define ptetoav(PT) (ns532_ptob(PT - APTE_BASE))
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#define avtophys(VA) ((*avtopte(VA) & PG_FRAME) | ((unsigned)(VA) & ~PG_FRAME))
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/*
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* pdei/ptei: generate index into PDP/PTP from a VA
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*/
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#define pdei(VA) (((VA) & PD_MASK) >> PDSHIFT)
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#define ptei(VA) (((VA) & PT_MASK) >> PGSHIFT)
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/*
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* PTP macros:
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* a PTP's index is the PD index of the PDE that points to it
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* a PTP's offset is the byte-offset in the PTE space that this PTP is at
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* a PTP's VA is the first VA mapped by that PTP
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*
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* note that NBPG == number of bytes in a PTP (4096 bytes == 1024 entries)
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* NBPD == number of bytes a PTP can map (4MB)
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*/
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#define ptp_i2o(I) ((I) * NBPG) /* index => offset */
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#define ptp_o2i(O) ((O) / NBPG) /* offset => index */
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#define ptp_i2v(I) ((I) * NBPD) /* index => VA */
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#define ptp_v2i(V) ((V) / NBPD) /* VA => index (same as pdei) */
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/*
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* PG_AVAIL usage: we make use of the ignored bits of the PTE
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*/
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#define PG_W PG_AVAIL1 /* "wired" mapping */
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#define PG_PVLIST PG_AVAIL2 /* mapping has entry on pvlist */
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/* PG_AVAIL3 not used */
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#ifdef _KERNEL
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/*
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* pmap data structures: see pmap.c for details of locking.
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*/
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struct pmap;
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typedef struct pmap *pmap_t;
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/*
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* we maintain a list of all non-kernel pmaps
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*/
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LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
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/*
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* the pmap structure
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*
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* note that the pm_obj contains the simple_lock, the reference count,
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* page list, and number of PTPs within the pmap.
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*/
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struct pmap {
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struct uvm_object pm_obj; /* object (lck by object lock) */
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LIST_ENTRY(pmap) pm_list; /* list (lck by pm_list lock) */
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pd_entry_t *pm_pdir; /* VA of PD (lck by object lock) */
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u_int32_t pm_pdirpa; /* PA of PD (read-only after create) */
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struct vm_page *pm_ptphint; /* pointer to a random PTP in our pmap */
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struct pmap_statistics pm_stats; /* pmap stats (lck by object lock) */
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};
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/*
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* for each managed physical page we maintain a list of <PMAP,VA>'s
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* which it is mapped at. the list is headed by a pv_head structure.
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* there is one pv_head per managed phys page (allocated at boot time).
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* the pv_head structure points to a list of pv_entry structures (each
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* describes one mapping).
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*/
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struct pv_entry;
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struct pv_head {
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simple_lock_data_t pvh_lock; /* locks every pv on this list */
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struct pv_entry *pvh_list; /* head of list (locked by pvh_lock) */
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};
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struct pv_entry { /* all fields locked by their pvh_lock */
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struct pv_entry *pv_next; /* next entry */
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struct pmap *pv_pmap; /* the pmap */
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vaddr_t pv_va; /* the virtual address */
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struct vm_page *pv_ptp; /* the vm_page of the PTP */
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};
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/*
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* pv_entrys are dynamically allocated in chunks from a single page.
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* we keep track of how many pv_entrys are in use for each page and
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* we can free pv_entry pages if needed. there is one lock for the
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* entire allocation system.
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*/
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struct pv_page_info {
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TAILQ_ENTRY(pv_page) pvpi_list;
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struct pv_entry *pvpi_pvfree;
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int pvpi_nfree;
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};
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/*
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* number of pv_entry's in a pv_page
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* (note: won't work on systems where NPBG isn't a constant)
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*/
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#define PVE_PER_PVPAGE ( (NBPG - sizeof(struct pv_page_info)) / \
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sizeof(struct pv_entry) )
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/*
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* a pv_page: where pv_entrys are allocated from
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*/
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struct pv_page {
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struct pv_page_info pvinfo;
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struct pv_entry pvents[PVE_PER_PVPAGE];
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};
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/*
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* pmap_remove_record: a record of VAs that have been unmapped, used to
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* flush TLB. if we have more than PMAP_RR_MAX then we stop recording.
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*/
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#define PMAP_RR_MAX 16 /* max of 16 pages (64K) */
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struct pmap_remove_record {
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int prr_npages;
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vaddr_t prr_vas[PMAP_RR_MAX];
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};
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/*
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* pmap_transfer_location: used to pass the current location in the
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* pmap between pmap_transfer and pmap_transfer_ptes [e.g. during
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* a pmap_copy].
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*/
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struct pmap_transfer_location {
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vaddr_t addr; /* the address (page-aligned) */
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pt_entry_t *pte; /* the PTE that maps address */
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struct vm_page *ptp; /* the PTP that the PTE lives in */
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};
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/*
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* global kernel variables
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*/
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/* PTDpaddr: is the physical address of the kernel's PDP */
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extern u_long PTDpaddr;
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extern struct pmap kernel_pmap_store; /* kernel pmap */
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extern int nkpde; /* current # of PDEs for kernel */
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/*
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* macros
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*/
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#define pmap_kernel() (&kernel_pmap_store)
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#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
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#define pmap_update() tlbflush()
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#define pmap_clear_modify(pg) pmap_change_attrs(pg, 0, PG_M)
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#define pmap_clear_reference(pg) pmap_change_attrs(pg, 0, PG_U)
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#define pmap_copy(DP,SP,D,L,S) pmap_transfer(DP,SP,D,L,S, FALSE)
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#define pmap_is_modified(pg) pmap_test_attrs(pg, PG_M)
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#define pmap_is_referenced(pg) pmap_test_attrs(pg, PG_U)
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#define pmap_move(DP,SP,D,L,S) pmap_transfer(DP,SP,D,L,S, TRUE)
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#define pmap_phys_address(ppn) ns532_ptob(ppn)
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#define pmap_valid_entry(E) ((E) & PG_V) /* is PDE or PTE valid? */
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/*
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* prototypes
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*/
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void pmap_activate __P((struct proc *));
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void pmap_bootstrap __P((vaddr_t));
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boolean_t pmap_change_attrs __P((struct vm_page *, int, int));
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void pmap_deactivate __P((struct proc *));
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static void pmap_kenter_pa __P((vaddr_t, paddr_t, vm_prot_t));
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static void pmap_page_protect __P((struct vm_page *, vm_prot_t));
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void pmap_page_remove __P((struct vm_page *));
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static void pmap_protect __P((struct pmap *, vaddr_t,
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vaddr_t, vm_prot_t));
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void pmap_remove __P((struct pmap *, vaddr_t, vaddr_t));
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boolean_t pmap_test_attrs __P((struct vm_page *, int));
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void pmap_transfer __P((struct pmap *, struct pmap *, vaddr_t,
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vsize_t, vaddr_t, boolean_t));
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static void pmap_update_pg __P((vaddr_t));
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static void pmap_update_2pg __P((vaddr_t,vaddr_t));
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void pmap_write_protect __P((struct pmap *, vaddr_t,
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vaddr_t, vm_prot_t));
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vaddr_t reserve_dumppages __P((vaddr_t)); /* XXX: not a pmap fn */
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#define PMAP_GROWKERNEL /* turn on pmap_growkernel interface */
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/*
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* inline functions
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*/
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/*
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* pmap_update_pg: flush one page from the TLB (or flush the whole thing
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* if hardware doesn't support one-page flushing)
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*/
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__inline static void pmap_update_pg(va)
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vaddr_t va;
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{
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tlbflush_entry((u_int) va);
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}
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/*
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* pmap_update_2pg: flush two pages from the TLB
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*/
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__inline static void pmap_update_2pg(va, vb)
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vaddr_t va, vb;
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{
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tlbflush_entry((u_int) va);
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tlbflush_entry((u_int) vb);
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}
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/*
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* pmap_page_protect: change the protection of all recorded mappings
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* of a managed page
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*
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* => this function is a frontend for pmap_page_remove/pmap_change_attrs
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* => we only have to worry about making the page more protected.
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* unprotecting a page is done on-demand at fault time.
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*/
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__inline static void pmap_page_protect(pg, prot)
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struct vm_page *pg;
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vm_prot_t prot;
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{
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if ((prot & VM_PROT_WRITE) == 0) {
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if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
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(void) pmap_change_attrs(pg, PG_RO, PG_RW);
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} else {
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pmap_page_remove(pg);
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}
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}
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}
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/*
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* pmap_protect: change the protection of pages in a pmap
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*
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* => this function is a frontend for pmap_remove/pmap_write_protect
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* => we only have to worry about making the page more protected.
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* unprotecting a page is done on-demand at fault time.
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*/
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__inline static void pmap_protect(pmap, sva, eva, prot)
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struct pmap *pmap;
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vaddr_t sva, eva;
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vm_prot_t prot;
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{
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if ((prot & VM_PROT_WRITE) == 0) {
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if (prot & (VM_PROT_READ|VM_PROT_EXECUTE)) {
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pmap_write_protect(pmap, sva, eva, prot);
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} else {
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pmap_remove(pmap, sva, eva);
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}
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}
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}
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/*
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* pmap_kenter_pa: enter a kernel mapping without R/M (pv_entry) tracking
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*
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* => no need to lock anything, assume va is already allocated
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* => should be faster than normal pmap enter function
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*/
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__inline static void pmap_kenter_pa(va, pa, prot)
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vaddr_t va;
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paddr_t pa;
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vm_prot_t prot;
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{
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struct pmap *pm = pmap_kernel();
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pt_entry_t *pte, opte;
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int s;
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s = splimp();
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simple_lock(&pm->pm_obj.vmobjlock);
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pm->pm_stats.resident_count++;
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simple_unlock(&pm->pm_obj.vmobjlock);
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splx(s);
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pte = vtopte(va);
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opte = *pte;
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*pte = pa | ((prot & VM_PROT_WRITE)? PG_RW : PG_RO) |
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PG_V; /* zap! */
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if (pmap_valid_entry(opte))
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pmap_update_pg(va);
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}
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vaddr_t pmap_map __P((vaddr_t, paddr_t, paddr_t, int));
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#endif /* _KERNEL */
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#endif /* _NS532_PMAP_H_ */
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