480445c035
by the parent.
298 lines
8.2 KiB
C
298 lines
8.2 KiB
C
/* $NetBSD: pci.c,v 1.31 1998/01/31 00:37:39 thorpej Exp $ */
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/*
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* Copyright (c) 1995, 1996, 1997
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* Christopher G. Demetriou. All rights reserved.
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* Copyright (c) 1994 Charles Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI bus autoconfiguration.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#ifdef __BROKEN_INDIRECT_CONFIG
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int pcimatch __P((struct device *, void *, void *));
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#else
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int pcimatch __P((struct device *, struct cfdata *, void *));
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#endif
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void pciattach __P((struct device *, struct device *, void *));
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struct cfattach pci_ca = {
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sizeof(struct device), pcimatch, pciattach
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};
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int pciprint __P((void *, const char *));
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#ifdef __BROKEN_INDIRECT_CONFIG
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int pcisubmatch __P((struct device *, void *, void *));
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#else
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int pcisubmatch __P((struct device *, struct cfdata *, void *));
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#endif
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/*
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* Callback so that ISA/EISA bridges can attach their child busses
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* after PCI configuration is done.
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*
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* This works because:
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* (1) there can be at most one ISA/EISA bridge per PCI bus, and
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* (2) any ISA/EISA bridges must be attached to primary PCI
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* busses (i.e. bus zero).
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*
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* That boils down to: there can only be one of these outstanding
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* at a time, it is cleared when configuring PCI bus 0 before any
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* subdevices have been found, and it is run after all subdevices
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* of PCI bus 0 have been found.
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*
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* This is needed because there are some (legacy) PCI devices which
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* can show up as ISA/EISA devices as well (the prime example of which
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* are VGA controllers). If you attach ISA from a PCI-ISA/EISA bridge,
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* and the bridge is seen before the video board is, the board can show
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* up as an ISA device, and that can (bogusly) complicate the PCI device's
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* attach code, or make the PCI device not be properly attached at all.
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*/
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static void (*pci_isa_bridge_callback) __P((void *));
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static void *pci_isa_bridge_callback_arg;
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int
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#ifdef __BROKEN_INDIRECT_CONFIG
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pcimatch(parent, match, aux)
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#else
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pcimatch(parent, cf, aux)
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#endif
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struct device *parent;
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#ifdef __BROKEN_INDIRECT_CONFIG
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void *match;
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#else
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struct cfdata *cf;
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#endif
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void *aux;
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{
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#ifdef __BROKEN_INDIRECT_CONFIG
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struct cfdata *cf = match;
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#endif
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struct pcibus_attach_args *pba = aux;
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if (strcmp(pba->pba_busname, cf->cf_driver->cd_name))
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return (0);
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/* Check the locators */
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if (cf->pcibuscf_bus != PCIBUS_UNK_BUS &&
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cf->pcibuscf_bus != pba->pba_bus)
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return (0);
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/* sanity */
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if (pba->pba_bus < 0 || pba->pba_bus > 255)
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return (0);
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/*
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* XXX check other (hardware?) indicators
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*/
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return 1;
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}
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void
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pciattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct pcibus_attach_args *pba = aux;
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bus_space_tag_t iot, memt;
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pci_chipset_tag_t pc;
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int bus, device, maxndevs, function, nfunctions;
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int io_enabled, mem_enabled;
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pci_attach_hook(parent, self, pba);
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printf("\n");
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io_enabled = (pba->pba_flags & PCI_FLAGS_IO_ENABLED);
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mem_enabled = (pba->pba_flags & PCI_FLAGS_MEM_ENABLED);
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if (io_enabled == 0 && mem_enabled == 0) {
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printf("%s: no spaces enabled!\n", self->dv_xname);
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return;
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}
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printf("%s: ", self->dv_xname);
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if (io_enabled)
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printf("i/o enabled");
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if (mem_enabled) {
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if (io_enabled)
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printf(", ");
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printf("memory enabled");
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}
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printf("\n");
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iot = pba->pba_iot;
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memt = pba->pba_memt;
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pc = pba->pba_pc;
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bus = pba->pba_bus;
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maxndevs = pci_bus_maxdevs(pc, bus);
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if (bus == 0)
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pci_isa_bridge_callback = NULL;
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for (device = 0; device < maxndevs; device++) {
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pcitag_t tag;
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pcireg_t id, class, intr, bhlcr, csr;
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struct pci_attach_args pa;
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int pin;
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tag = pci_make_tag(pc, bus, device, 0);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG);
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nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1;
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for (function = 0; function < nfunctions; function++) {
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tag = pci_make_tag(pc, bus, device, function);
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id = pci_conf_read(pc, tag, PCI_ID_REG);
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if (id == 0 || id == 0xffffffff)
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continue;
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csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
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class = pci_conf_read(pc, tag, PCI_CLASS_REG);
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intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
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pa.pa_iot = iot;
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pa.pa_memt = memt;
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pa.pa_dmat = pba->pba_dmat;
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pa.pa_pc = pc;
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pa.pa_device = device;
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pa.pa_function = function;
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pa.pa_tag = tag;
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pa.pa_id = id;
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pa.pa_class = class;
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/* set up memory and I/O enable flags as appropriate */
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pa.pa_flags = 0;
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if ((pba->pba_flags & PCI_FLAGS_IO_ENABLED) &&
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(csr & PCI_COMMAND_IO_ENABLE))
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pa.pa_flags |= PCI_FLAGS_IO_ENABLED;
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if ((pba->pba_flags & PCI_FLAGS_MEM_ENABLED) &&
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(csr & PCI_COMMAND_MEM_ENABLE))
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pa.pa_flags |= PCI_FLAGS_MEM_ENABLED;
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if (bus == 0) {
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pa.pa_intrswiz = 0;
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pa.pa_intrtag = tag;
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} else {
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pa.pa_intrswiz = pba->pba_intrswiz + device;
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pa.pa_intrtag = pba->pba_intrtag;
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}
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pin = PCI_INTERRUPT_PIN(intr);
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if (pin == PCI_INTERRUPT_PIN_NONE) {
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/* no interrupt */
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pa.pa_intrpin = 0;
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} else {
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/*
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* swizzle it based on the number of
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* busses we're behind and our device
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* number.
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*/
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pa.pa_intrpin = /* XXX */
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((pin + pa.pa_intrswiz - 1) % 4) + 1;
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}
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pa.pa_intrline = PCI_INTERRUPT_LINE(intr);
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config_found_sm(self, &pa, pciprint, pcisubmatch);
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}
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}
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if (bus == 0 && pci_isa_bridge_callback != NULL)
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(*pci_isa_bridge_callback)(pci_isa_bridge_callback_arg);
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}
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int
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pciprint(aux, pnp)
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void *aux;
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const char *pnp;
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{
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register struct pci_attach_args *pa = aux;
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char devinfo[256];
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if (pnp) {
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pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo);
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printf("%s at %s", devinfo, pnp);
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}
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printf(" dev %d function %d", pa->pa_device, pa->pa_function);
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#if 0
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printf(" (%si/o, %smem)",
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pa->pa_flags & PCI_FLAGS_IO_ENABLED ? "" : "no ",
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pa->pa_flags & PCI_FLAGS_MEM_ENABLED ? "" : "no ");
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#endif
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return (UNCONF);
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}
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int
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#ifdef __BROKEN_INDIRECT_CONFIG
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pcisubmatch(parent, match, aux)
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#else
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pcisubmatch(parent, cf, aux)
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#endif
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struct device *parent;
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#ifdef __BROKEN_INDIRECT_CONFIG
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void *match;
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#else
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struct cfdata *cf;
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#endif
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void *aux;
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{
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#ifdef __BROKEN_INDIRECT_CONFIG
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struct cfdata *cf = match;
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#endif
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struct pci_attach_args *pa = aux;
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if (cf->pcicf_dev != PCI_UNK_DEV &&
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cf->pcicf_dev != pa->pa_device)
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return 0;
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if (cf->pcicf_function != PCI_UNK_FUNCTION &&
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cf->pcicf_function != pa->pa_function)
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return 0;
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return ((*cf->cf_attach->ca_match)(parent, cf, aux));
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}
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void
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set_pci_isa_bridge_callback(fn, arg)
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void (*fn) __P((void *));
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void *arg;
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{
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if (pci_isa_bridge_callback != NULL)
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panic("set_pci_isa_bridge_callback");
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pci_isa_bridge_callback = fn;
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pci_isa_bridge_callback_arg = arg;
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}
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