191 lines
5.2 KiB
C
191 lines
5.2 KiB
C
/* $NetBSD: cmpcivar.h,v 1.2 2001/02/12 18:47:12 tshiozak Exp $ */
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/*
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Takuya SHIOZAKI <tshiozak@netbsd.org> .
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/* C-Media CMI8x38 Audio Chip Support */
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#ifndef _DEV_PCI_CMPCIVAR_H_
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#define _DEV_PCI_CMPCIVAR_H_ (1)
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/*
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* DMA pool
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*/
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struct cmpci_dmanode {
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bus_dma_tag_t cd_tag;
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int cd_nsegs;
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bus_dma_segment_t cd_segs[1];
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bus_dmamap_t cd_map;
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caddr_t cd_addr;
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size_t cd_size;
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struct cmpci_dmanode *cd_next;
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};
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typedef struct cmpci_dmanode *cmpci_dmapool_t;
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#define KVADDR(dma) ((void *)(dma)->cd_addr)
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#define DMAADDR(dma) ((dma)->cd_map->dm_segs[0].ds_addr)
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/*
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* Mixer - SoundBraster16 Compatible
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*/
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#define CMPCI_MASTER_VOL 0
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#define CMPCI_FM_VOL 1
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#define CMPCI_CD_VOL 2
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#define CMPCI_VOICE_VOL 3
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#define CMPCI_OUTPUT_CLASS 4
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#define CMPCI_MIC_VOL 5
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#define CMPCI_LINE_IN_VOL 6
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#define CMPCI_RECORD_SOURCE 7
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#define CMPCI_TREBLE 8
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#define CMPCI_BASS 9
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#define CMPCI_RECORD_CLASS 10
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#define CMPCI_INPUT_CLASS 11
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#define CMPCI_PCSPEAKER 12
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#define CMPCI_INPUT_GAIN 13
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#define CMPCI_OUTPUT_GAIN 14
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#define CMPCI_AGC 15
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#define CMPCI_EQUALIZATION_CLASS 16
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#define CMPCI_CD_IN_MUTE 17
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#define CMPCI_MIC_IN_MUTE 18
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#define CMPCI_LINE_IN_MUTE 19
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#define CMPCI_FM_IN_MUTE 20
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#define CMPCI_CD_SWAP 21
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#define CMPCI_MIC_SWAP 22
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#define CMPCI_LINE_SWAP 23
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#define CMPCI_FM_SWAP 24
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#define CMPCI_CD_OUT_MUTE 25
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#define CMPCI_MIC_OUT_MUTE 26
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#define CMPCI_LINE_OUT_MUTE 27
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#define CMPCI_SPDIF_IN_MUTE 28
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#define CMPCI_SPDIF_CLASS 29
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#define CMPCI_SPDIF_LOOP 30
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#define CMPCI_SPDIF_LEGACY 31
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#define CMPCI_SPDIF_OUT_VOLTAGE 32
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#define CMPCI_SPDIF_IN_PHASE 33
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#define CMPCI_REAR 34
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#define CMPCI_INDIVIDUAL 35
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#define CMPCI_REVERSE 36
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#define CMPCI_SURROUND 37
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#define CmpciNspdif "spdif"
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#define CmpciCspdif "spdif"
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#define CmpciNloop "loop"
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#define CmpciNlegacy "legacy"
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#define CmpciNout_voltage "out_voltage"
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#define CmpciNin_phase "in_phase"
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#define CmpciNpositive "positive"
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#define CmpciNnegative "negative"
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#define CmpciNrear "rear"
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#define CmpciNindividual "individual"
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#define CmpciNreverse "reverse"
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#define CmpciNlow_v "0.5V"
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#define CmpciNhigh_v "5V"
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#define CmpciNsurround "surround"
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#define CMPCI_NDEVS 38
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#define CMPCI_IS_IN_MUTE(x) ((x) < CMPCI_CD_SWAP)
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/*
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* softc
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*/
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struct cmpci_softc {
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struct device sc_dev;
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/* model/rev */
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uint32_t sc_id;
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uint32_t sc_class;
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uint32_t sc_capable;
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#define CMPCI_CAP_SPDIN 0x00000001
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#define CMPCI_CAP_SPDOUT 0x00000002
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#define CMPCI_CAP_SPDLOOP 0x00000004
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#define CMPCI_CAP_SPDLEGACY 0x00000008
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#define CMPCI_CAP_SPDIN_MONITOR 0x00000010
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#define CMPCI_CAP_XSPDOUT 0x00000020
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#define CMPCI_CAP_SPDOUT_VOLTAGE 0x00000040
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#define CMPCI_CAP_SPDOUT_48K 0x00000080
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#define CMPCI_CAP_SURROUND 0x00000100
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#define CMPCI_CAP_REAR 0x00000200
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#define CMPCI_CAP_INDIVIDUAL_REAR 0x00000400
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#define CMPCI_CAP_REVERSE_FR 0x00000800
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#define CMPCI_CAP_SPDIN_PHASE 0x00001000
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#define CMPCI_CAP_CMI8338 (CMPCI_CAP_SPDIN | CMPCI_CAP_SPDOUT | \
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CMPCI_CAP_SPDLOOP | CMPCI_CAP_SPDLEGACY)
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#define CMPCI_CAP_CMI8738 (CMPCI_CAP_CMI8338 | \
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CMPCI_CAP_SPDIN_MONITOR | \
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CMPCI_CAP_XSPDOUT | \
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CMPCI_CAP_SPDOUT_VOLTAGE | \
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CMPCI_CAP_SPDOUT_48K | CMPCI_CAP_SURROUND |\
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CMPCI_CAP_REAR | \
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CMPCI_CAP_INDIVIDUAL_REAR | \
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CMPCI_CAP_REVERSE_FR | \
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CMPCI_CAP_SPDIN_PHASE)
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#define CMPCI_ISCAP(sc, name) (sc->sc_capable & CMPCI_CAP_ ## name)
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/* I/O Base device */
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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/* intr handle */
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pci_intr_handle_t *sc_ih;
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/* DMA */
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bus_dma_tag_t sc_dmat;
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cmpci_dmapool_t sc_dmap;
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/* each channel */
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struct {
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void (*intr) __P((void *));
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void *intr_arg;
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int md_divide;
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} sc_play, sc_rec;
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/* mixer */
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uint8_t sc_gain[CMPCI_NDEVS][2];
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#define CMPCI_LEFT 0
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#define CMPCI_RIGHT 1
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#define CMPCI_LR 0
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uint16_t sc_in_mask;
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};
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#endif /* _DEV_PCI_CMPCIVAR_H_ */
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/* end of file */
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