182 lines
5.6 KiB
C
182 lines
5.6 KiB
C
/* $NetBSD: cpu.c,v 1.9 2004/12/13 02:14:13 chs Exp $ */
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/* $OpenBSD: cpu.c,v 1.8 2000/08/15 20:38:24 mickey Exp $ */
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/*
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* Copyright (c) 1998,1999 Michael Shalayeff
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Michael Shalayeff.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF MIND,
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.9 2004/12/13 02:14:13 chs Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/reboot.h>
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#include <machine/cpufunc.h>
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#include <machine/pdc.h>
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#include <machine/iomod.h>
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#include <machine/autoconf.h>
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#include <hp700/hp700/intr.h>
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#include <hp700/hp700/machdep.h>
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#include <hp700/dev/cpudevs.h>
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struct cpu_softc {
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struct device sc_dev;
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hppa_hpa_t sc_hpa;
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void *sc_ih;
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};
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int cpumatch(struct device *, struct cfdata *, void *);
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void cpuattach(struct device *, struct device *, void *);
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CFATTACH_DECL(cpu, sizeof(struct cpu_softc),
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cpumatch, cpuattach, NULL, NULL);
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static int cpu_attached;
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int
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cpumatch(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct confargs *ca = aux;
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/* there will be only one for now XXX */
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/* probe any 1.0, 1.1 or 2.0 */
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if (cpu_attached ||
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ca->ca_type.iodc_type != HPPA_TYPE_NPROC ||
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ca->ca_type.iodc_sv_model != HPPA_NPROC_HPPA)
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return 0;
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return 1;
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}
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void
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cpuattach(struct device *parent, struct device *self, void *aux)
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{
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/* machdep.c */
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extern struct pdc_cache pdc_cache;
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extern struct pdc_btlb pdc_btlb;
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extern struct pdc_model pdc_model;
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extern u_int cpu_ticksnum, cpu_ticksdenom;
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struct cpu_softc *sc = (struct cpu_softc *)self;
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struct confargs *ca = aux;
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char c;
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const char lvls[4][4] = { "0", "1", "1.5", "2" };
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u_int mhz = 100 * cpu_ticksnum / cpu_ticksdenom;
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cpu_attached = 1;
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/* Print the CPU chip name, nickname, and rev. */
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printf(": %s", hppa_cpu_info->hppa_cpu_info_chip_name);
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if (hppa_cpu_info->hppa_cpu_info_chip_nickname != NULL)
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printf(" (%s)", hppa_cpu_info->hppa_cpu_info_chip_nickname);
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printf(" rev %d", (*hppa_cpu_info->desidhash)());
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/* Print the CPU type, spec, level, category, and speed. */
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printf("\n%s: %s, PA-RISC %d.%d",
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self->dv_xname,
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hppa_cpu_info->hppa_cpu_info_chip_type,
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HPPA_PA_SPEC_MAJOR(hppa_cpu_info->hppa_cpu_info_pa_spec),
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HPPA_PA_SPEC_MINOR(hppa_cpu_info->hppa_cpu_info_pa_spec));
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c = HPPA_PA_SPEC_LETTER(hppa_cpu_info->hppa_cpu_info_pa_spec);
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if (c != '\0') printf("%c", c);
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printf(", lev %s, cat %c, ",
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lvls[pdc_model.pa_lvl], "AB"[pdc_model.mc]);
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printf ("%d", mhz / 100);
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if (mhz % 100 > 9)
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printf(".%02d", mhz % 100);
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printf(" MHz clk\n%s: %s", self->dv_xname,
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pdc_model.sh? "shadows, ": "");
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if (pdc_cache.dc_conf.cc_sh)
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printf("%uK cache", pdc_cache.dc_size / 1024);
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else
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printf("%uK/%uK D/I caches",
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pdc_cache.dc_size / 1024,
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pdc_cache.ic_size / 1024);
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if (pdc_cache.dt_conf.tc_sh)
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printf(", %u shared TLB", pdc_cache.dt_size);
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else
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printf(", %u/%u D/I TLBs",
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pdc_cache.dt_size, pdc_cache.it_size);
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if (pdc_btlb.finfo.num_c)
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printf(", %u shared BTLB", pdc_btlb.finfo.num_c);
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else {
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printf(", %u/%u D/I BTLBs",
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pdc_btlb.finfo.num_i,
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pdc_btlb.finfo.num_d);
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}
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/*
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* Describe the floating-point support.
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*/
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#ifndef FPEMUL
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if (!fpu_present)
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printf("\n%s: no floating point support",
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self->dv_xname);
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else
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#endif /* !FPEMUL */
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{
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printf("\n%s: %s floating point, rev %d",
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self->dv_xname,
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hppa_mod_info(HPPA_TYPE_FPU,
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(fpu_version >> 16) & 0x1f),
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(fpu_version >> 11) & 0x1f);
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}
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printf("\n");
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/* sanity against luser amongst config editors */
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if (ca->ca_irq == 31) {
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sc->sc_ih = hp700_intr_establish(&sc->sc_dev, IPL_CLOCK,
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clock_intr, NULL /*trapframe*/,
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&int_reg_cpu, ca->ca_irq);
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} else {
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printf ("%s: bad irq number %d\n", sc->sc_dev.dv_xname,
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ca->ca_irq);
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}
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/*
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* Set the allocatable bits in the CPU interrupt registers.
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* These should only be used by major chipsets, like ASP and
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* LASI, and the bits used appear to be important - the
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* ASP doesn't seem to like to use interrupt bits above 28
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* or below 27.
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*/
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int_reg_cpu.int_reg_allocatable_bits =
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(1 << 28) | (1 << 27) | (1 << 26);
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}
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