409 lines
11 KiB
C
409 lines
11 KiB
C
/* $NetBSD: macros.h,v 1.26 2002/06/09 19:21:08 matt Exp $ */
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/*
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* Copyright (c) 1994, 1998, 2000 Ludd, University of Lule}, Sweden.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed at Ludd, University of Lule}.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* All bugs are subject to removal without further notice */
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#if !defined(_VAX_MACROS_H_) && !defined(lint)
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#define _VAX_MACROS_H_
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/* Here general macros are supposed to be stored */
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static __inline__ int __attribute__((__unused__))
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ffs(int reg)
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{
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register int val;
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__asm__ __volatile ("ffs $0,$32,%1,%0;"
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"bneq 1f;"
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"mnegl $1,%0;"
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"1:;"
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"incl %0"
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: "=&r" (val)
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: "r" (reg) );
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return val;
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}
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static __inline__ void __attribute__((__unused__))
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_remque(void *p)
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{
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__asm__ __volatile ("remque (%0),%0;clrl 4(%0)"
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:
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: "r" (p)
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: "memory" );
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}
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static __inline__ void __attribute__((__unused__))
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_insque(void *p, void *q)
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{
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__asm__ __volatile ("insque (%0),(%1)"
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:
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: "r" (p),"r" (q)
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: "memory" );
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}
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static __inline__ void * __attribute__((__unused__))
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memcpy(void *to, const void *from, size_t len)
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{
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__asm__ __volatile ("movc3 %0,%1,%2"
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:
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: "g" (len), "m" (*(char *)from), "m" (*(char *)to)
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:"r0","r1","r2","r3","r4","r5","memory","cc");
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return to;
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}
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static __inline__ void * __attribute__((__unused__))
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memmove(void *to, const void *from, size_t len)
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{
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__asm__ __volatile ("movc3 %0,%1,%2"
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:
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: "g" (len), "m" (*(char *)from), "m" (*(char *)to)
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:"r0","r1","r2","r3","r4","r5","memory","cc");
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return to;
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}
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static __inline__ void __attribute__((__unused__))
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bcopy(const void *from, void *to, size_t len)
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{
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__asm__ __volatile ("movc3 %0,%1,%2"
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:
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: "g" (len), "m" (*(char *)from), "m" (*(char *)to)
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:"r0","r1","r2","r3","r4","r5","memory","cc");
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}
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void __blkset(void *, int, size_t);
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static __inline__ void * __attribute__((__unused__))
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memset(void *block, int c, size_t len)
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{
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if (len > 65535)
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__blkset(block, c, len);
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else {
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__asm__ __volatile ("movc5 $0,(%%sp),%2,%1,%0"
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:
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: "m" (*(char *)block), "g" (len), "g" (c)
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:"r0","r1","r2","r3","r4","r5","memory","cc");
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}
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return block;
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}
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static __inline__ void __attribute__((__unused__))
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bzero(void *block, size_t len)
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{
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if (len > 65535)
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__blkset(block, 0, len);
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else {
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__asm__ __volatile ("movc5 $0,(%%sp),$0,%1,%0"
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:
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: "m" (*(char *)block), "g" (len)
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:"r0","r1","r2","r3","r4","r5","memory","cc");
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}
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}
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/* XXX - the return syntax of memcmp is wrong */
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static __inline__ int __attribute__((__unused__))
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memcmp(const void *b1, const void *b2, size_t len)
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{
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register int ret;
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__asm__ __volatile("cmpc3 %3,(%1),(%2);"
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"movl %%r0,%0"
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: "=r" (ret)
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: "r" (b1), "r" (b2), "r" (len)
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: "r0","r1","r2","r3" );
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return ret;
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}
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static __inline__ int __attribute__((__unused__))
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bcmp(const void *b1, const void *b2, size_t len)
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{
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register int ret;
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__asm__ __volatile("cmpc3 %3,(%1),(%2);"
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"movl %%r0,%0"
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: "=r" (ret)
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: "r" (b1), "r" (b2), "r" (len)
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: "r0","r1","r2","r3" );
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return ret;
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}
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/* Begin nya */
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static __inline__ size_t __attribute__((__unused__))
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strlen(const char *cp)
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{
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register size_t ret;
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__asm__ __volatile("locc $0,$65535,(%1);"
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"subl3 %%r0,$65535,%0"
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: "=r" (ret)
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: "r" (cp)
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: "r0","r1","cc" );
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return ret;
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}
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static __inline__ char * __attribute__((__unused__))
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strcat(char *cp, const char *c2)
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{
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__asm__ __volatile("locc $0,$65535,(%1);"
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"subl3 %%r0,$65535,%%r2;"
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"incl %%r2;"
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"locc $0,$65535,(%0);"
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"movc3 %%r2,(%1),(%%r1)"
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:
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: "r" (cp), "r" (c2)
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: "r0","r1","r2","r3","r4","r5","memory","cc");
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return cp;
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}
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static __inline__ char * __attribute__((__unused__))
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strncat(char *cp, const char *c2, size_t count)
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{
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__asm__ __volatile("locc $0,%2,(%1);"
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"subl3 %%r0,%2,%r2;"
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"locc $0,$65535,(%0);"
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"movc3 %%r2,(%1),(%%r1);"
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"movb $0,(%%r3)"
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:
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: "r" (cp), "r" (c2), "g"(count)
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: "r0","r1","r2","r3","r4","r5","memory","cc");
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return cp;
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}
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static __inline__ char * __attribute__((__unused__))
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strcpy(char *cp, const char *c2)
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{
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__asm__ __volatile("locc $0,$65535,(%1);"
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"subl3 %%r0,$65535,%%r2;"
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"movc3 %%r2,(%1),(%0);"
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"movb $0,(%%r3)"
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:
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: "r" (cp), "r" (c2)
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: "r0","r1","r2","r3","r4","r5","memory","cc");
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return cp;
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}
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static __inline__ char * __attribute__((__unused__))
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strncpy(char *cp, const char *c2, size_t len)
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{
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__asm__ __volatile("movl %2,%%r2;"
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"locc $0,%%r2,(%1);"
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"beql 1f;"
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"subl3 %%r0,%2,%%r2;"
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"clrb (%0)[%%r2];"
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"1:;"
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"movc3 %%r2,(%1),(%0)"
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:
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: "r" (cp), "r" (c2), "g"(len)
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: "r0","r1","r2","r3","r4","r5","memory","cc");
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return cp;
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}
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static __inline__ void * __attribute__((__unused__))
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memchr(const void *cp, int c, size_t len)
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{
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void *ret;
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__asm__ __volatile("locc %2,%3,(%1);"
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"bneq 1f;"
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"clrl %%r1;"
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"1:;"
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"movl %%r1,%0"
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: "=g"(ret)
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: "r" (cp), "r" (c), "g"(len)
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: "r0","r1","cc");
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return ret;
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}
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static __inline__ int __attribute__((__unused__))
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strcmp(const char *cp, const char *c2)
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{
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register int ret;
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__asm__ __volatile("locc $0,$65535,(%1);"
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"subl3 %%r0,$65535,%%r0;"
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"incl %%r0;"
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"cmpc3 %%r0,(%1),(%2);"
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"beql 1f;"
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"movl $1,%%r2;"
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"cmpb (%%r1),(%%r3);"
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"bcc 1f;"
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"mnegl $1,%%r2;"
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"1:;"
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"movl %%r2,%0"
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: "=g"(ret)
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: "r" (cp), "r" (c2)
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: "r0","r1","r2","r3","cc");
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return ret;
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}
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/* End nya */
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#if 0 /* unused, but no point in deleting it since it _is_ an instruction */
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static __inline__ int __attribute__((__unused__))
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locc(int mask, char *cp, size_t size){
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register ret;
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__asm__ __volatile("locc %1,%2,(%3);"
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"movl %%r0,%0"
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: "=r" (ret)
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: "r" (mask),"r"(size),"r"(cp)
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: "r0","r1" );
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return ret;
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}
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#endif
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static __inline__ int __attribute__((__unused__))
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scanc(u_int size, const u_char *cp, const u_char *table, int mask)
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{
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register int ret;
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__asm__ __volatile("scanc %1,(%2),(%3),%4;"
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"movl %%r0,%0"
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: "=g"(ret)
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: "r"(size),"r"(cp),"r"(table),"r"(mask)
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: "r0","r1","r2","r3" );
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return ret;
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}
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static __inline__ int __attribute__((__unused__))
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skpc(int mask, size_t size, u_char *cp)
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{
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register int ret;
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__asm__ __volatile("skpc %1,%2,(%3);"
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"movl %%r0,%0"
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: "=g"(ret)
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: "r"(mask),"r"(size),"r"(cp)
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: "r0","r1" );
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return ret;
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}
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/*
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* Set/clear a bit at a memory position; interlocked.
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* Return 0 if already set, 1 otherwise.
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*/
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static __inline__ int __attribute__((__unused__))
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bbssi(int bitnr, long *addr)
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{
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register int ret;
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__asm__ __volatile("clrl %%r0;"
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"bbssi %1,%2,1f;"
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"incl %%r0;"
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"1:;"
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"movl %%r0,%0"
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: "=&r"(ret)
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: "g"(bitnr),"m"(*addr)
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: "r0","cc","memory");
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return ret;
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}
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static __inline__ int __attribute__((__unused__))
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bbcci(int bitnr, long *addr)
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{
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register int ret;
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__asm__ __volatile("clrl %%r0;"
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"bbcci %1,%2,1f;"
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"incl %%r0;"
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"1:;"
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"movl %%r0,%0"
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: "=&r"(ret)
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: "g"(bitnr),"m"(*addr)
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: "r0","cc","memory");
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return ret;
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}
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#define setrunqueue(p) \
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__asm__ __volatile("movl %0,%%r0;jsb Setrq" :: "g"(p):"r0","r1","r2");
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#define remrunqueue(p) \
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__asm__ __volatile("movl %0,%%r0;jsb Remrq" :: "g"(p):"r0","r1","r2");
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#define cpu_switch(p) \
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__asm__ __volatile("movl %0,%%r6;movpsl -(%%sp);jsb Swtch" \
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::"g"(p):"r0","r1","r2","r3","r4","r5","r6");
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/*
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* Interlock instructions. Used both in multiprocessor environments to
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* lock between CPUs and in uniprocessor systems when locking is required
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* between I/O devices and the master CPU.
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*/
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/*
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* Insqti() locks and inserts an element into the end of a queue.
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* Returns -1 if interlock failed, 1 if inserted OK and 0 if first in queue.
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*/
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static __inline__ int __attribute__((__unused__))
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insqti(void *entry, void *header) {
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register int ret;
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__asm__ __volatile(
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" mnegl $1,%0;"
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" insqti (%1),(%2);"
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" bcs 1f;" /* failed insert */
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" beql 2f;" /* jump if first entry */
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" movl $1,%0;"
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" brb 1f;"
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"2: clrl %0;"
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" 1:;"
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: "=&g"(ret)
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: "r"(entry), "r"(header)
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: "memory");
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return ret;
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}
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/*
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* Remqhi() removes an element from the head of the queue.
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* Returns -1 if interlock failed, 0 if queue empty, address of the
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* removed element otherwise.
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*/
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static __inline__ void * __attribute__((__unused__))
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remqhi(void *header) {
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register void *ret;
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__asm__ __volatile(
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" remqhi (%1),%0;"
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" bcs 1f;" /* failed interlock */
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" bvs 2f;" /* nothing was removed */
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" brb 3f;"
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"1: mnegl $1,%0;"
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" brb 3f;"
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"2: clrl %0;"
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" 3:;"
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: "=&g"(ret)
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: "r"(header)
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: "memory");
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return ret;
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}
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#define ILCK_FAILED -1 /* Interlock failed */
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#define Q_EMPTY 0 /* Queue is/was empty */
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#define Q_OK 1 /* Inserted OK */
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#endif /* _VAX_MACROS_H_ */
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