515 lines
14 KiB
C
515 lines
14 KiB
C
/* $NetBSD: et4000.c,v 1.2 1998/09/14 14:25:38 leo Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Julian Coleman.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Thanks to:
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* Leo Weppelman
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* 'Maximum Entropy'
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* Thomas Gerner
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* Juergen Orscheidt
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* for their help and for code that I could refer to when writing this driver.
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*/
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/*
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#define DEBUG_ET4000
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*/
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#include <sys/param.h>
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#include <sys/ioctl.h>
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#include <sys/queue.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <atari/vme/vmevar.h>
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#include <machine/iomap.h>
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#include <machine/video.h>
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#include <machine/mfp.h>
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#include <machine/cpu.h>
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#include <atari/atari/device.h>
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#include <atari/dev/grfioctl.h>
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#include <atari/dev/grf_etreg.h>
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/*
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* Allow a 8Kb io-region and a 1MB frame buffer to be mapped. This
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* is more or less required by the XFree server.
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*/
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#define REG_MAPPABLE (8 * 1024) /* 0x2000 */
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#define FRAME_MAPPABLE (1 * 1024 * 1024) /* 0x100000 */
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#define FRAME_OFFSET (1 * 1024 * 1024) /* 0x100000 */
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static int et_vme_match __P((struct device *, struct cfdata *, void *));
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static void et_vme_attach __P((struct device *, struct device *, void *));
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static int et_probe_addresses __P((struct vme_attach_args *));
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static void et_start __P((bus_space_tag_t *, bus_space_handle_t *, int *,
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u_char *));
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static void et_stop __P((bus_space_tag_t *, bus_space_handle_t *, int *,
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u_char *));
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static int et_detect __P((bus_space_tag_t *, bus_space_tag_t *,
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bus_space_handle_t *, bus_space_handle_t *, u_int));
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dev_decl(et,open);
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dev_decl(et,close);
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dev_decl(et,read);
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dev_decl(et,write);
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dev_decl(et,ioctl);
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dev_decl(et,mmap);
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int eton __P((dev_t));
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int etoff __P((dev_t));
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/* Register and screen memory addresses for ET4000 based VME cards */
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static struct et_addresses {
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u_long io_addr;
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u_long io_size;
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u_long mem_addr;
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u_long mem_size;
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} etstd[] = {
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{ 0xfebf0000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Crazy Dots VME & II */
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{ 0xfed00000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Spektrum I & HC */
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{ 0xfed80000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE } /* Spektrum TC */
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};
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#define NETSTD (sizeof(etstd) / sizeof(etstd[0]))
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struct grfabs_et_priv {
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volatile caddr_t regkva;
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volatile caddr_t memkva;
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int regsz;
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int memsz;
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} et_priv;
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struct et_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_tag_t sc_memt;
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bus_space_handle_t sc_ioh;
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bus_space_handle_t sc_memh;
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int sc_flags;
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int sc_iobase;
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int sc_maddr;
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int sc_iosize;
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int sc_msize;
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};
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#define ET_SC_FLAGS_INUSE 1
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struct cfattach et_ca = {
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sizeof(struct et_softc), et_vme_match, et_vme_attach
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};
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extern struct cfdriver et_cd;
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/*
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* Look for a ET4000 (Crazy Dots) card on the VME bus. We might
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* match Spektrum cards too (untested).
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*/
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int
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et_vme_match(pdp, cfp, auxp)
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struct device *pdp;
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struct cfdata *cfp;
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void *auxp;
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{
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struct vme_attach_args *va = auxp;
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return(et_probe_addresses(va));
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}
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static int
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et_probe_addresses(va)
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struct vme_attach_args *va;
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{
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int i, found = 0;
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bus_space_tag_t iot;
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bus_space_tag_t memt;
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bus_space_handle_t ioh;
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bus_space_handle_t memh;
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iot = va->va_iot;
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memt = va->va_memt;
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/* Loop around our possible addresses looking for a match */
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for (i = 0; i < NETSTD; i++) {
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struct et_addresses *et_ap = &etstd[i];
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struct vme_attach_args vat = *va;
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if (vat.va_irq != VMECF_IRQ_DEFAULT) {
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printf("et probe: config error: no irq support\n");
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return(0);
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}
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if (vat.va_iobase == VMECF_IOPORT_DEFAULT)
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vat.va_iobase = et_ap->io_addr;
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if (vat.va_maddr == VMECF_MEM_DEFAULT)
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vat.va_maddr = et_ap->mem_addr;
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if (vat.va_iosize == VMECF_IOSIZE_DEFAULT)
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vat.va_iosize = et_ap->io_size;
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if (vat.va_msize == VMECF_MEMSIZ_DEFAULT)
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vat.va_msize = et_ap->mem_size;
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if (bus_space_map(iot, vat.va_iobase, vat.va_iosize, 0,
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&ioh)) {
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printf("et probe: cannot map io area\n");
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return(0);
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}
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if (bus_space_map(memt, vat.va_maddr, vat.va_msize,
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BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_CACHEABLE,
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&memh)) {
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bus_space_unmap(iot, (caddr_t)vat.va_iobase,
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vat.va_iosize);
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printf("et probe: cannot map memory area\n");
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return(0);
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}
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found = et_detect(&iot, &memt, &ioh, &memh, vat.va_msize);
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bus_space_unmap(iot, (caddr_t)vat.va_iobase, vat.va_iosize);
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bus_space_unmap(memt, (caddr_t)vat.va_maddr, vat.va_msize);
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if (found) {
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*va = vat;
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return(1);
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}
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}
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return(0);
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}
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static void
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et_start(iot, ioh, vgabase, saved)
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bus_space_tag_t *iot;
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bus_space_handle_t *ioh;
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int *vgabase;
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u_char *saved;
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{
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/* Enable VGA */
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bus_space_write_1(*iot, *ioh, GREG_VIDEOSYSENABLE, 0x01);
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/* Check whether colour (base = 3d0) or mono (base = 3b0) mode */
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*vgabase = (bus_space_read_1(*iot, *ioh, GREG_MISC_OUTPUT_R) & 0x01)
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? 0x3d0 : 0x3b0;
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/* Enable 'Tseng Extensions' - writes to CRTC and ATC[16] */
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bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x03);
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bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0xa0);
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/* Set up 16 bit I/O, memory, Tseng addressing and linear mapping */
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bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x36);
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bus_space_write_1(*iot, *ioh, *vgabase + 0x05, 0xf0);
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/* Enable writes to CRTC[0..7] */
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bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11);
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*saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05);
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bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved & 0x7f);
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/* Map all memory for video modes */
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bus_space_write_1(*iot, *ioh, 0x3ce, 0x06);
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bus_space_write_1(*iot, *ioh, 0x3cf, 0x01);
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}
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static void
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et_stop(iot, ioh, vgabase, saved)
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bus_space_tag_t *iot;
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bus_space_handle_t *ioh;
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int *vgabase;
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u_char *saved;
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{
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/* Restore writes to CRTC[0..7] */
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bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11);
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*saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05);
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bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved | 0x80);
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/* Disable 'Tseng Extensions' */
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bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0x00);
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bus_space_write_1(*iot, *ioh, GREG_DISPMODECONTROL, 0x29);
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bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x01);
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}
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static int
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et_detect(iot, memt, ioh, memh, memsize)
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bus_space_tag_t *iot, *memt;
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bus_space_handle_t *ioh, *memh;
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u_int memsize;
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{
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u_char orig, new, saved;
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int vgabase;
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/* Test accessibility of registers and memory */
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if(!bus_space_peek_1(*iot, *ioh, GREG_STATUS1_R))
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return(0);
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if(!bus_space_peek_1(*memt, *memh, 0))
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return(0);
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et_start(iot, ioh, &vgabase, &saved);
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/* Is the card a Tseng card? Check read/write of ATC[16] */
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(void)bus_space_read_1(*iot, *ioh, vgabase + 0x0a);
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bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20);
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orig = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R);
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bus_space_write_1(*iot, *ioh, ACT_ADDRESS_W, (orig ^ 0x10));
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bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20);
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new = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R);
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bus_space_write_1(*iot, *ioh, ACT_ADDRESS, orig);
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if (new != (orig ^ 0x10)) {
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#ifdef DEBUG_ET4000
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printf("et4000: ATC[16] failed (%x != %x)\n",
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new, (orig ^ 0x10));
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#endif
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et_stop(iot, ioh, &vgabase, &saved);
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return(0);
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}
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/* Is the card and ET4000? Check read/write of CRTC[33] */
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bus_space_write_1(*iot, *ioh, vgabase + 0x04, 0x33);
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orig = bus_space_read_1(*iot, *ioh, vgabase + 0x05);
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bus_space_write_1(*iot, *ioh, vgabase + 0x05, (orig ^ 0x0f));
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new = bus_space_read_1(*iot, *ioh, vgabase + 0x05);
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bus_space_write_1(*iot, *ioh, vgabase + 0x05, orig);
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if (new != (orig ^ 0x0f)) {
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#ifdef DEBUG_ET4000
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printf("et4000: CRTC[33] failed (%x != %x)\n",
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new, (orig ^ 0x0f));
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#endif
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et_stop(iot, ioh, &vgabase, &saved);
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return(0);
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}
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/* Set up video memory so we can read & write it */
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bus_space_write_1(*iot, *ioh, 0x3c4, 0x04);
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bus_space_write_1(*iot, *ioh, 0x3c5, 0x0e);
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bus_space_write_1(*iot, *ioh, 0x3ce, 0x01);
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bus_space_write_1(*iot, *ioh, 0x3cf, 0x00);
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bus_space_write_1(*iot, *ioh, 0x3ce, 0x03);
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bus_space_write_1(*iot, *ioh, 0x3cf, 0x00);
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bus_space_write_1(*iot, *ioh, 0x3ce, 0x05);
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bus_space_write_1(*iot, *ioh, 0x3cf, 0x40);
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#define TEST_PATTERN 0xa5a5a5a5
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bus_space_write_4(*memt, *memh, 0x0, TEST_PATTERN);
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if (bus_space_read_4(*memt, *memh, 0x0) != TEST_PATTERN)
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{
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#ifdef DEBUG_ET4000
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printf("et4000: Video base write/read failed\n");
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#endif
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et_stop(iot, ioh, &vgabase, &saved);
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return(0);
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}
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bus_space_write_4(*memt, *memh, memsize - 4, TEST_PATTERN);
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if (bus_space_read_4(*memt, *memh, memsize - 4) != TEST_PATTERN)
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{
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#ifdef DEBUG_ET4000
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printf("et4000: Video top write/read failed\n");
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#endif
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et_stop(iot, ioh, &vgabase, &saved);
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return(0);
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}
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et_stop(iot, ioh, &vgabase, &saved);
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return(1);
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}
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static void
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et_vme_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct et_softc *sc = (struct et_softc *)self;
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struct vme_attach_args *va = aux;
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bus_space_handle_t ioh;
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bus_space_handle_t memh;
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printf("\n");
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if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh))
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panic("et attach: cannot map io area\n");
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if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh))
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panic("et attach: cannot map mem area\n");
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sc->sc_iot = va->va_iot;
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sc->sc_ioh = ioh;
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sc->sc_memt = va->va_memt;
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sc->sc_memh = memh;
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sc->sc_flags = 0;
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sc->sc_iobase = va->va_iobase;
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sc->sc_maddr = va->va_maddr;
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sc->sc_iosize = va->va_iosize;
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sc->sc_msize = va->va_msize;
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et_priv.regkva = (volatile caddr_t)ioh;
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et_priv.memkva = (volatile caddr_t)memh;
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et_priv.regsz = va->va_iosize;
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et_priv.memsz = va->va_msize;
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}
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int
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etopen(dev, flags, devtype, p)
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dev_t dev;
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int flags, devtype;
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struct proc *p;
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{
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struct et_softc *sc;
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if (minor(dev) >= et_cd.cd_ndevs)
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return(ENXIO);
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sc = et_cd.cd_devs[minor(dev)];
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if (sc->sc_flags & ET_SC_FLAGS_INUSE)
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return(EBUSY);
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sc->sc_flags |= ET_SC_FLAGS_INUSE;
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return(0);
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}
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int
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etclose(dev, flags, devtype, p)
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dev_t dev;
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int flags, devtype;
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struct proc *p;
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{
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struct et_softc *sc;
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/*
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* XXX: Should we reset to a default mode?
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*/
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sc = et_cd.cd_devs[minor(dev)];
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sc->sc_flags &= ~ET_SC_FLAGS_INUSE;
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return(0);
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}
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int
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etread(dev, uio, flags)
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dev_t dev;
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struct uio *uio;
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int flags;
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{
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return(EINVAL);
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}
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int
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etwrite(dev, uio, flags)
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dev_t dev;
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struct uio *uio;
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int flags;
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{
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return(EINVAL);
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}
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int
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etioctl(dev, cmd, data, flags, p)
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dev_t dev;
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u_long cmd;
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caddr_t data;
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int flags;
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struct proc *p;
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{
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struct grfinfo g_display;
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struct et_softc *sc;
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sc = et_cd.cd_devs[minor(dev)];
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switch (cmd) {
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case GRFIOCON:
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return(0);
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break;
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case GRFIOCOFF:
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return(0);
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break;
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case GRFIOCGINFO:
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g_display.gd_fbaddr = (caddr_t)sc->sc_maddr;
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g_display.gd_fbsize = sc->sc_msize;
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g_display.gd_regaddr = (caddr_t)sc->sc_iobase;
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g_display.gd_regsize = sc->sc_iosize;
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g_display.gd_colors = 16;
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g_display.gd_planes = 4;
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g_display.gd_fbwidth = 640; /* XXX: should be 'unknown' */
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g_display.gd_fbheight = 400; /* XXX: should be 'unknown' */
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g_display.gd_fbx = 0;
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g_display.gd_fby = 0;
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g_display.gd_dwidth = 0;
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g_display.gd_dheight = 0;
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g_display.gd_dx = 0;
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g_display.gd_dy = 0;
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g_display.gd_bank_size = 0;
|
|
bcopy((caddr_t)&g_display, data, sizeof(struct grfinfo));
|
|
break;
|
|
case GRFIOCMAP:
|
|
return(EINVAL);
|
|
break;
|
|
case GRFIOCUNMAP:
|
|
return(EINVAL);
|
|
break;
|
|
default:
|
|
return(EINVAL);
|
|
break;
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
int
|
|
etmmap(dev, offset, prot)
|
|
dev_t dev;
|
|
int offset, prot;
|
|
{
|
|
struct et_softc *sc;
|
|
|
|
sc = et_cd.cd_devs[minor(dev)];
|
|
|
|
/*
|
|
* control registers
|
|
* mapped from offset 0x0 to REG_MAPPABLE
|
|
*/
|
|
if (offset >= 0 && offset <= sc->sc_iosize)
|
|
return(m68k_btop(sc->sc_iobase + offset));
|
|
|
|
/*
|
|
* frame buffer
|
|
* mapped from offset 0x100000 to 0x1fffff
|
|
*/
|
|
if (offset >= FRAME_OFFSET && offset < sc->sc_msize + FRAME_OFFSET)
|
|
return(m68k_btop(sc->sc_maddr + offset - FRAME_OFFSET));
|
|
|
|
return(-1);
|
|
}
|
|
|
|
int
|
|
eton(dev)
|
|
dev_t dev;
|
|
{
|
|
struct et_softc *sc;
|
|
|
|
if (minor(dev) >= et_cd.cd_ndevs)
|
|
return(ENXIO);
|
|
sc = et_cd.cd_devs[minor(dev)];
|
|
if (!sc)
|
|
return(ENXIO);
|
|
return(0);
|
|
}
|
|
|
|
int
|
|
etoff(dev)
|
|
dev_t dev;
|
|
{
|
|
return(0);
|
|
}
|
|
|